JPH0115087B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to an analog/digital conversion method for converting an analog signal into a digital signal.

BACKGROUND ART FIG. 1 is a block diagram illustrating a prior art analog/digital conversion system. analog/
Multiplexer 1 in digital converter A
Voltages V1 to Vi are applied to terminals M1 to Mi of.
The output of multiplexer 1 is connected via line 2 to the negative pole of battery 3. The positive electrode of the battery 3 is connected to a comparator 6 via a buffer gate 4 and a switch 5.
is connected to the non-inverting input terminal of A constant current source 7 and a capacitor 8 are connected between the non-inverting input terminal of the comparator 6 and ground. The positive electrode of the battery 9 is connected to the inverting input terminal of the comparator 6 . The output of comparator 6 is connected to terminal 10. Line 11 is connected to terminal 12, and when the signal applied to line 11 is at a high level, switch 5 opens.
Line 13 is connected to terminal 14, and the signal transmitted on line 13 selects the output of multiplexer 1.

Terminal 16 of edge detection circuit 15 in microcomputer B is connected to terminal 10 of analog/digital converter A. Further, the terminal 17 is connected to the terminal 12, and the terminal 18 is connected to the terminal 14, respectively. The edge detection circuit 15 is connected to line 1.
It sends out a first conversion complete signal via line 9 and is also connected to a save register 22 via line 21. A clock signal is applied to the free run counter 23, and the output of the free run counter 23 is connected to the save register 22.

The operation of the prior art shown in FIG. 1 will now be described with reference to the waveform diagram in FIG. 2. FIG. 21 is a waveform diagram showing the potential of the capacitor 8 in FIG. 1.
Voltage VBE1 is the voltage of battery 3, voltage VBE2
is the voltage applied to the inverting input terminal of the comparator 6. For example, analog/digital converter A
When a normal analog signal applied to the terminal Mi of the terminal Mi is converted into a digital signal, the waveform becomes as shown by the solid line in FIG. The time t1 is read at the rising edge of the signal shown in FIG. 2 applied to the terminal 17 of the microprocessor B, and the time t is read after the conversion time has elapsed.
2, the stop signal shown in FIG. 2 falls and time t2 is stored in the save register 22, and at the same time, the first conversion completion signal 20 shown in FIG. 2 is set.

When converting a voltage lower than the ground level as shown by the broken line in Fig. 2, the stop signal does not change as shown by the broken line in Fig. 2, so the end time is not stored, and the first conversion completion signal 20 will also not be set. In such a case, the user will have to wait forever for the conversion to finish, which will cause problems in subsequent control. In reality, design measures are taken in advance to prevent such problems from occurring. For example, assuming the maximum value of the negative voltage level (controller ground level or sensor ground level), set the voltage VBE1 above that maximum value, and make sure that the potential of capacitor C is the voltage no matter what the input is.
Design to have a VBE of 2 or higher. However, in this case, since the maximum value of voltage VBE1 + Vi is regulated, the maximum value of voltage Vi is inevitably compressed,
Analog/digital conversion accuracy deteriorates.

Purpose The purpose of the present invention is to solve the above-mentioned technical problem,
An object of the present invention is to provide an analog/digital conversion method that increases the accuracy of analog/digital conversion.

Embodiment FIG. 3 is a block diagram of an embodiment of the present invention. Signals V1 to Vi are applied to each terminal P1 to Pi of the analog/digital converter A1, respectively. Terminals Q1 to Q3 of analog/digital converter A1 are connected to terminals B2 to B4 of microcomputer B1, which is a processing circuit, respectively. A second conversion completion signal B5 is generated by ANDing the start signal applied to the terminal B2 and the inverted signal of the stop signal applied to the terminal B3. Further, the signal applied to terminal B3 generates a first conversion completion signal via edge detection circuit B6. The output of the edge detection circuit B6 is on the line l1
is applied to save register B9 via. A clock signal is applied to free run counter B8, and the output of free run counter B8 is applied to save register B9.

The operation of the block diagram shown in FIG. 3 will now be described with reference to the waveform diagram of FIG. 4. The circuit configuration of analog/digital converter A1 is the same as that of analog/digital converter A shown in FIG. The waveform diagrams shown in FIGS. 41 to 4 are as follows:
This is the same as the waveform diagrams shown in FIGS. 21 to 24.
For example, when a normal analog signal applied to the terminal Pi of the analog/digital converter A1 is converted into a digital signal as described above, the waveform becomes as shown by the solid line in FIG. 4. The microcomputer B1 receives the fourth signal applied to the terminal B2.
At the rise of the start signal in FIG. 2, the start time t1 is read from the free run counter B8 and stored in an accumulator (not shown). Then, at time t2 after the conversion time has elapsed, the stop signal shown in FIG. 4 falls, and this falling edge detection circuit B
6, and its detection signal is output via line l1. This detection signal causes the value of free run counter B8 to be stored in save register B9 as end time t2. At the same time, Figure 4
A first conversion completion signal B7 shown by a solid line is output from the edge detection circuit B6 and is set. Further, in synchronization with the fall of the stop signal B3, a second conversion completion signal shown by a solid line in FIG. 4 is set.

Next, when converting a voltage lower than the ground level as shown by the broken line in Figure 4 1, the stop signal does not change as shown by the broken line in Figure 4 3, so no detection signal is output from the edge detection circuit B6. .
Therefore, the end time is not stored in the save register B9, and as shown by the broken line in FIG.
The conversion completion signal B7 is also not set. However, at the rise of the start signal in FIG. 4, the second conversion completion signal B5 is set as shown by the broken line in FIG. 4.

The microcomputer B1 detects that the second conversion completion signal is set and moves on to the next process. That is, in order to determine whether or not the current analog/digital conversion has ended normally, the state of the first conversion completion signal B7 is checked and the first
If the conversion completion signal B7 is set, it is determined that the conversion has ended normally, and the difference between the start time and the end time stored in the save register B9 is calculated to calculate a digital value. Also, the first
If the conversion completion signal B7 is not set, then
It is determined that there is an abnormality and the abnormality processing is performed. For example, the analog voltage converted this time is treated as zero V.

In this way, in this embodiment, instead of proceeding to the next process at the first conversion end signal as in the conventional case,
Regardless of whether the analog/digital conversion ends normally or abnormally, the system is configured to proceed to the next process with the second conversion end signal that is always generated, so even when negative voltage analog/digital conversion is completed, , the program processing can be immediately transferred to the converted processing routine.

FIG. 5 is a flowchart for explaining the operation of the microcomputer B1. An analog/digital conversion processing routine is entered, and the process moves from step n1 to step n2. In step n2, it is determined whether or not the second conversion completion signal is set, and if it is set, step n2 is executed.
3, and if it is not set, step n7
Move to and return. In step n3, preparations for analog/digital signal conversion of the signals V1 to Vi applied to the terminals P1 to Pi of the analog/digital converter A1 are made, for example, after the conversion of the signal V1 is completed, channel selection and voltage V2 are performed for converting the next signal V2. Perform a charge. In step n4, the current conversion time is saved. step n5
Then, it is determined whether or not the first conversion completion signal is set. If it is set, the process moves to step n6; if it is not set, the process moves to step n6.
Move on to 8. At step n6, analog/digital conversion related processing as explained in FIG. 4 is executed. In step n8, 0V equivalence processing is executed as negative voltage conversion as described above.

Effects As described above, according to the present invention, without deteriorating the accuracy of the analog/digital converter, even during negative potential analog/digital conversion, program processing can be immediately transferred to the post-conversion processing routine after conversion is completed. can be done.

[Brief explanation of drawings]

Figure 1 is a block diagram showing the electrical configuration of the prior art analog/digital conversion system, and Figure 2 is a block diagram showing the electrical configuration of the prior art analog/digital conversion method.
A waveform diagram to explain the operation of the block diagram in Fig.
3 is a block diagram of an embodiment of the present invention, FIG. 4 is a waveform diagram for explaining the operation of the block diagram in FIG. 3, and FIG. 5 is a waveform diagram for explaining the operation of the block diagram in FIG. 3. This is a flowchart. A1...Analog/digital converter, B1
...Microphone computer.

Claims (1)

[Claims] 1. In a controller using a microprocessor for controlling an internal combustion engine, a pulse related to an analog voltage is generated in order to convert the analog voltage into a digital quantity, and the edge at the end of the conversion of the pulse is the first one. Analog/
In the digital conversion method, a second conversion completion signal is generated from a conversion start signal and the pulse signal, and the program processing is transferred to a post-conversion processing routine by the second conversion completion signal, and during the processing routine. An analog/digital conversion method characterized in that whether or not the conversion has been completed normally is determined based on the first conversion completion signal.