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JPH01175775A - Photo-driven mos semiconductor device - Google Patents

Photo-driven mos semiconductor device

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Publication number
JPH01175775A
JPH01175775A JP62335913A JP33591387A JPH01175775A JP H01175775 A JPH01175775 A JP H01175775A JP 62335913 A JP62335913 A JP 62335913A JP 33591387 A JP33591387 A JP 33591387A JP H01175775 A JPH01175775 A JP H01175775A
Authority
JP
Japan
Prior art keywords
semiconductor device
mos
type
driven
mos semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62335913A
Other languages
Japanese (ja)
Inventor
Yoshiaki Nozaki
義明 野崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP62335913A priority Critical patent/JPH01175775A/en
Publication of JPH01175775A publication Critical patent/JPH01175775A/en
Pending legal-status Critical Current

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  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To enhance the efficiency of photosensitivity of a photo-sensitive section, to shorten the charging time of the gate capacitance of a MOS FET and to produce a photo-driven MOS FET which may respond at a high speed, by a structure wherein a plurality of photodetectors are laminated on the main surface of a MOS semiconductor device through insulating films, respectively, in a multilayer. CONSTITUTION:Photodetectors 2 are laminated on the main surface of a MOS semiconductor device 1, and the MOS semiconductor device 1 is driven by utilizing the photoelectromotive force which is generated by the photodetectors 2. In such a photo- driven MOS semiconductor device, the plurality of photodetectors 2 are laminated on the main surface of the MOS semiconductor device 1 through insulating films 19, respectively, in a multilayer. For example, after an n<-> type epitaxial layer 4 is grown on an n<+> type substrate 3, a p<-> type well diffusion layer 5 is formed. Subsequently, a gate oxide film 7 is formed on the epitaxial layer 4, and a gate electrode 8 is then formed thereon. Further, an n<+> type diffusion layer 6 is formed, and thereby a vertical MOS FET is completed. Next, after an SiO2 film 14 is deposited on the surface of the epitaxial layer 4 over which the gate electrode 8 is formed, two layers of photodiode sections 2 are formed in a laminated construction.

Description

【発明の詳細な説明】 [産業上の利用分野コ 本発明は、光駆動MOS型電界効果トランジスタに関し
、特に受光部の受光効率の向上に係る光駆動MO3型電
界効果トランジスタの構造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a light-driven MOS field effect transistor, and more particularly to the structure of a light-driven MO3 field effect transistor that improves the light receiving efficiency of a light receiving section. .

[従来の技術] 電気信号を光信号に変換して伝達する光結合デバイスで
ある光カブラデバイスは、幅広い応用が可能なデバイス
であり、たとえば固体化リレー、無接点スイッチ、無接
点可変抵抗器などに用いられている。光カブラデバイス
は電気信号を光信号に変換して発光する発光素子と、発
光素子から発せられた光を受信して電気信号に変換する
受光素子とから構成される。そして、この発光素子と受
光素子との組合わせは種々のものがあり、光カブラデバ
イスの用途に対して最適な組合わせが構成される。
[Prior Art] An optical coupler device, which is an optical coupling device that converts an electrical signal into an optical signal and transmits it, is a device that can be used in a wide range of applications, such as solid-state relays, non-contact switches, non-contact variable resistors, etc. It is used in An optical coupler device is composed of a light emitting element that converts an electrical signal into an optical signal and emits light, and a light receiving element that receives the light emitted from the light emitting element and converts it into an electrical signal. There are various combinations of the light-emitting element and the light-receiving element, and the optimum combination for the use of the optical coupler device is constructed.

近年、この先カブラデバイスの受光素子として用いられ
るものの1つにフォトダイオードとMO8型FET(M
etal−Oxide  Sem1conductor
型電界効果トランジスタ;以下MO8FETと称す)と
から構成された光駆動MO9FETがある。
In recent years, photodiodes and MO8 type FETs (M
etal-Oxide Sem1 conductor
There is an optically driven MO9FET which is composed of a type field effect transistor (hereinafter referred to as MO8FET).

従来の光駆動MO8FET構造を第6図および第7図に
示す。第6図は、光駆動MO3FETの平面図を示して
おり、第7図は第6図中の切断線■−■に沿った方向か
ら見た断面図を示している。以下、この第6図および第
7図を併用して説明する。従来の光駆動MOS  FE
Tは、MOS  FET部1の表面上に絶縁膜を介して
フォトダイオード部2を積層して構成した5OI(Si
lLcon  on  In5ulator)構造を有
している。
A conventional optically driven MO8FET structure is shown in FIGS. 6 and 7. FIG. 6 shows a plan view of the optically driven MO3FET, and FIG. 7 shows a cross-sectional view taken along the cutting line ■--■ in FIG. Hereinafter, the explanation will be made using FIG. 6 and FIG. 7 together. Conventional optically driven MOS FE
T is a 5OI (Si
It has a 1Lcon on In5ulator) structure.

まず、MOS  FET部1は、n十型基板3上に成長
したn−型エピタキシャル層4と、n′″型エピタキシ
ャル層4中に形成されたp−型ウェル拡散層5と、さら
にp−型ウェル拡散層5中に形成されたn++ソース拡
散層6と、n−型エピタキシャル層4上に形成されたゲ
ート絶縁層7と、その上に形成されたゲート電極8およ
びソース電極9とから構成される。
First, the MOS FET section 1 includes an n-type epitaxial layer 4 grown on an n-type substrate 3, a p-type well diffusion layer 5 formed in the n''-type epitaxial layer 4, and a p-type well diffusion layer 5 formed in the n''' type epitaxial layer 4. It is composed of an n++ source diffusion layer 6 formed in the well diffusion layer 5, a gate insulating layer 7 formed on the n- type epitaxial layer 4, and a gate electrode 8 and a source electrode 9 formed thereon. Ru.

また、フォトダイオード部2は、MOS  FETの表
面上に絶縁膜10を堆積し、さらにその上にp型シリコ
ン単結晶層11およびn+型型数散層12形成してpn
接合を構成する。最後に、表面上に保護膜13を形成す
る。
Further, the photodiode section 2 is formed by depositing an insulating film 10 on the surface of the MOS FET, and further forming a p-type silicon single crystal layer 11 and an n+ type scattering layer 12 thereon.
Configure the junction. Finally, a protective film 13 is formed on the surface.

さらに、この光駆動MO8FETは第6図に示すように
複数のMOS  FETおよびMOSFET上に41!
#して形成されたフォトダイオードを平面的に配列して
構成しており、各々のフォトダイオード部2は出力電圧
を上げるために各列ごとに直列に接続され、さらにその
一端はMO3FET部1のゲート電極8に接続され、他
端は接地されている。
Furthermore, this optically driven MO8FET is arranged on a plurality of MOS FETs and MOSFETs as shown in FIG.
The photodiode sections 2 are connected in series in each column to increase the output voltage, and one end of the photodiode section 2 is connected to the MO3FET section 1. It is connected to the gate electrode 8, and the other end is grounded.

本光駆動MOS  FETは次のように動作する。This optically driven MOS FET operates as follows.

すなわち、光がフォトダイオード部2に入射すれば、そ
のpn接合部で光起電力が発生する。この光起電力をM
OS  FETに導入し、MOS  FETのゲート電
極に電圧を加えることによってMOS  FETが動作
する。
That is, when light enters the photodiode section 2, a photovoltaic force is generated at the pn junction. This photovoltaic force is M
The MOS FET is operated by introducing it into the OS FET and applying a voltage to the gate electrode of the MOS FET.

[発明が解決しようとする問題点コ 通常、上記のMOS  FETのゲートには容量が存在
するために、ゲート容量が充電されるまでMOS  F
ETは駆動しない。一方、従来の光駆動MOS  FE
Tのフォトダイオード部は、そのシリコン単結晶層11
を十−ザアニールにより形成するためにシリコン単結晶
層11の膜厚を1〜2μm程度にしか形成できない。こ
のために、フォトダイオードの受光効率は低く光起電力
は小さくなる。したがって、この光起電力によってMO
S  FETのゲート容量を充電する場合、充電時間が
長くなる。その結果、光駆動MO3FETの応答速度は
、MOS  FETのゲート容量の充電時間に律速され
、高速応答化の妨げとなる問題があった。
[Problems to be Solved by the Invention] Normally, since there is a capacitance at the gate of the MOS FET described above, the MOS FET remains closed until the gate capacitance is charged.
ET is not driven. On the other hand, conventional optically driven MOS FE
The photodiode portion of T is made of its silicon single crystal layer 11.
Since the silicon single crystal layer 11 is formed by tenth annealing, the thickness of the silicon single crystal layer 11 can only be formed to be about 1 to 2 μm. For this reason, the light receiving efficiency of the photodiode is low and the photovoltaic force is small. Therefore, this photovoltaic force causes MO
When charging the gate capacitance of SFET, the charging time becomes long. As a result, the response speed of the optically driven MO3FET is determined by the charging time of the gate capacitance of the MOS FET, which poses a problem that hinders high-speed response.

したがって、本発明は光駆動MO8FETの受光部の受
光効率を高め、MOS  FETのゲート容量の充電時
間の短縮化を図り高速応答が可能な光駆動MOS  F
ETを提供することを目的とする。
Therefore, the present invention improves the light receiving efficiency of the light receiving part of the optically driven MO8FET, shortens the charging time of the gate capacitance of the MOS FET, and provides an optically driven MOS FET capable of high-speed response.
The purpose is to provide ET.

[問題点を解決するための手段] 本発明による光駆動MOS型半導体装置は、MOS型半
導体装置の主面上に受光素子を積層し、前記受光素子で
発生した光起電力を用いてMOS型半導体装置を駆動さ
せる光駆動MOS型半導体装置であり、前記MOS型半
導体装置の主面上に複数の前記受光素子を各々絶縁膜を
介して多層に積層したことを特徴とする。
[Means for Solving the Problems] The optically driven MOS type semiconductor device according to the present invention has a light receiving element stacked on the main surface of the MOS type semiconductor device, and uses the photovoltaic force generated by the light receiving element to drive the MOS type semiconductor device. The present invention is an optically driven MOS type semiconductor device for driving a semiconductor device, and is characterized in that a plurality of the light receiving elements are stacked in multiple layers on the main surface of the MOS type semiconductor device, each with an insulating film interposed therebetween.

[作用] 本発明における光駆動MOS型半導体装置はその受光部
分を各々絶縁膜を介して多層に積層した複数の受光素子
で構成している。このために従来の光駆動MOS型半導
体装置に比べて同一の受光面積での受光効率が高くなり
、その結果これらの受光素子から発生する光起電力も高
くなる。したがってこの受光素子で発生した光起電力を
利用するMOS型半導体装置のゲートの充電時間を短縮
することができる。゛ [実施例] 以下、本発明の一実施例を図を用いて詳細に説明する。
[Function] The optically driven MOS type semiconductor device according to the present invention has a light-receiving portion made up of a plurality of light-receiving elements each laminated in multiple layers with an insulating film interposed therebetween. For this reason, compared to conventional optically driven MOS type semiconductor devices, the light receiving efficiency in the same light receiving area becomes higher, and as a result, the photovoltaic force generated from these light receiving elements also becomes higher. Therefore, it is possible to shorten the charging time of the gate of a MOS type semiconductor device that utilizes the photovoltaic force generated by this light receiving element. [Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

第1図ないし第3図は、本発明による光駆動MOS  
FETの構造図を示している。第1図は、その平面図を
示しており、第2図は第1図中の切断線■−Hに沿った
方向からの断面図を、また、第3図は切断線■−■に沿
った方向からの断面図を示している。
1 to 3 show optically driven MOS according to the present invention.
A structural diagram of an FET is shown. Fig. 1 shows its plan view, Fig. 2 shows a cross-sectional view taken along the cutting line ■-H in Fig. 1, and Fig. 3 shows a cross-sectional view taken along the cutting line ■-■. A cross-sectional view taken from the direction shown in FIG.

本発明による光駆動MO3FETはMO5FET部1の
表面上に絶縁膜を介して複数のフォトダイオード部21
本実施例では2層のフォトダイオード部2を積層して形
成した構造(Sol構造)を特徴としている。以下、本
実施例による光駆動MO8FETの構造をその製造工程
に従って説明する。第4A図、第4B図、第4C図およ
′び、第5A図、第5B図、第5C図は各々光駆動MO
S  FETの製造工程を示す断面図であり、第4A図
ないし第4C図は第1図の平面図において切断線■−■
に沿った方向から見た図を示し、第5A図ないし第5C
図は同じく切断線■−■に沿った方向から見た図を示し
ている。なお、第4A図と第5A図と、第4B図と第5
B図、第4C図と第5C図は各々同じ工程を示している
The optically driven MO3FET according to the present invention has a plurality of photodiode parts 21 on the surface of the MO5FET part 1 via an insulating film.
This embodiment is characterized by a structure (Sol structure) formed by stacking two photodiode sections 2. Hereinafter, the structure of the optically driven MO8FET according to this embodiment will be explained according to its manufacturing process. Figures 4A, 4B, 4C, 5A, 5B, and 5C are optical drive MOs, respectively.
4A to 4C are cross-sectional views showing the manufacturing process of S FET, and FIGS. 4A to 4C are along the cutting line ■-■ in the plan view of FIG.
5A to 5C.
The figure also shows a view seen from the direction along the cutting line ■-■. Furthermore, Figures 4A and 5A, Figures 4B and 5
Figure B, Figure 4C and Figure 5C each show the same process.

まず、MOS  FET部1の構造をその製造工程に従
って説明する。第4A図、第5A図に示すように、n+
型基板3上にn−エピタキシャル層4を成長させた後、
p−型不純物拡散を行ないp−型ウェル拡散層5を形成
する。次に、n−型エピタキシャル層4上にゲート酸化
膜7を形成し、さらにその上にポリシリコンを堆積した
後、フォトエツチングによりゲート電極8を形成する。
First, the structure of the MOS FET section 1 will be explained according to its manufacturing process. As shown in FIGS. 4A and 5A, n+
After growing the n-epitaxial layer 4 on the type substrate 3,
A p-type well diffusion layer 5 is formed by diffusing p-type impurities. Next, a gate oxide film 7 is formed on the n-type epitaxial layer 4, and after polysilicon is deposited thereon, a gate electrode 8 is formed by photoetching.

さらに、ゲート電極8とフォトエツチングによりパター
ニングされたレジストとをマスクとしてp−ウェル拡散
層5内にn型不純物拡散を行なって01型拡散層6を形
成し縦型MO3FETを構成する。
Furthermore, an n-type impurity is diffused into the p-well diffusion layer 5 using the gate electrode 8 and a resist patterned by photoetching as a mask to form an 01-type diffusion layer 6 to form a vertical MO3FET.

次に、フォトダイオード部2の構造をその製造工程に従
って説明する。第4B図および第5B図に示すように、
ゲート電極8が形成されたn−型エピタキシャル層4表
面上に5in2H14を堆積した後、エッチバックによ
りSiO2膜14膜面4表面化する。そして、この5i
02膜14の一部に窓開けを行ないシード部15を形成
した後、n型ポリシリコン層16を堆積する。そして、
このp型ポリシリコン層16にレーザアニールを施しフ
ォトダイオードを形成すべき領域を単結晶化させてpW
単結晶層17を形成する。
Next, the structure of the photodiode section 2 will be explained according to its manufacturing process. As shown in Figures 4B and 5B,
After depositing 5 in 2 H 14 on the surface of the n-type epitaxial layer 4 on which the gate electrode 8 is formed, the SiO 2 film 14 is etched back. And this 5i
After forming a seed portion 15 by opening a window in a part of the 02 film 14, an n-type polysilicon layer 16 is deposited. and,
Laser annealing is applied to this p-type polysilicon layer 16 to make the region where a photodiode is to be formed into a single crystal.
A single crystal layer 17 is formed.

さらに、第4C図および第5C図に示すように、フォト
ダイオードのp型車結晶層17以外のポリシリコン層1
6をエツチング除去し、p型車結晶層17表面にイオン
注入などによりn+拡散層18を形成し、フォトダイオ
ードのpn接合を構成する。その後、フォトダイオード
の表面に5i02の保護膜19を形成し、フォトエツチ
ングによりソースおよびゲート電極、フォトダイオード
のコンタクトホールの穴開けを行なう。そして、高融点
金属あるいはポリシリコンなどを堆積してソース電極2
0、直列に接続されるフォトダイオードのp型巣結晶層
17とn+拡散層18とのコンタクト配線部21および
フォトダイオードのn+拡散層18とMOS  FET
のゲート電極8とのコンタクト配線部22とを形成する
Further, as shown in FIGS. 4C and 5C, the polysilicon layer 1 other than the p-type crystal layer 17 of the photodiode is
6 is removed by etching, and an n+ diffusion layer 18 is formed on the surface of the p-type wheel crystal layer 17 by ion implantation, thereby forming a pn junction of the photodiode. Thereafter, a protective film 19 of 5i02 is formed on the surface of the photodiode, and source and gate electrodes and contact holes for the photodiode are formed by photoetching. Then, a high melting point metal or polysilicon is deposited to form the source electrode 2.
0. Contact wiring section 21 between p-type nest crystal layer 17 and n+ diffusion layer 18 of photodiode connected in series, and n+ diffusion layer 18 of photodiode and MOS FET
A contact wiring portion 22 with the gate electrode 8 is formed.

以上の工程により、第1層目のフォトダイオードの形成
を終了する゛。次にこの第1層目のフォトダイオード上
に第2層目のフォトダイオードを第1層目を形成したの
と同様の工程を用いて形成する。このような工程を経て
第1図ないし第3図に示すようなMOS  FET上に
Sol構造によって2層のフォトダイオードが積層され
た光駆動MOS  FETを形成する。
Through the above steps, the formation of the first layer photodiode is completed. Next, a second layer photodiode is formed on this first layer photodiode using the same process as that used for forming the first layer. Through these steps, an optically driven MOS FET is formed in which two layers of photodiodes are stacked on a MOS FET with a Sol structure as shown in FIGS. 1 to 3.

なお、上述したシード部15の位置は、レーザアニール
技術に対して最適な位置に設ければ良い。
In addition, the position of the seed part 15 mentioned above should just be provided at the optimal position with respect to a laser annealing technique.

さらに、たとえば第2層目のフォトダイオードを形成す
るためのシード部は必ずしも基板につながっていなくて
も構わない。
Further, for example, the seed portion for forming the second layer photodiode does not necessarily have to be connected to the substrate.

本実施例による光駆動MO3FETはフォトダイオード
を2層に積層しているので受光効率が上がり、発生する
光起電力が大きくなる。したがって、この光起電力を用
いたMOS  FETのゲート電極の充電時間を短縮す
ることができる。
Since the optically driven MO3FET according to this embodiment has photodiodes stacked in two layers, the light receiving efficiency is increased and the generated photovoltaic force is increased. Therefore, the charging time of the gate electrode of the MOS FET using this photovoltaic force can be shortened.

なお、本実施例ではMOS  FET上に2層のフォダ
イオードを積層した場合について説明したが、さらに多
層のフォトダイオードを積層して受光効率を上げるよう
な構造としてもよい。
In this embodiment, a case has been described in which two layers of photodiodes are stacked on a MOS FET, but a structure may also be adopted in which multiple layers of photodiodes are stacked to increase the light receiving efficiency.

また、本実施例では縦型構造のMOS  FETを用い
て説明したが横型のMOS  FETを用いても構わな
い。
Furthermore, although this embodiment has been described using a vertically structured MOS FET, a horizontal MOS FET may also be used.

[発明の効果] 本発明による光駆動MOS型半導体装置は、MO8型半
導体装置を駆動するための受光素子を、MO8型半導体
装置上に絶縁膜を介して多層に積層した構造を有してい
る。したがって、受光素子の受光効率が高く、MO5型
半導体装置の応答速度の速い光駆動MO8型半導体装置
を実現することができる。
[Effects of the Invention] The optically driven MOS type semiconductor device according to the present invention has a structure in which a light receiving element for driving an MO8 type semiconductor device is laminated in multiple layers on the MO8 type semiconductor device with an insulating film interposed therebetween. . Therefore, it is possible to realize a light-driven MO8 type semiconductor device in which the light receiving efficiency of the light receiving element is high and the response speed of the MO5 type semiconductor device is fast.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による実施例の光駆動MOSFETの平
面図であり、第2図は第1図の切断線■−■の方向から
見た断面図、第3図は第1図の切断線■−■の方向から
見た断面図を示している。 そして第4A図、第4B図、第4C図は第2図に示した
光駆動MO8FETの断面構造をその製造工程順に示し
た断面図であり、第5A図、第5B図、第5C図は、第
3図に示した断面構造をその製造工程順に示した断面図
である。そして、第4A図と第5A図、第4B図と第5
B図、第4C図と第5C図は各々同じ製造工程を示して
いる。 第6図は、従来の光駆動MO8FETの平面図であり、
第7図は、第6図の切断線■−■の方向から見た断面図
を示している。 図において、1はMOS  FET部、2はフォトダイ
オード部、6はn+ソース拡散層、7はゲート絶縁層、
8はゲート電極、14は5LO2膜、17はp型巣結晶
層、18はn+型型数散層20はソース電極、21.2
2はコンタクト配線部を示す。 図中、同一符号は同一または相当する部分を示す。 第4A図 第4B図 第弗図 第5A図
FIG. 1 is a plan view of an optically driven MOSFET according to an embodiment of the present invention, FIG. 2 is a sectional view taken along the cutting line ■-■ in FIG. 1, and FIG. 3 is a cross-sectional view taken along the cutting line in FIG. A cross-sectional view seen from the direction ■-■ is shown. FIGS. 4A, 4B, and 4C are cross-sectional views showing the cross-sectional structure of the optically driven MO8FET shown in FIG. 2 in the order of manufacturing steps, and FIGS. 5A, 5B, and 5C are FIG. 4 is a cross-sectional view showing the cross-sectional structure shown in FIG. 3 in the order of its manufacturing steps. 4A and 5A, 4B and 5.
Figures B, 4C and 5C each show the same manufacturing process. FIG. 6 is a plan view of a conventional optically driven MO8FET,
FIG. 7 shows a cross-sectional view taken from the direction of section line (■--) in FIG. 6. In the figure, 1 is a MOS FET section, 2 is a photodiode section, 6 is an n+ source diffusion layer, 7 is a gate insulating layer,
8 is a gate electrode, 14 is a 5LO2 film, 17 is a p-type nested crystal layer, 18 is an n+ type scattering layer 20 is a source electrode, 21.2
2 indicates a contact wiring section. In the figures, the same reference numerals indicate the same or corresponding parts. Figure 4A Figure 4B Figure 5A

Claims (1)

【特許請求の範囲】  MOS型半導体装置の主面上に受光素子を積層し、前
記受光素子で発生した光起電力を用いてMOS型半導体
装置を駆動させる光駆動MOS型半導体装置において、 前記MOS型半導体装置の主面上に複数の前記受光素子
を各々絶縁膜を介して多層に積層したことを特徴とする
、光駆動MOS型半導体装置。
[Scope of Claims] A light-driven MOS type semiconductor device in which a light receiving element is stacked on a main surface of the MOS type semiconductor device, and the MOS type semiconductor device is driven using a photovoltaic force generated by the light receiving element, comprising: 1. A light-driven MOS type semiconductor device, characterized in that a plurality of the light receiving elements are laminated in multiple layers on a main surface of the type semiconductor device, each with an insulating film interposed therebetween.
JP62335913A 1987-12-29 1987-12-29 Photo-driven mos semiconductor device Pending JPH01175775A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62335913A JPH01175775A (en) 1987-12-29 1987-12-29 Photo-driven mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62335913A JPH01175775A (en) 1987-12-29 1987-12-29 Photo-driven mos semiconductor device

Publications (1)

Publication Number Publication Date
JPH01175775A true JPH01175775A (en) 1989-07-12

Family

ID=18293767

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62335913A Pending JPH01175775A (en) 1987-12-29 1987-12-29 Photo-driven mos semiconductor device

Country Status (1)

Country Link
JP (1) JPH01175775A (en)

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