JPH01270322A - Formation of insulating film - Google Patents
Formation of insulating filmInfo
- Publication number
- JPH01270322A JPH01270322A JP9937888A JP9937888A JPH01270322A JP H01270322 A JPH01270322 A JP H01270322A JP 9937888 A JP9937888 A JP 9937888A JP 9937888 A JP9937888 A JP 9937888A JP H01270322 A JPH01270322 A JP H01270322A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- temperature
- film
- sputtering
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015572 biosynthetic process Effects 0.000 title description 8
- 238000004544 sputter deposition Methods 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 18
- 239000011521 glass Substances 0.000 claims abstract description 16
- 238000010438 heat treatment Methods 0.000 claims abstract description 14
- 239000000203 mixture Substances 0.000 abstract description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000007599 discharging Methods 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 238000005530 etching Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000011068 loading method Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 210000002568 pbsc Anatomy 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052783 alkali metal Inorganic materials 0.000 description 1
- 150000001340 alkali metals Chemical class 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 238000005247 gettering Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000004093 laser heating Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
Landscapes
- Local Oxidation Of Silicon (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置の製造に通用される平坦化された
絶縁膜の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a flattened insulating film that is commonly used in the manufacture of semiconductor devices.
本発明は、絶縁膜の形成方法において、基板を加熱しな
がらスパッタリングし、スパッタ用ガスを放出させなが
らリフローガラスを形成することにより、気胞の発生が
なく且つ堆積とフローを同時に行いその場で平坦化され
た絶縁膜を形成できるようにしたものである。In the method of forming an insulating film, the present invention performs sputtering while heating the substrate and forms reflow glass while releasing sputtering gas, thereby eliminating the generation of air bubbles, performing deposition and flow at the same time, and flattening the glass on the spot. This makes it possible to form a chemically oxidized insulating film.
半導体装置において、多層配線用の層間絶縁膜としては
、例えばPb5G (鉛シリケートガラス)等のりフロ
ーガラスによる平坦化膜が用いられる。In a semiconductor device, a flattening film made of adhesive flow glass such as Pb5G (lead silicate glass) is used as an interlayer insulating film for multilayer wiring.
pbo及び5iOzを含むP b S Gllは、Ar
ガス等のスパッタリング法により堆積膜を形成した後、
所要温度でリフローして形成される。 Pb5G膜は、
pbo 11度として30〜70wt%pbにすること
により 350′″〜600℃の温度でリフローする。P b S Gll containing pbo and 5iOz is Ar
After forming a deposited film by sputtering method such as gas,
It is formed by reflowing at the required temperature. Pb5G film is
Reflow is performed at a temperature of 350'' to 600° C. by adjusting the pbo to 30 to 70 wt% pb at 11 degrees.
又、平坦化膜の他の形成法としては、同一チャンバー内
でスパッタリングによる堆積膜を形成し、次に逆スパツ
タによるエツチングを行って平坦化する方法も知られて
いる。As another method for forming a flattening film, there is also known a method in which a deposited film is formed by sputtering in the same chamber, and then etching is performed by reverse sputtering to flatten the film.
ところで、スパッタリングによるpbsc等の堆積膜を
形成したのち熱処理してリフローする平坦化膜の形成法
においては、常温又はリフロー温度以下でのスパッタリ
ング時に堆積膜中にArガス等の不純物が取り込まれ、
リフローによりArガス等の気胞が発生し均一な膜が得
られない、また均−な腹が得られたとしても、工程的に
堆積膜の形成及びリフロー処理との2工程が必要となり
、時間がかかる。By the way, in the method of forming a flattening film in which a deposited film such as PBSC is formed by sputtering and then heat-treated and reflowed, impurities such as Ar gas are incorporated into the deposited film during sputtering at room temperature or below the reflow temperature.
Reflow generates gas pores such as Ar gas, making it impossible to obtain a uniform film. Even if a uniform film is obtained, two steps are required: forming a deposited film and reflow treatment, which takes time. It takes.
一方、同一チャンバー内で堆MI膜形成とエツチングを
組み合せた方法の場合には、スパッタリング時のステッ
プカバレージの悪さと、エツチングによる形成速度の低
下が避けられない、また、A「等の逆スバ7夕によるエ
ツチングで平坦化の成形を行うと、パーティクルの発生
や堆積膜にヘイズ(割れ)を残し易い、また、RFバイ
アススパッタ等の方法では堆積膜中にダメージが残り°
、これを除去する為には高温(600℃程度以上)のア
ニールが必要である。従って、配線となるAA’形成後
には使用できない、またダメージを無くするためにはバ
イアスを抑える必要があるも、このときには平坦化度は
悪化してしまう。On the other hand, in the case of a method that combines deposited MI film formation and etching in the same chamber, poor step coverage during sputtering and a decrease in formation speed due to etching are unavoidable, and reverse sputtering such as A'' is unavoidable. If flattening is performed by etching using a photoresist, it is likely to generate particles and leave haze (cracks) in the deposited film, while methods such as RF bias sputtering may leave damage in the deposited film.
In order to remove this, high temperature annealing (approximately 600° C. or higher) is required. Therefore, it cannot be used after forming AA', which will become a wiring, and although it is necessary to suppress the bias in order to eliminate damage, the degree of planarization deteriorates at this time.
本発明は、上述の点に謹み、堆積と同時に平坦化して良
質のりフローガラス膜を形成できるようにした絶縁膜の
形成方法を提供するものである。In consideration of the above points, the present invention provides a method for forming an insulating film that can form a high-quality glue-flow glass film by flattening the film at the same time as it is deposited.
本発明は、基板を加熱しなからスパックリングし、スパ
ッタ用ガスを放出させながら基板上にリフローガラスを
形成するようになす。In the present invention, reflow glass is formed on the substrate while sputtering the substrate without heating it and releasing sputtering gas.
基板を加熱しながらスパッタリングするので、常に脱ガ
スの状態でリフローガラス膜が堆積され、且つ同時にフ
ローされて平坦化される。従って、その場で平坦化され
たりフローガラスによる絶縁膜が得られる。脱ガス状態
でリフローガラス膜が堆積するので、リフローガラス膜
中のスパッタ用ガスの含有量も少なく気胞の発生がなく
なり、良質のりフローガラス膜が得られる。又、このよ
うな平坦化絶縁膜を形成する工程も簡略化される。Since sputtering is performed while heating the substrate, a reflow glass film is always deposited in a degassed state, and is simultaneously flowed and flattened. Therefore, an insulating film can be obtained that is planarized on the spot or made of flow glass. Since the reflow glass film is deposited in a degassed state, the content of the sputtering gas in the reflow glass film is small and no air bubbles are generated, resulting in a high quality reflow glass film. Further, the process of forming such a planarizing insulating film is also simplified.
以下、本発明による絶縁膜の形成方法の実施例を説明す
る。Examples of the method for forming an insulating film according to the present invention will be described below.
装置は基板加熱が350℃〜600℃程度まで行えるス
パッタリング装置を用いる。スパッタリングはill常
のものでよく、基板側にRFバイアス。A sputtering device capable of heating the substrate to about 350° C. to 600° C. is used as the device. Sputtering can be done by ordinary illumination, with RF bias on the substrate side.
DCバイアスがかけられなくてもよい、絶縁膜を形成す
べき基板(即ち半導体ウェハ)を搬入する所謂ローディ
ング方法は、オーブンロートでもロードロツタでも良い
、しかし、装置の安定性からはロードロツタが望ましい
、基板加熱は、抵抗加熱、赤外線ランプ加熱、高周波加
熱、レーザ加熱等、いずれでもよい。The so-called loading method for loading the substrate (i.e., semiconductor wafer) on which an insulating film is to be formed, which does not require the application of a DC bias, may be an oven funnel or a load rotor, but from the standpoint of device stability, a load rotor is preferable. The heating may be resistance heating, infrared lamp heating, high frequency heating, laser heating, or the like.
本例は、pbsc誇の形成に通用した場合である。This example is a case in which the formation of PBSC was successful.
先ず、下記の組成のターゲットを用意する。First, a target having the following composition is prepared.
組成
PbO: 30〜70wt%pb
St(h : 50〜20wt%5i
P205 : 4〜8 vt%P
即ち、この組成の中から任意のフロー温度に合せて組成
を選択したターゲットを用いる。スパック装置の基板加
熱は±0.5〜5℃程度の均一な熱を保持してpbsc
がフローする温度に設定して置く。Composition PbO: 30 to 70 wt% pb St (h: 50 to 20 wt% 5i P205: 4 to 8 vt% P In other words, a target whose composition is selected from among these compositions according to an arbitrary flow temperature is used. The substrate is heated by maintaining uniform heat of about ±0.5 to 5 degrees Celsius.
Set the temperature to a point where it flows.
そして、リフローガラスを形成すべき基板をスパッタ室
に搬送し、この基板の加熱温度を設定したフロー温度に
保持する。この状態で上記PbO−5i(h−P205
ターゲントをスパッタリングして、基板上に堆積させる
。このとき、基板温度がフロー温度に設定されているた
め、基板上に)’bSGの堆積と同時にフローされ、そ
の場で平坦化されたPb5C膜が形成される。しかる後
、基板を搬出して冷却し、キャリアカセントに戻す。Then, the substrate on which reflow glass is to be formed is transported to a sputtering chamber, and the heating temperature of this substrate is maintained at a set flow temperature. In this state, the above PbO-5i (h-P205
A target is sputtered and deposited onto the substrate. At this time, since the substrate temperature is set to the flow temperature, the Pb5C film is flowed on the substrate at the same time as the )'bSG is deposited, and a flattened Pb5C film is formed on the spot. Thereafter, the substrate is taken out, cooled, and returned to the carrier socket.
上述の方法によれば、Pb5Gのフロー温度に基板を加
熱しながらスパッタリングするので、常に説ガスの状態
でPb5G膜が堆積され、且つ同時に平坦化される。従
って、得られたPb5Glfiはスバフタ用の例えばA
r含有量も少なく気胞の発生がなくなり良質の膜となる
。スパッタリングと同時にフローされるのでその場合で
平坦化Pb5G膜が得られ、工程も簡略化することがで
きる。平坦化p b s GM’Aの形成速度も通市の
スパッタリング形成と同−速度で行える。また、パーテ
ィクルやヘイズの発生が少なく、Pb5G膜に対して従
来法のようなArfiスパッタによるダメージ、Ar含
有量が少なくできる。According to the above method, since sputtering is performed while heating the substrate to the flow temperature of Pb5G, the Pb5G film is always deposited in a gaseous state and is flattened at the same time. Therefore, the obtained Pb5Glfi can be used for example A
The r content is also low, and the formation of air spores is eliminated, resulting in a high-quality film. Since it is flowed simultaneously with sputtering, a flattened Pb5G film can be obtained in that case, and the process can also be simplified. The flattened p b s GM'A can be formed at the same speed as the Toichi sputtering process. In addition, fewer particles and haze are generated, and damage to the Pb5G film caused by Arfi sputtering as in the conventional method and Ar content can be reduced.
ターゲットにP2O5を4〜8wt%Pを入れることに
より、アルカリ金属不純物に対するゲッタリング効果が
同時に得られる。By adding 4 to 8 wt% of P2O5 to the target, a gettering effect on alkali metal impurities can be obtained at the same time.
特に本性ではPb5G膜の形成と同時に平坦化されるの
で、多層配線の眉間絶縁膜の形成に通用して好適である
。Al配線上の眉間絶縁膜として使用するときは、基板
温度としては500℃程度までが望ましい。In particular, since it is planarized at the same time as the formation of the Pb5G film, it is suitable for forming an insulating film between the eyebrows of multilayer wiring. When used as a glabellar insulating film on Al wiring, the substrate temperature is desirably up to about 500°C.
面、上潮では低温でリフローできるPb5Glliの形
成に通用したが、その他のりフローガラスによる絶縁膜
の形成にも通用できる。Although the method was applicable to the formation of Pb5Glli, which can be reflowed at low temperatures, it can also be applied to the formation of insulating films using other reflow glasses.
本発明によれば、基板を加熱しながらスパッタリングし
、リフミーガラスを形成するので、堆積とフローが同時
になされ、■工程で平坦化絶縁膜が得られる。そして、
このスパッタリングではスバンタ用ガスが放出されなが
ら堆積するので、得られた絶縁膜はガス合有量は少なく
気胞の発生がなく、良質の秩となる。従って、本発明は
特に半導体装置の多層配線の眉間絶縁膜の形成に通用し
て好適ならしめるものである。According to the present invention, since the substrate is sputtered while heating to form the rifumi glass, deposition and flow are performed simultaneously, and a flattened insulating film can be obtained in step (2). and,
In this sputtering, the svanta gas is released while being deposited, so the resulting insulating film has a small amount of gas and no air bubbles, resulting in a high-quality film. Therefore, the present invention is particularly suitable for forming glabellar insulating films for multilayer wiring in semiconductor devices.
Claims (1)
スを放出させながらリフローガラスを形成することを特
徴とする絶縁膜の形成方法。A method for forming an insulating film, which comprises sputtering a substrate while heating it and forming reflow glass while releasing a sputtering gas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63099378A JP2737147B2 (en) | 1988-04-22 | 1988-04-22 | Method of forming insulating film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63099378A JP2737147B2 (en) | 1988-04-22 | 1988-04-22 | Method of forming insulating film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01270322A true JPH01270322A (en) | 1989-10-27 |
| JP2737147B2 JP2737147B2 (en) | 1998-04-08 |
Family
ID=14245864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63099378A Expired - Fee Related JP2737147B2 (en) | 1988-04-22 | 1988-04-22 | Method of forming insulating film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2737147B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7951689B2 (en) | 2007-09-14 | 2011-05-31 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate and method for manufacturing semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58132A (en) * | 1981-06-25 | 1983-01-05 | Nippon Telegr & Teleph Corp <Ntt> | Forming method for oxide glass thin-film |
-
1988
- 1988-04-22 JP JP63099378A patent/JP2737147B2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58132A (en) * | 1981-06-25 | 1983-01-05 | Nippon Telegr & Teleph Corp <Ntt> | Forming method for oxide glass thin-film |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7951689B2 (en) | 2007-09-14 | 2011-05-31 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate and method for manufacturing semiconductor device |
| US8399337B2 (en) | 2007-09-14 | 2013-03-19 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate and method for manufacturing semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2737147B2 (en) | 1998-04-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |