JPH01272139A - Forming method of multilayer interconnection - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method of forming aluminum multilayer wiring in a semiconductor integrated circuit device.

(Prior Art) As semiconductor integrated circuit devices become smaller, faster, and more highly integrated, wiring becomes multilayered.

Furthermore, aluminum (including aluminum alloys) has become mainstream as a wiring material. .

Problems that need to be improved in aluminum multilayer wiring are planarization of the wiring layer, prevention of aluminum hillocks, and improvement of migration withstand voltage.

Planarization of the wiring layer is necessary to prevent short circuits and disconnections of the wiring. The planarization method is to form an insulating film on the lower wiring, perform anisotropic etching to leave the insulating film on the side walls of the wiring, and then form an insulating film between the eyebrows on top of it to flatten the surface of the insulating film. A so-called etch-back method is used. However, the etch-back method using an insulating film is not effective in preventing hillocks of aluminum wiring or improving migration breakdown voltage.

On the other hand, methods for preventing hillocks and improving migration breakdown voltage of aluminum wiring include a method of selectively depositing tungsten on the surface of the aluminum wiring, and a method of creating a wiring with a two-layer structure of aluminum and tungsten. but,
These methods do not have the effect of flattening the glabellar insulating film.

(Objective) An object of the present invention is to provide a method capable of flattening the surface of the glabellar insulating film, preventing hillocks of aluminum wiring, and improving migration withstand voltage through a simple process.

(Structure) The method of the present invention includes the following steps (A) to (E).

(A) a step of forming a lower layer aluminum wiring; (B) a step of selectively forming a material effective against hillocks and migration of the aluminum wiring on the surface of the aluminum wiring by controlling the conditions of the CVD method; (C) ) forming the material on the entire surface of the wafer by changing the conditions of the CVD process; (D) leaving the material on the top surface and sidewalls of the aluminum wiring by anisotropic etching; (E) /i! iI
A process of forming upper layer aluminum wiring through an interlayer insulating film.

Materials that are effective against hillocks and migration include tungsten (W), titanium (Ti), and copper (C).
u) etc. can be used.

By leaving a material effective against hillocks and migration on the sidewalls of the lower aluminum wiring, the surface of the interlayer insulating film formed thereon can be flattened.

Further, by covering the aluminum wiring surface with the above material, hillocks can be prevented and migration withstand voltage can be increased.

Examples will be specifically described below.

As shown in FIG. 1, a PSG film 2, which is an interlayer insulating film, is formed on a silicon substrate 1 on which transistors and the like are formed, and a PSG film 2 with a thickness of 6 mm is formed by a normal process.
A lower layer aluminum interconnection 3 of approximately 0.0000000000000000000000000000000000000 or less lower layer aluminum interconnections 3 are formed, and the aluminum interconnections 3 are connected to elements such as transistors through contact holes in the interlayer insulating film 2.

Thereafter, as shown in FIG. 2, a tungsten film 4 is selectively deposited on the surface of the aluminum wiring 3. The LPCVD method is used for selectively depositing the tungsten film 4. WF and H2 gas are used as reaction gases, and the flow rate of H2 is increased in order to increase selectivity. This selective deposition of tungsten onto aluminum surfaces is a well known method. In this method, the tungsten film 4 is
Deposit to a thickness of about 0.00.

After that, reduce the flow rate of H2. This reduces the selectivity of tungsten deposition and causes tungsten to be deposited over the entire silicon wafer.

5 is a tungsten film deposited non-selectively in this way, and its thickness is 6, which is about the same as that of the aluminum wiring 3.
About 000 people go down.

Next, anisotropic plasma etching is performed to etch back the tungsten film 5. As the gas for anisotropic etching of the tungsten film 4, a gas prepared by adding CBrF to SF6 is used. The thickness of the etch-back film is approximately 7,000 mm so that short circuits between the lower aluminum wiring lines 3 can be completely suppressed and a tungsten film remains on the aluminum wiring lines 3.

As a result, as shown in FIG. 3, the surface of the aluminum wiring 3 is surrounded by the tungsten film 4, and the tungsten film 5a remains on the side wall.

Then follow the normal process. For example, by PECVD or LPCVD, a glabellar insulating film such as a PSG film or a BPSG film is deposited. The presence of the side wall 5a flattens the surface of the glabellar insulating film. A contact hole is formed in the interlayer insulating film, and an upper layer aluminum wiring is formed on the interlayer insulating film.

For example, the space of the lower aluminum wiring 3 is 2.0 μm.
In this case, the interlayer insulating film can obtain a step coverage of 50% or more.

The example shows a case where the aluminum wiring has two layers, but if the aluminum wiring is to be formed in more layers, the upper layer of aluminum wiring is covered with a tungsten film as in the example, and the tungsten film is left on the side wall. After that, an interlayer insulating film is deposited, a contact hole is opened, and then an upper layer of aluminum wiring is formed thereon.

(Effects) In the present invention, the surface of the lower layer aluminum wiring is covered with a material such as tungsten that is effective against hillocks and migration, and the material is left on the sidewall as a sidewall to form a layer on top of the surface. Since the surface of the glabellar insulating film is flattened, it is possible to flatten the multilayer wiring, prevent hillocks of the aluminum wiring, and take measures against migration in the same process, thereby avoiding complication of the manufacturing process.

We also perform etchback of materials such as tungsten. When the material is selectively deposited on the surface of the aluminum wiring, it may grow abnormally on the insulating film, and if it remains, it will cause a short circuit between the aluminum wiring later, but it can be removed by etchback. This eliminates the problem of short circuits.

[Brief explanation of the drawing]

FIGS. 1, 2, and 3 are cross-sectional views showing one embodiment in the order of steps. 3... Lower layer aluminum wiring, 4...
Selectively deposited tungsten film, 5... Tungsten film non-selectively deposited, 5a... Tungsten film on side wall.

Claims (2)

[Claims] (1) A method for forming a multilayer wiring including the following steps (A) to (E). (A) A step of forming a lower layer aluminum wiring; (B) A step of selectively forming a material effective against hillocks and migration of the aluminum wiring on the surface of the aluminum wiring by controlling the conditions of the CVD method; (C ) forming the material on the entire surface of the wafer by changing the conditions of the CVD method; (D) leaving the material on the top surface and sidewalls of the aluminum wiring by anisotropic etching; Process of forming upper layer aluminum wiring. (2) The method for forming a multilayer wiring according to claim 1, wherein the material is tungsten.