JPH01273178A - LSI mask pattern layout system using Shrink Cell - Google Patents

Abstract

PURPOSE:To execute the layout of an LSI mask pattern in a short period by providing a function for shrinking uniformly and using a designed mask pattern, and a function for extracting a mask pattern of a contact transistor part, bringing it to over/under size processing and executing an automatic correction so as not to violate a design reference rule. CONSTITUTION:In order to execute a layout of an LSI mask pattern by shrinking uniformly a designed mask pattern, a mask pattern of a contact transistor part is extracted from the designed mask pattern by using an exclusive operation processor 5. Subsequently, the mask pattern of the contact transistor part which has been extracted is brought to over/under size processing by using a central operation processor 1. Also, in the mask pattern which has been brought to over/under size processing, a part for violating a design reference rule is corrected automatically by the exclusive operation processor 5, shrunk uniformly and a mask pattern cell which can execute a layout of the mask pattern is generated. In such a way, the LSI mask pattern can be obtained in a short period.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention provides a method for shrinking a pre-designed mask pattern.
(Reduced) This relates to the LSI mask pattern layout system used.

[Conventional technology]

Figures 5 to 7 show conventional shrink cells and LS.
71[', FIG. 5 is a block diagram showing the layout system. In the figure, (1) is a central processing unit, (2) n L E
(3) is a keyboard device for inputting commands to manually modify the already designed mask pattern; (4) is the LSI mask pattern configured by modifying the already designed mask pattern; This is a magnetic disk device that stores. FIG. 6 is a flowchart of the layout system, and FIG. 7 is a schematic diagram showing the structure of an L8 emask pattern.

Next, the operation will be explained. The mask patterns for the I and S processes have a hierarchical structure as shown in Fig. 7, and the pre-designed I mask patterns stored in the magnetic disk device (4) K are processed using the central processing unit (1). , graphic display device (2) Kff is shown. Next, a modification command is inputted using the keyboard device (3) and the already designed LSI mask pattern is modified using the central processing unit (1) so that it conforms to the new design standard. 6th
The figure shows a flowchart of the operation.

[Problem to be solved by the invention]

The conventional layout system was purchased as described above, so when changing to the design standard of the already designed 18 emask pattern ti, the correction work was done manually, which caused the problem that it took a lot of time. There is a countermeasure for that! 1! It was a question.

This invention was made in order to solve the above-mentioned problems, and it has a function of shrinking a pre-designed mask pattern and using it, and a design standard rule/L/ The purpose of this invention is to obtain a layout system with a function to automatically correct mask patterns that violate the rules.

[Means to solve the problem]

The layout system according to the present invention extracts a mask pattern t-of a function, contact, and transistor part by shrinking a pre-designed mask pattern and using it.
It is equipped with functions for automatically correcting oversize and undersize processing so as not to violate design standard rules.

[Effect]

The layout system in this invention performs oversize and undersize processing on the already designed mask pattern, contacts,
A new L8 emask pattern is generated by automatically extracting transistor parts and automatically correcting parts that violate design standard rules.

〔Example〕

1 to 4 relate to an embodiment of the layout system according to the present invention, and FIG. 1 is a block diagram of the layout system. In the figure, (1) is the central processing unit, (2) is the already designed LSI mask pattern, the already designed mask pattern is oversized and undersized, and the contact and transistor parts are automatically extracted and automatically corrected to create a new one. Generation 1 is a graphic display device that displays the Ls mask pattern. (3) is an over/undersize processing command, a contact, and a transistor part extraction command.

A keyboard device for inputting automatic correction instructions; (4) a magnetic disk device for storing already designed mask patterns and mask patterns newly generated by the above processing; (5) automatic extraction and automatic extraction of contacts and transistor parts; A dedicated processing unit that performs corrections and generates new mask patterns; the graphic display device (2), keyboard device (3), and magnetic disk device (4) are connected to the central processing unit (1), and the keyboard device (3) and the magnetic disk device (4) are connected to a dedicated arithmetic processing unit (5). FIG. 2 is a flowchart of the layout system, FIG. 3 is a diagram schematically showing the operation of the layout system, and FIG. 4 is a schematic diagram showing the concept of the layout system.

Next, the operation will be explained. 'The LSI mask pattern has a conventional pattern as shown in FIG. 7. below,
The layout system flow t-i2 will be described according to the diagram. A pre-designed L8 emask pattern stored in a magnetic disk device (4) is displayed on a graphic display device (2) using a central processing device (1). Next, as shown in FIG. 4, in order to perform the LSI mass pattern layout by shrinking the already designed mask pattern, the dedicated arithmetic processing unit (5
) to extract the mask pattern of the contact and transistor parts. Next, the extracted contact and transistor mask patterns are processed by the central processing unit (
1) Use t- to handle over/amp size. Furthermore, in the mask pattern after over/amplification processing, parts that violate the design standard rules are automatically corrected by a dedicated arithmetic processing unit (5) IC, and the mask pattern 7 is made into a mask pattern that can be shrinked by -rate and re-plated. generate.

Execution commands for each process are input from the keyboard @ (3).

In the above example, the pre-designed L8 Emmas pattern color,
The model shown above is equipped with a dedicated processing unit (5)K that automatically extracts contact and transistor parts and automatically corrects mask patterns that violate design standard rules. good.

〔Effect of the invention〕

As described above, 1. According to the present invention, the mask pattern of the contact and transistor portions is automatically extracted and corrected without manually modifying the designed LSI mask pattern.
Since cells that can be used by shrinking can be generated, there is an effect that L8 emask pattern layout can be done in a short time.

[Brief explanation of the drawing]

1 to 4 relate to an embodiment of the layout system according to the present invention, in which FIG. 1 is a block diagram of the layout system, FIG. 2 is a flowchart of the layout system, and FIG. 3 shows the operation of the layout system. FIG. 4 is a schematic diagram showing the concept of the layout system. Figures 5 to 7 relate to an example of a conventional layout system, in which Figure 51 is a block diagram of the layout system, Figure 6 is a flowchart of the layout system, and Figure 7 is a schematic diagram showing the structure of an LSI mask butter. It is. In the figure, (1) is the central processing unit, (2) is the graphic display device, (3) is the keyboard device, and (4) is the
) is a magnetic disk device, and (5) is a dedicated arithmetic processing unit. 0 In the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] In LSI pattern layout design, there is a function to shrink (reduce) already designed mask pattern cell data with different design standards and to use mask pattern data that violates design standard rules due to the use of shrink cells. An LSI mask pattern layout system using shrink cells, characterized by having an automatic correction function.