JPH0191417A - Semiconductor device and manufacture thereof - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and a method for manufacturing the same, and particularly to a thin film vapor phase growth method suitable for reducing contact resistance between conductor or semiconductor layers.

[Conventional technology]

2. Description of the Related Art Conventionally, in a semiconductor device such as an LSI, various wirings are provided inside or on the surface of a semiconductor substrate to form a circuit, and the wirings are connected to each other in a predetermined region.

For example, in a stacked capacitor type dynamic RAM manufactured using a Si substrate, S is used to form the stacked capacitor.
A structure in which polycrystalline Si is stacked and deposited on an n-type impurity region formed in a predetermined region of an i-substrate and is used as the lower electrode of a capacitive part, that is, a structure in which the Si substrate and polycrystalline Si are in contact is often used. . Also, for example, emitsuta, bass,
In bipolar type 1, SI, which consists of a collector,
A method of in-phase diffusion of impurities from polycrystalline Si formed on a Si substrate is often used to form an emitter, and contact between the Si substrate and polycrystalline Si is also utilized here. In addition, a relatively new technology that utilizes contact between Si and Si involves converting amorphous Si formed in a silicon star crystal into a single crystal through subsequent heat treatment. The so-called S○■ technology is attracting attention. Regarding this, the Institute of Electronics and Communication Engineers Technical Research Report 5S
D83-143. An example is given on pages 13 to 18, in which a method for removing an oxide film at the interface, which is a problem when amorphous Si is made into a single crystal, by hydrogen annealing is explained.

In addition to the contact between Si and Si described above, contacts made of various materials such as Si metal silicide and Si and metal have been used in recent LSI 1 manufacturing processes.

[Problem that the invention seeks to solve]

The thin film of polycrystalline Si or the like formed on the substrate in the conventional technique is usually formed by the Wake growth method.

When polycrystalline or amorphous Si is formed on single-crystal or polycrystalline Si using this vapor phase growth method, the substrate surface is An oxide film is always formed on the surface. The contact used in the conventional technology was, for example, not an interface between Si and Si, but an interface with SiOx interposed therebetween. The SiO2 film thickness is IQ16-10
On Si with a relatively low concentration of 16-8 impurities, it is about 1.0 to 15 people, but on Si with a high concentration of impurities on the order of IQ"an-', it is 20 to 25 people. SiO2 is formed, and in extreme cases it can reach as many as 50 layers.SiO2 existing at this interface causes problems such as poor conductivity and a barrier to in-phase diffusion of impurities, causing variations in the depth of the diffusion layer. Furthermore, due to poor adhesion, Si
This has caused problems such as peeling of the film formed thereon.

An object of the present invention is to provide a semiconductor device having a contact structure in which a desired thin film is formed after removing the oxide present at the interface and eliminates the adverse effects of the oxide, and a method for manufacturing the same.

[Means for Solving Problems] The above purpose is to expose the substrate to active oxygen or ozone after inserting the substrate into the FJF film forming apparatus, and then to expose the substrate to active oxygen or ozone at a temperature of 500°C or more. After performing treatment by either ion beam irradiation or helium ion irradiation at room temperature and heating to a temperature of 500°C or higher, the substrate is continuously controlled to a predetermined temperature. This is achieved by forming the desired thin film.

[Effect]

By first exposing the JL plate to active oxygen or ozone, carbon adsorbed on the substrate surface is removed. Subsequently, by using hydrogen ion beam irradiation or helium ion irradiation, the oxide formed on the substrate coating 1flj is removed, and the surface of the substrate is exposed. Further, since the thin film is continuously formed, a boundary t61 can be obtained in which the oxide of the substrate is not interposed between the film and the substrate.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

An example in which the present invention is applied to a memory cell portion of a stacked capacitive dynamic RAM using MO5 type transistors will be described. As shown in Figure 2, (100) of P type
5i02 with a thickness of 500 nm to serve as an isolation region on the surface of the Sj substrate 1 with a specific resistance of 10 Ω·■ and a plane orientation.
2 and 5iOz3 with a thickness of 20 nm to serve as the gate oxide film.
was formed. Next, a thickness of 200 nm was obtained using the vapor phase growth method.
Polycrystalline Si4 was formed. As the conditions, monosilane (SiH4) was used as the gas, and the pressure was Q, 8 Torr,
The temperature was 620°C. Next, the concentration in polycrystalline Si4 was reduced to 5 × 10 by thermal diffusion method using P OCQ s as a raw material gas.
Phosphorus diffusion was performed to obtain a ratio of about 20(1)-3.

Next, a step of forming tungsten silicide (WSi2) was started, in which an eight-film forming method, which is the gist of the present invention, was used.

First, the phosphorus glass film formed on the surface of polycrystalline Si4 during phosphorus diffusion is removed by etching with a hydrofluoric acid solution, washed with water,
After a drying process, it was placed in a vacuum container. At this stage, there are 25 5iOz films (not shown) on the surface of the polycrystalline Si4.
was formed. Once inside the vacuum container, 2 x 10”-
After evacuation to 7 Torr, ozone was introduced for 10 minutes at a pressure of 100 Torr to remove carbon components on the surface of polycrystalline Si4. Next, place the vacuum container 1x
At the same time, the Si substrate 1 is evacuated to 10-7 Torr.
The temperature was raised to 500℃ and the temperature was increased to 5
Hydrogen was introduced so that the hydrogen ion beam was applied to the surface of the polycrystalline Si4 for 10 minutes at an acceleration voltage of 1 kV. As a result, a thickness of 25 5if2. was removed. Continue 2 x 1
The temperature of the Si substrate 1 was lowered to 360°C in an atmosphere of 0''-7 Torr, Si H51000cc/min, tungsten hexafluoride (WFg) 5g/win was introduced, and the pressure was 0.
, 2 Torr, a 300 nm thick WSiz film 5 was formed (FIG. 2(a)).

Next, heat treatment was performed at 850° C. for 20 minutes in an argon atmosphere. Further, Si 026 was deposited to a thickness of 300 nm using a vapor phase growth method using SiH+ and oxygen as source gases. Next, 5iO26, WSiz5. Polycrystalline Si4
A gate region consisting of a three-layer structure was formed (Fig. 2(b)
)). Next, SiO27 with a thickness of 250 nm was deposited by low pressure vapor phase growth using SiH4 and NzO as source gases. The conditions are pressure 0.8 Torr temperature 800
℃. next.

The surface of the Si substrate 1 was exposed by etching the entire surface using an anisotropic dry etching method. At this time, 5iOz7 was left on the side surfaces of the gate region having a three-layer structure (FIG. 2(C)).

Next, in order to remove contamination during dry etching, the exposed surface of the Si substrate 1 was etched for about 5 m using a cleaning solution mainly containing hydrogen peroxide and ammonia, and then an extremely thin 5iOz layer was etched using hydrofluoric acid. Removed by etching. In that state, a thickness of 10n was formed using thermal oxidation method.
5i028 of m was formed on the exposed surface of the Si substrate 1. Next, arsenic was introduced into the Si substrate 1 by ion implantation. Conditions are 80keV, 5X101δ country'''2
And so.

Subsequently, after removing surface contamination during implantation, it was heated at 950°C for 1
A heat treatment was performed in a nitrogen atmosphere for 0 minutes to form a source region 9 and a drain region 10 consisting of an n-type impurity diffusion layer (FIG. 2(d)).

Next, the step of forming the multilayer Mjt electrode was started, and the film forming method that is the gist of the present invention was applied here as well. First, 5iO18 formed on the surface of the source 9 was removed by etching by lithography, and then the 81 substrate was inserted and placed in a vacuum container in the same manner as in the case of forming W S j25. At this stage, 20 5iOz particles were formed on the surface of the Si substrate J. - After first evacuation to 2X 10"-7 Torr, ozone was introduced for 10 minutes at a pressure of 100 Torr to remove carbon components on the surface of the Si substrate 1. Next, the inside of the vacuum vessel was evacuated to 2X 10"-7 Torr. Simultaneously, the Si substrate 1 was evacuated to -7 Torr, heated to 620° C., hydrogen was introduced to 5×10 −5 Torr, and the surface of the Si substrate 1 was irradiated with a hydrogen ion beam for 10 minutes at an acceleration voltage of 1 kV. 5iOz with a thickness of 20 layers existing on the surface of the Si substrate 1 was removed by evacuating to 2 x 10-7 Torr.
S x Ha was introduced at a pressure of 8 Torr, and polycrystalline Si 1-1 with a thickness of 350 nm was deposited by vapor phase growth. Next, impurities were introduced into the polycrystal 5511 by phosphorus diffusion, and a desired pattern was formed by lithography and dry etching to form the lower electrode of the laminated capacitor (FIG. 2(e)).

After that, polycrystalline 5ill to be used as the lower electrode is processed by thermal oxidation method.
A 20 nm thick S i 0212 was formed on the surface of the capacitor to form a capacitor. Further, polycrystalline Si 13 with a J-ripsis of 300 nm was deposited using a vapor phase growth method, and a desired pattern was formed by lithography and dry etching. Further, a 400 nm thick phosphor glass 4 was formed by vapor phase epitaxy, and a contact hole 1 was formed on the drain 10 region by photolithography and dry etching. Next, 1 Si was added by sputtering method.
Aluminum (AQ) film 1 with a thickness of 900 nm containing %
5 was formed, and AQ wiring was formed by lithography and dry etching (FIG. 1). By completing the above steps, a memory cell consisting of a combination of one MO8 type transistor and one capacitor was constructed.

According to this example, since 5iOz is not present at the interface between WSix5 and polycrystalline Si4, adhesion can be significantly improved, and peeling of Wsiz5, which has been a problem in the past, can be prevented. In addition, since no SiO2 is present at the interface between the polycrystalline 5ill and the Si substrate 1, the contact resistance can be significantly improved, making it easier to transfer the accumulated signal charge between the laminated capacitor section and a part of the transistor. It has the effect of improving the operating performance of.

Note that in this example, extremely thin SiOx was removed by a method using a hydrogen ion beam, but the same effect on removing 5iOz can also be obtained by irradiating helium ions at room temperature and then increasing the temperature. It is possible,
A contact of 5 iOz free interfacial state can be obtained.

Furthermore, in this embodiment, the contact between WSix and polycrystalline Si and the contact between polycrystalline Si and a Si substrate have been described, but the gist of the present invention is not limited to these materials.
i, metal nitrides such as titanium nitride, or Ga A
This method is also effective when metal compounds such as S or metals such as W are brought into contact with each other.

〔Effect of the invention〕

According to the present invention, it is possible to obtain a contact between a conductor or a semiconductor by removing the oxide at the interface.
It has the effect of improving the adhesion of the thin film and improving the manufacturing yield in the manufacturing process of semiconductor devices. Furthermore, since the contact resistance can be reduced from the conventional several to several tens of MΩ to several Ω, there is a great effect on improving the performance of the device.

[Brief explanation of the drawing]

FIGS. 1 and 2 (a) to (e) are cross sections showing a series of steps for explaining one embodiment of the present invention. 1 爾 2 Figure (ku) 2nd concave (Cn (phantom)

Claims (1)

[Claims] 1. In a semiconductor device that requires contact between a first conductor or semiconductor and a second conductor or semiconductor, an extremely thin oxide existing on the surface of the first conductor or semiconductor is removed; A semiconductor device characterized in that a first conductor or semiconductor and the second conductor or semiconductor are brought into contact. 2. The first conductor or semiconductor is a Si substrate. It is characterized in that it contains polycrystalline Si, metal silicide, metal nitride, metal compound, and metal, and the second conductor or semiconductor contains polycrystalline Si, amorphous Si, metal silicide, metal nitride, and metal. A semiconductor device according to claim 1. 3. After placing the substrate in which at least a portion of the first conductor or semiconductor is exposed on the surface in a vacuum apparatus, a process is performed to remove an extremely thin naturally grown oxide film existing on the surface of the conductor or semiconductor. 1. A method for manufacturing a semiconductor device, comprising at least the step of forming a second conductor or semiconductor by holding the substrate at a predetermined temperature and introducing a desired gas.