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JPH02190015A - Common amplifier circuit - Google Patents

Common amplifier circuit

Info

Publication number
JPH02190015A
JPH02190015A JP1009212A JP921289A JPH02190015A JP H02190015 A JPH02190015 A JP H02190015A JP 1009212 A JP1009212 A JP 1009212A JP 921289 A JP921289 A JP 921289A JP H02190015 A JPH02190015 A JP H02190015A
Authority
JP
Japan
Prior art keywords
amplifiers
signal
amplifier
branched
deterioration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1009212A
Other languages
Japanese (ja)
Inventor
Naomitsu Noguchi
尚充 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1009212A priority Critical patent/JPH02190015A/en
Publication of JPH02190015A publication Critical patent/JPH02190015A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To improve the reliability and to reduce the deterioration in the characteristic due to a fault of an amplifier by providing distributers branching an input signal into 2<n> ((n) is an integer being two or over), 2<n> sets of amplifiers amplifying independently of each branched signal, and synthesizers synthesizing the 2<n> sets of signals from the amplifiers in in-phase. CONSTITUTION:A signal inputted to an input terminal 11 is branched into two by a distributer 3A, branched respectively into two at distributers 3B, 3C and the branched signals are amplified respectively independently by four amplifiers 1A-1D. The signal from the amplifiers 1A, 1B is synthesized and the signal from synthesizers 4A, 4B is synthesized in in-phase by synthesizers 4B, 4C respectively and the resulting signal is outputted as one signal from an output terminal 12. If one of the four amplifiers 1A-1D is faulty, the other three amplifiers are used for the amplification. Thus, attended with the increase in the number of the amplifiers, the lead of each amplifier is relieved and the deterioration in the gain in the event of a fault of one amplifier is reduced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は複数システムの受信装置に入力する複数の信号
を共通に増幅する回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit that commonly amplifies a plurality of signals input to receiving devices of a plurality of systems.

〔従来の技術〕[Conventional technology]

従来、この種の共通増幅回路では、2つの増幅器を並列
運転させる構成がとられており、1つの増幅器が故障し
たときに、受信系全体が故障して伝送系が途絶する事態
が発生することがないようにしている。即ち、第5図に
示すように、入力端子11から入力される入力信号を分
配器3において2つの信号に分岐し、夫々を2つの増幅
器IA。
Conventionally, this type of common amplifier circuit has a configuration in which two amplifiers are operated in parallel, and if one amplifier fails, the entire receiving system will fail and the transmission system will be disrupted. I try not to have any. That is, as shown in FIG. 5, the input signal input from the input terminal 11 is split into two signals by the divider 3, and each signal is sent to two amplifiers IA.

IBにより独立して増幅させる。そして、増幅された各
信号を合成器4において同相に合成し、出力端子12か
ら出力させる構成となっている。
Amplify independently by IB. The amplified signals are then combined into the same phase by the combiner 4 and outputted from the output terminal 12.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の共通増幅器では、2つの増幅器IA、I
Bの中の1台の増幅器が故障した場合には、他方の増幅
器で増幅を行うため、信号を継続して出力することがで
き、伝送系での信号断を防止できる。しかしながら、一
方の増幅器が故障したことにより、その分受信機におけ
る雑音指数(NF)が劣化され易く、また受信機の入力
レベルの低下によりS/Nが劣化されるという問題があ
る。
In the conventional common amplifier mentioned above, two amplifiers IA, I
If one of the amplifiers in B fails, the other amplifier performs amplification, so the signal can be output continuously and signal interruption in the transmission system can be prevented. However, there are problems in that when one amplifier fails, the noise figure (NF) in the receiver tends to deteriorate accordingly, and the S/N ratio deteriorates due to a decrease in the input level of the receiver.

因みに、上述の構成では、利得の低下が6dB。Incidentally, in the above configuration, the gain decreases by 6 dB.

NFの劣化が3dBであった。The deterioration of NF was 3 dB.

本発明は増幅回路の信転性を向上し、増幅器の故障によ
る特性劣化を低減することができる共通増幅回路を提供
することを目的とする。
An object of the present invention is to provide a common amplifier circuit that can improve reliability of the amplifier circuit and reduce characteristic deterioration due to amplifier failure.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の共通増幅回路は、入力信号を2”  (nは2
以上の整数)個に分岐する分配器と、分岐された各信号
を夫々独立して増幅する2fi個の増幅器と、各増幅器
からの2n個の信号を同相合成する合成器とで構成して
いる。
The common amplifier circuit of the present invention has an input signal of 2" (n is 2").
It consists of a divider that branches into (the above integer number), 2fi amplifiers that independently amplify each branched signal, and a combiner that combines the 2n signals from each amplifier in phase. .

また、2n個の増幅器の夫々に該増幅器の駆動電流を検
出する駆動電流検出回路を設けている。
Further, each of the 2n amplifiers is provided with a drive current detection circuit for detecting the drive current of the amplifier.

〔作用〕[Effect]

上述した構成では、増幅器の数の増大に伴って各増幅器
の負担を軽減し、1台の増幅器が故障した際の利得やN
Fの劣化を低減する。
In the above configuration, as the number of amplifiers increases, the load on each amplifier is reduced, and the gain and N
Reduces F deterioration.

また、駆動電流検出回路により、各増幅器の故障を早期
に或いは未然に発見することが可能となり、伝送系の瞬
断率を低下させる。
Furthermore, the drive current detection circuit makes it possible to discover failures in each amplifier early or before they occur, thereby reducing the instantaneous interruption rate of the transmission system.

(実施例) 次に、本発明を図面を参照して説明する。(Example) Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例のブロック回路図である。図
において、入力端子11に入力される信号は、分配器3
Aで2つに分岐され、更に各信号は分配器3B、3Cに
おいて夫々2つに分岐され、結果として4つに分岐され
る。そして、各分岐された信号は4つの増幅器IA〜I
Dによって夫々独立して増幅される。
FIG. 1 is a block circuit diagram of one embodiment of the present invention. In the figure, the signal input to the input terminal 11 is transmitted to the distributor 3
The signal is branched into two at A, and each signal is further branched into two at distributors 3B and 3C, resulting in four branches. Then, each branched signal is transmitted through four amplifiers IA to I.
They are each independently amplified by D.

増幅された信号の中、増幅器IA、IBの信号は合成器
4Aにより合成され、増幅器IC,LDの信号は合成器
4Bにより同相に合成される。更に、各合成器4A、4
Bの信号は合成器4Cにより同相に合成され、1つの信
号として出力端子12から出力される。
Among the amplified signals, the signals from amplifiers IA and IB are combined by a combiner 4A, and the signals from amplifiers IC and LD are combined in phase by a combiner 4B. Furthermore, each synthesizer 4A, 4
The B signals are combined in phase by the combiner 4C and outputted from the output terminal 12 as one signal.

なお、前記各増幅器IA〜IDは夫々独立したものであ
り、したがって独立して交換可能であることは言うまで
もない。
It goes without saying that each of the amplifiers IA to ID is independent and therefore can be replaced independently.

この構成によれば、4台の増幅器IA〜IDの1台が故
障した場合には、他の3台の増幅器で増幅を行うため、
故障による利得やNFのダメージが低減される。
According to this configuration, if one of the four amplifiers IA to ID fails, the other three amplifiers perform amplification.
Gain and NF damage due to failures are reduced.

即も、本発明の構成では2n個の増幅器中の1台が故障
したときの共通増幅器の利得の低下は、次式によって表
すことができる。
Specifically, in the configuration of the present invention, the decrease in the gain of the common amplifier when one of the 2n amplifiers fails can be expressed by the following equation.

G=201og  (N/(N−1))  ・”(1)
ここで、Gは2n台の増幅器中の1台が故障したときの
共通増幅回路の利得の低下量。Nは増幅器の台数(N=
2n L nは分岐段数であり2以上の整数である。
G=201og (N/(N-1)) ・”(1)
Here, G is the amount of decrease in gain of the common amplifier circuit when one of the 2n amplifiers fails. N is the number of amplifiers (N=
2n L n is the number of branching stages and is an integer of 2 or more.

この(1)式をグラフに表すと、第2図のようになる。When this equation (1) is expressed in a graph, it becomes as shown in Fig. 2.

一方、2n台の増幅器中の1台が故障したときの共通増
幅回路のNFの劣化は、次式によって表すことができる
On the other hand, the deterioration of the NF of the common amplifier circuit when one of the 2n amplifiers fails can be expressed by the following equation.

F−101og  [N/(N−1))  ・・・(2
)ここで、Fは2n台の増幅器中の1台が故障したとき
の共通増幅回路のNFの劣化量。
F-101og [N/(N-1)) ... (2
) Here, F is the amount of deterioration in the NF of the common amplifier circuit when one of the 2n amplifiers fails.

この(2)式をグラフに表すと、第3図のようになる。When this equation (2) is expressed in a graph, it becomes as shown in FIG.

したがって、第1図の構成でばNが4であり、1台が故
障したときには、前記(1)式及び(2)式から、利得
の低下は2.5dB、NFの劣化は1゜2dBとなり、
従来に比較して特性の劣化を低減し、伝送系の信頬性が
改善できることが判る。
Therefore, in the configuration shown in Figure 1, N is 4, and if one unit fails, the gain will decrease by 2.5 dB and the NF deterioration will be 1°2 dB from equations (1) and (2) above. ,
It can be seen that the deterioration of characteristics is reduced compared to the conventional method, and the reliability of the transmission system can be improved.

第4図は本発明の他の実施例のブロック回路図であり、
第1図と同一部分には同一符号を付しである。
FIG. 4 is a block circuit diagram of another embodiment of the present invention,
The same parts as in FIG. 1 are given the same reference numerals.

この実施例では、各増幅器IA〜IDに夫々駆動電流を
検出する駆動電流検出回路2八〜2Dを付加した構成と
している。
In this embodiment, drive current detection circuits 28 to 2D for detecting drive currents are added to each of the amplifiers IA to ID, respectively.

この構成によれば、第1実施例と同様に増幅器の故障に
よる特性の劣化を低減できることは言うまでもない。こ
れに加えて、定期保守時に、各増幅器IA〜IDの故障
を早期に発見することが可能であり、直ちに故障した増
幅器を交換する等の処置を施すことができる。これによ
り、受信機におけるS/Nの劣化を低減でき、かつその
回復をも早期に実現することが可能となり、伝送系の瞬
断率を低下することができる。
It goes without saying that with this configuration, as in the first embodiment, deterioration of characteristics due to amplifier failure can be reduced. In addition, during periodic maintenance, it is possible to discover failures in each of the amplifiers IA to ID at an early stage, and it is possible to immediately take measures such as replacing the failed amplifiers. This makes it possible to reduce the S/N deterioration in the receiver and to realize its recovery quickly, thereby reducing the instantaneous interruption rate of the transmission system.

なお、増幅器の数は4台に限らず、8台以上、即ちnが
3以上であってもよく、このnの増大により特性の劣化
を更に有効に低減することができる。
Note that the number of amplifiers is not limited to four, but may be eight or more, that is, n may be three or more, and by increasing n, the deterioration of characteristics can be further effectively reduced.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、分岐された信号を夫々2
n個の増幅器で独立して増幅しているので、増幅器の数
の増大に伴って各増幅器の負担を軽減し、1台の増幅器
が故障した際における受信機の伝送系での利得やNFの
劣化を低減できる効果がある。
As explained above, in the present invention, each branched signal is
Because n amplifiers amplify independently, the load on each amplifier is reduced as the number of amplifiers increases, and the gain and NF in the receiver transmission system are reduced even when one amplifier fails. It has the effect of reducing deterioration.

また、2n個の増幅器の夫々に該増幅器の駆動電流を検
出する駆動電流検出回路を設けているので、各増幅器の
故障を早期に或いは未然に発見することが可能となり、
伝送系の瞬断率を低下できる効果もある。
In addition, since each of the 2n amplifiers is provided with a drive current detection circuit that detects the drive current of the amplifier, it is possible to detect failures in each amplifier early or before they occur.
It also has the effect of reducing the momentary interruption rate of the transmission system.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のブロック回路図、第2図は
分岐段数と利得劣化量の相関特性を示す図、第3図は分
岐段数とNF劣化量の相関特性を示す図、第4図は本発
明の他の実施例のブロック回路図、第5図は従来の共通
増幅回路のブロック回路図である。 IA〜ID・・・増幅器、2A〜2D・・・駆動電流検
出回路、3.3A〜3C・・・分配器、4,4A〜4C
・・・合成器、11・・・入力端子、12・・・出力端
子。 第4 図 第5 図
FIG. 1 is a block circuit diagram of an embodiment of the present invention, FIG. 2 is a diagram showing the correlation between the number of branch stages and the amount of gain deterioration, FIG. 3 is a diagram showing the correlation between the number of branch stages and the amount of NF deterioration, and FIG. FIG. 4 is a block circuit diagram of another embodiment of the present invention, and FIG. 5 is a block circuit diagram of a conventional common amplifier circuit. IA~ID...Amplifier, 2A~2D...Drive current detection circuit, 3.3A~3C...Distributor, 4,4A~4C
...Synthesizer, 11...Input terminal, 12...Output terminal. Figure 4 Figure 5

Claims (1)

【特許請求の範囲】 1、入力信号を2^n(nは2以上の整数)個に分岐す
る分配器と、分岐された各信号を夫々独立して増幅する
2^n個の増幅器と、各増幅器からの2^n個の信号を
同相合成する合成器とを備えることを特徴とする共通増
幅回路。 2、2^n個の増幅器の夫々に該増幅器の駆動電流を検
出する駆動電流検出回路を設けてなる特許請求の範囲第
1項記載の共通増幅回路。
[Claims] 1. A distributor that branches an input signal into 2^n (n is an integer of 2 or more), and 2^n amplifiers that independently amplify each branched signal. A common amplifier circuit comprising: a synthesizer for in-phase synthesizing 2^n signals from each amplifier. 2. The common amplifier circuit according to claim 1, wherein each of the 2,2^n amplifiers is provided with a drive current detection circuit for detecting the drive current of the amplifier.
JP1009212A 1989-01-18 1989-01-18 Common amplifier circuit Pending JPH02190015A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1009212A JPH02190015A (en) 1989-01-18 1989-01-18 Common amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1009212A JPH02190015A (en) 1989-01-18 1989-01-18 Common amplifier circuit

Publications (1)

Publication Number Publication Date
JPH02190015A true JPH02190015A (en) 1990-07-26

Family

ID=11714155

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1009212A Pending JPH02190015A (en) 1989-01-18 1989-01-18 Common amplifier circuit

Country Status (1)

Country Link
JP (1) JPH02190015A (en)

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