JPH02224326A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02224326A JPH02224326A JP4590289A JP4590289A JPH02224326A JP H02224326 A JPH02224326 A JP H02224326A JP 4590289 A JP4590289 A JP 4590289A JP 4590289 A JP4590289 A JP 4590289A JP H02224326 A JPH02224326 A JP H02224326A
- Authority
- JP
- Japan
- Prior art keywords
- aluminum
- silicon
- ion implantation
- film
- diffusion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
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- Recrystallisation Techniques (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、アルミニウムのイオン注入によりシリコン
半導体基板にアルミニウム不純物拡散領域を形成する半
導体装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device in which an aluminum impurity diffusion region is formed in a silicon semiconductor substrate by aluminum ion implantation.
シリコン半導体基板にp型不純物領域を形成する場合、
ドーパントとして周期律表のmb族元素。When forming a p-type impurity region in a silicon semiconductor substrate,
Group MB elements of the periodic table as dopants.
特にほう素、ガリウム、アルミニウム等が使用される。In particular, boron, gallium, aluminum, etc. are used.
この中でアルミニウムはシリコン中での拡散係数が最も
大きく、はう素やガリウムに較べ拡散時間が短く低濃度
で深い拡散層を形成できるので、高耐圧が要求されるシ
リコン半導体素子を製造するのに最も適した元素といえ
る。Among these, aluminum has the largest diffusion coefficient in silicon, and compared to boron and gallium, the diffusion time is shorter and a deep diffusion layer can be formed at a lower concentration, making it suitable for manufacturing silicon semiconductor devices that require high breakdown voltage. It can be said that it is the most suitable element for
しかし、アルミニウムの拡散領域をイオン注入法により
形成しようとすると、アルミニウムイオンの注入がシリ
コン半導体基板の表面に集中したり、またシリコンの格
子欠陥を起こすので、アルミニウムを電気的に活性化す
るためにアニール工程が必要であり、このアニール工程
で半導体基板中のアルミニウムが基体外に放出される外
方拡散が生じ、所期の不純物濃度が得られないという問
題がある。この問題を解決する方法として、本出願人の
特許出願にかかる特願昭62−310504号明細書に
記載のように、アル逼ニウムのイオン注入によりシリコ
ン半導体基板にアルミニウム不純物添加領域を形成した
のち、その半導体基板表面に第一の酸化膜、窒化膜およ
び第二の酸化膜を順次被覆し、次いでアニールを行う、
この方法では緻密な窒化膜が外方拡散を防止するもので
、第一の酸化膜は半導体基板と窒化膜との緩衝層として
役立ち、第二の酸化膜は第一の酸化膜と均衡して窒化膜
中への熱応力の発生を防止するのに役立つ。However, when trying to form an aluminum diffusion region by ion implantation, the implantation of aluminum ions concentrates on the surface of the silicon semiconductor substrate and also causes silicon lattice defects. An annealing step is required, and this annealing step causes out-diffusion in which aluminum in the semiconductor substrate is released to the outside of the substrate, resulting in a problem in that the desired impurity concentration cannot be obtained. As a method to solve this problem, as described in Japanese Patent Application No. 62-310504 filed by the applicant, an aluminum impurity doped region is formed in a silicon semiconductor substrate by aluminum ion implantation, and then an aluminum impurity doped region is formed in a silicon semiconductor substrate. , sequentially coating the semiconductor substrate surface with a first oxide film, a nitride film, and a second oxide film, and then annealing.
In this method, a dense nitride film prevents out-diffusion, the first oxide film serves as a buffer layer between the semiconductor substrate and the nitride film, and the second oxide film is in balance with the first oxide film. This helps prevent thermal stress from occurring in the nitride film.
上記のような緻密な保護膜形成により外方拡散を防止す
る効果は、アルミニウムイオン注入の場合に関しては比
較的小さい0例えば、シリコン単結晶にアルミニウムイ
オンを60kVの加速電圧でlX 10I′cons/
−注入し、保護膜として窒化けい素を用い、1250℃
で16時間アニールした場合、95%が外方拡散する。The effect of preventing out-diffusion by forming a dense protective film as described above is relatively small in the case of aluminum ion implantation.
- implanted, using silicon nitride as a protective film, at 1250°C
When annealing for 16 hours at
その理由は、アルミニウムイオン注入により、基板単結
晶が非晶質化し、この非晶質層がアニールした際、単結
晶との界面からエピタキシャルに再結晶してゆく過程で
アルミニウムは表面側に偏析し、はとんどが外方拡散す
るためである。The reason for this is that the substrate single crystal becomes amorphous through aluminum ion implantation, and when this amorphous layer is annealed, aluminum segregates to the surface side in the process of epitaxial recrystallization from the interface with the single crystal. , is due to outward diffusion.
本発明は、上述のように保護膜によらないでアルミニウ
ムイオン注入後の7ニ一ル時のアルミニウムの外方拡散
をより効果的に防止する半導体装置の製造方法を提供す
ることを目的とする。An object of the present invention is to provide a method for manufacturing a semiconductor device that more effectively prevents the outdiffusion of aluminum during the 7th period after aluminum ion implantation without using a protective film as described above. .
上記の目的を達成するために、本発明の半導体装置の製
造方法は、アルミニウムのイオン注入により半導体単結
晶基板にアルミニウム原子添加領域を形成したのち、半
導体基板表面に同一半導体材料からなる結晶膜を形成し
、次いでアニールを行ってアルミニウム拡散領域を形成
する工程を含むものとする。In order to achieve the above object, the method for manufacturing a semiconductor device of the present invention involves forming an aluminum atom-doped region in a semiconductor single crystal substrate by aluminum ion implantation, and then forming a crystal film made of the same semiconductor material on the surface of the semiconductor substrate. and then annealing to form an aluminum diffusion region.
〔作用]
イオン注入による半導体単結晶基板のアルミニウム原子
添加領域の表面が同一半導体の結晶膜で覆われ、イオン
注入の際に生ずる非晶質化領域の再結晶化は、基板単結
晶側からばかりでなく、表面の結晶膜からも進行する。[Operation] The surface of the aluminum atom-added region of the semiconductor single crystal substrate by ion implantation is covered with a crystal film of the same semiconductor, and recrystallization of the amorphous region that occurs during ion implantation occurs only from the substrate single crystal side. Rather, it also progresses from the crystalline film on the surface.
従って、イオン注入による非晶質化領域の中央部にアル
ミニウムの偏析が進むため、再結晶化過程での顕著な外
方拡散を防ぐことができる。Therefore, segregation of aluminum progresses in the center of the amorphous region due to ion implantation, so that significant outward diffusion during the recrystallization process can be prevented.
(実施例)
第1図(♂)〜(61は本発明の一実施例の工程を概念
的に示す、まず、シリコン基板1にアルミニウムイオン
2を注入する (図+8))、この時のイオン注入条件
は加速電圧40〜60kV、 ドーズ量5X10I4
〜5X10”原子/−、イオン種”kl”である、この
際、シリコン基板表面にイオン注入による非晶質化領域
3が形成される (図(bl)、次にシリコン基板表面
に非晶質シリコン膜4を形成する (図(el)。(Example) Figures 1 (♂) to (61 conceptually show the steps of an embodiment of the present invention. First, aluminum ions 2 are implanted into the silicon substrate 1 (Figure +8)). Implantation conditions are acceleration voltage 40~60kV, dose amount 5X10I4
~5X10" atoms/-, ion species "kl". At this time, an amorphous region 3 is formed on the silicon substrate surface by ion implantation (Figure (bl), then an amorphous region 3 is formed on the silicon substrate surface. Form a silicon film 4 (Figure (el)).
なお、この非晶質シリコン膜4の形成は、例えはシラン
ガス(Sill#)などの気相成長法により、600℃
以下の温度で行う、これは、600℃以上ではアルミニ
ウムの外方拡散が生じるためである。また非晶質シリコ
ン膜4の厚さは、後述するレーザ照射で結晶化させるこ
とと、Mイオン注入による非晶質化領域3へのレーザ照
射による熱影響を最小限にすることとを考えあわせ決定
するが、通常は0.5〜1n程度が望ましい1次にレー
ザ光5の照射により、表面非晶質シリコン膜4を単結晶
化シリコン膜6とする (図+d))*アニールは、1
200〜1250℃、窒素雰囲気で10〜30時間実施
する。アニールの過程でイオン注入による非晶質化領域
3は再結晶化により次第に挟まり、最終的には全て結晶
化する (11J(a)) 、アルミニウムは非晶質領
域に偏析してゆくが、最終的に全て結晶化した後はシリ
コン基板中に約50%が拡散し、約50%は外方拡散す
る。Note that this amorphous silicon film 4 is formed at 600° C., for example, by a vapor phase growth method using silane gas (Sill#).
The temperature is as follows: At 600° C. or higher, outward diffusion of aluminum occurs. The thickness of the amorphous silicon film 4 is determined based on the consideration of crystallization by laser irradiation, which will be described later, and minimizing the thermal effect of laser irradiation on the amorphous region 3 by M ion implantation. The surface amorphous silicon film 4 is turned into a single crystal silicon film 6 by irradiation with the primary laser beam 5, which is normally desirably about 0.5 to 1n (Figure + d)) *Annealing is performed by
It is carried out at 200-1250°C in a nitrogen atmosphere for 10-30 hours. During the annealing process, the amorphous region 3 due to ion implantation is gradually sandwiched by recrystallization, and eventually it is all crystallized (11J(a)).Aluminum segregates into the amorphous region, but in the end After all crystallization, approximately 50% diffuses into the silicon substrate, and approximately 50% diffuses outward.
以上の工程で得られたアルミニウムの深さ方向の濃度分
布を第2図に示す、積層された非結晶膜の結晶化部分を
含むシリコン単結晶基板表面でのアルミニウム濃度はl
Xl01?原子/−で、拡散深さは50nに対する不純
物拡散分布が得られる。Figure 2 shows the concentration distribution of aluminum in the depth direction obtained through the above process.
Xl01? An impurity diffusion distribution for an atom/- and a diffusion depth of 50n is obtained.
〔発明の効果〕
アルミニウムをイオン注入した上面に、例えば非結晶膜
を積層後レーザ光照射することにより結晶膜を形成し、
イオン注入の際に生ずる非晶質化層を結晶基板と結晶膜
ではさむことにより、アニールの際アルミニウムは両側
から狭まっていく非晶質化領域に偏析し、外方へ拡散す
る分を50%に抑えることができる。これにより半導体
基板中に効果的に・アルミニウムを拡散させることがで
きる。[Effect of the invention] For example, a crystalline film is formed by laminating an amorphous film on the top surface into which aluminum ions have been implanted and then irradiating it with laser light.
By sandwiching the amorphous layer produced during ion implantation between the crystal substrate and the crystal film, aluminum segregates in the amorphous region that narrows from both sides during annealing, reducing the outward diffusion by 50%. can be suppressed to This allows aluminum to be effectively diffused into the semiconductor substrate.
なお、本発明による方法に加えて、前記特許出願の5l
ot/ SiN / 5ift構造の拡散防止保護膜被
覆を併用すれば、アルミニウムの外方拡散防止効果はさ
らに向上する。In addition to the method according to the present invention, 5l of the above patent application
If a diffusion prevention protective film coating with an ot/SiN/5ift structure is used in combination, the effect of preventing aluminum from outward diffusion is further improved.
第1図ial〜Telは本発明の一実施例の工程を概念
的に順次示す断面図、第2図は本発明の一実施例により
得られたシリコン基板中のアルミニウムの濃度分布図で
ある。
t シリコン+ 8−、 2 : 7tvミニ?Aイブ
ン、3・ イオン9を入鐘塙、4 拝品質シック/片更
、5、I/−プ・tzG”%♂9(しシソコ /月表
7 °°津酩Aシソつン。FIGS. 1 ial to 1 are cross-sectional views conceptually showing sequentially the steps of an embodiment of the present invention, and FIG. 2 is a diagram showing the concentration distribution of aluminum in a silicon substrate obtained according to an embodiment of the present invention. t silicon + 8-, 2: 7tv mini? A Even, 3. Aeon 9 to Nyukanhanawa, 4 Hai quality chic/Katara, 5, I/-pu・tzG”%♂9 (Shisoko/Monthly table)
7 °°tsu drunk A shisotsun.
Claims (1)
にアルミニウム原子添加領域を形成したのち、半導体基
板表面に同一半導体材料からなる結晶膜を形成し、次い
でアニールを行ってアルミニウム拡散領域を形成する工
程を含むことを特徴とする半導体装置の製造方法。1) Including the step of forming an aluminum atom-doped region in a semiconductor single crystal substrate by aluminum ion implantation, forming a crystal film made of the same semiconductor material on the surface of the semiconductor substrate, and then performing annealing to form an aluminum diffusion region. A method for manufacturing a semiconductor device, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4590289A JPH02224326A (en) | 1989-02-27 | 1989-02-27 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4590289A JPH02224326A (en) | 1989-02-27 | 1989-02-27 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02224326A true JPH02224326A (en) | 1990-09-06 |
Family
ID=12732173
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4590289A Pending JPH02224326A (en) | 1989-02-27 | 1989-02-27 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02224326A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6376860B1 (en) | 1993-06-12 | 2002-04-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US7550765B2 (en) | 1994-08-19 | 2009-06-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and fabrication method thereof |
-
1989
- 1989-02-27 JP JP4590289A patent/JPH02224326A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6376860B1 (en) | 1993-06-12 | 2002-04-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| KR100420230B1 (en) * | 1993-06-12 | 2004-03-03 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device |
| US7550765B2 (en) | 1994-08-19 | 2009-06-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and fabrication method thereof |
| US7557377B2 (en) | 1994-08-19 | 2009-07-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having thin film transistor |
| US8450743B2 (en) | 1994-08-19 | 2013-05-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having parallel thin film transistors |
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