JPH02288328A - Method of growing crystal - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming a semiconductor thin film, and more particularly, it relates to a method for forming a semiconductor thin film, and more particularly, it relates to a method for forming a semiconductor thin film, and more specifically, a method for forming a semiconductor thin film, and more specifically, a method for forming a semiconductor thin film, and more particularly, a method for forming a semiconductor thin film, and more particularly, a method for forming a semiconductor thin film with a large particle size, which enables the production of high performance semiconductor devices such as TPT (thin film transistor). The present invention also relates to a method for forming a semiconductor thin film with controlled grain boundary positions.

[Prior art and problems to be solved by the invention] One of the methods in the field of crystal formation technology for growing a crystal thin film on a substrate such as an amorphous substrate is to grow an amorphous thin film on a substrate in advance. A method of solid phase growth by annealing at a low temperature below the melting point has been proposed. For example, an amorphous Si thin film with a thickness of about 1100 nm formed on the surface of amorphous Si is heated at 800 nm in an N274 atmosphere.
A crystal formation method has been reported in which the amorphous St thin film is crystallized by annealing at ℃ to form a polycrystalline thin film with a large grain size of about 5 μm (T, Noguchi
, H. Hayashi and )1. Ohshim
a.

1987, Mat, Res, Soc, Symp
, Proc, , 10B.

Polysilicon and Interface
s, 2!13. (Elsevier Science
Publishing, New York 1988
)) a Since the surface of the polycrystalline thin film obtained by this method remains flat, it is possible to form electronic devices such as MOS transistors and diodes as is. In addition, in those elements, the average grain size of polycrystals is LP
Since it is much larger than ordinary polycrystalline St etc. deposited by CVD, a relatively high performance product can be obtained.

However, in this crystal formation method, although the crystal grain size is large, the distribution and the position of the crystal grain boundaries are not controlled. This is because, in this case, the crystallization of the amorphous Si thin film is based on the solid phase growth of crystal nuclei randomly generated in the amorphous material by annealing, so the positions of the grain boundaries are also formed randomly; This is because, as a result, the particle sizes are distributed over a wide range. Therefore, if the average grain size of the crystal grains is simply large, the following problems arise.

For example, in a MOS transistor, since the gate size is the same as or smaller than the average crystal grain size, the gate part contains some grain boundaries and some parts contain several grain boundaries. .

The electrical properties change greatly between a part that does not contain grain boundaries and a part that contains several grain boundaries. This causes large variations in characteristics among a plurality of elements, and when an integrated circuit or the like is formed, the variation in crystal grain size poses a significant problem in the integrated circuit.

Among the problems with large-grain polycrystalline thin films produced by solid-phase crystallization, a method for suppressing the variation in grain size is proposed in Japanese Patent Application Laid-Open No. 58-56406. The method will be explained using FIG. 4. First, as shown in FIG. 4(a), an amorphous Si thin film 4 is formed on an amorphous substrate 41.
Thin film pieces 43 made of another material are periodically provided on the surface of the substrate 2, and the entire substrate is annealed in a conventional heating furnace.

Then, the formation of crystal nuclei 44 occurs preferentially from the portions of the amorphous St thin film 42 that are in contact with the periphery of the thin film pieces 43. Therefore, when this crystal nucleus is further grown, the amorphous St thin film 42 is crystallized over the entire area, and a polycrystalline thin film consisting of crystal grain groups 45 of large grain size as shown in FIG. 4(b) is obtained. According to Japanese Patent Application Laid-Open No. 58-56406, this method reduces the variation in particle size by 1/2 compared to the conventional method shown above.
It is said that it can be reduced to about 3.

However, it is still insufficient. For example, when the thin film pieces 43 are arranged in the form of lattice points with intervals of 10 μm, the variation in particle size is only within the range of 3 to 8 μm. Furthermore, the actual situation is that the control of grain boundary positions is hardly controlled. The reason is that amorphous S
i Due to the localized effect of elastic energy in the area where the periphery of the thin film 42 and the thin film piece 43 contact, preferential nucleation occurs around the thin film piece 43, so a plurality of nuclei are generated along the periphery. This is because it is difficult to control their number.

Regarding the method of controlling the nucleation position in solid phase growth of an amorphous Si thin film, other methods have been proposed, such as in Japanese Patent Laid-Open No. 63-253616. These are as shown in Figure 5.
This is a method in which a region 54 in which a substance 53 other than Si is locally implanted into an amorphous Si thin film 52 is provided, and crystal nuclei are generated preferentially there. Substances other than Si 53
N, B, etc. have been proposed, but in reality, there is a lack of selectivity regarding nucleation between the ion-implanted region 54 and other regions, and it has not been possible to actually achieve this. There are no reports.

The present invention solves the problems of the above-mentioned conventional examples, and an object of the present invention is to control the nucleation position in the same phase and to grow a crystal in which the grain boundary position is determined. The purpose is to provide a method.

[Means for Solving the Problems] The crystal growth method of the present invention is a crystal growth method in which an amorphous thin film is crystallized by solid phase growth to form a thin film crystal.
Ions of the constituent material of the amorphous thin film are formed in the amorphous thin film so that a micro region where the degree of implantation damage is smaller than other regions is formed near the interface between the amorphous thin film and the underlying substrate. The first feature is that by implanting the amorphous thin film and then performing heat treatment at a temperature below the melting point of the amorphous thin film, nuclei are formed preferentially from the micro region.

Further, the crystal growth method of the present invention includes implanting ions of a constituent material of the thin film into a thin film provided on a base material, and forming regions with different degrees of damage due to ions at the interface between the base material and the thin film. Then, by performing heat treatment at a temperature below the melting point of the thin film, a crystal grown from a single nucleus preferentially is formed from the micro region where the degree of damage is small, and the thin film is crystallized by solid phase growth. The second feature is that

[Function] The details of the function and structure of the present invention will be explained below together with the knowledge obtained in making the present invention.

The key point of the present invention is how to control the growing position of crystals in the solid phase. That is, in an amorphous thin film, nuclei are generated preferentially in a specific position, and generation of nuclei in other areas is suppressed.

- The present inventor deposited a polycrystalline Si film on a base material made of, for example, 5i02, and then implanted Si ions to make the polycrystalline Si layer amorphous. We discovered a phenomenon in which the crystallization temperature (crystallization temperature) strongly depends on the ion implantation energy.

Therefore, we investigated why the crystal nucleation temperature depends on the ion implantation energy and found the following. The details are described below.

By changing the implantation energy, the Si after becoming amorphous
In the layer (amorphous Si layer), the distribution of the implanted Si ions changes, and as a result, the distribution of the generated vacancies,
That is, the distribution of regions where implantation damage exists changes in the film thickness direction depending on the implantation energy.

Further, within the amorphous material, a nucleus is generated that overcomes the surface energy disadvantage, and thereafter, a phase transition of the St atoms from the amorphous phase to the crystalline layer occurs.

By the way, there are two types of nucleation: uniform nucleation and heterogeneous nucleation. The former is nucleation in a homogeneous material (for example, inside an amorphous Si film), and whether or not such nucleation occurs is mainly determined by It all depends on whether they can overcome the surface energy disadvantage and grow larger. On the other hand, in the latter case of heterogeneous nucleation, nucleation is promoted by contact with foreign matter, and the activation energy of the latter is lower than that of the former. That is, heterogeneous nucleation is more likely to occur than homogeneous nucleation. In fact, amorphous S
The rate of nucleation in i-thin films is mainly determined by heterogeneous nucleation near the underlying interface.

The depth at which the ion implantation dose reaches its maximum (projected range) is
The inventors have discovered that even under conditions where the injection amount is constant, the above-mentioned heterogeneous nucleation at the interface is significantly affected.

FIG. 1 shows the correlation between implantation energy and crystallization temperature.

The conditions at this time are as follows. The injection layer is 5i02
Reduced pressure CV by decomposition of S i H4 at 620 °C on the substrate
A polycrystalline St layer with a thickness of 1100 nm deposited in D,
The implanted ions are St+. The injection amount is the critical injection amount (approximately 1
constant over 0 "cm-") (in this case 5 x 1
The implantation energy was 40 cm.
keV to 80 keV, and the implantation layer is made so that Si atoms are knocked on from the lattice position by ion bombardment.
When the injection amount exceeds the input amount, the damaged area becomes continuous and becomes amorphous. This amorphous St layer was heat-treated for 20 hours at various temperatures in a N2 atmosphere, and the recrystallization process in the solid phase was observed mainly using a transmission electron microscope. The temperature of oxidation was investigated.

For example, focus on implant energies of 40 keV and 70 keV. The implantation depths (projected ranges) for 40 keV and 70 keV are 5.2 nm and 99.7 nm, respectively, which correspond to near the center of the film thickness and near the interface with the underlying material within the 1100 nm layer. There is a difference of more than 50°C in their crystallization temperatures, indicating that the crystallization temperature is higher and it is more difficult to crystallize when implanted near the base interface.This indicates that the damaged area extends to the interface. It is thought that this is because the heterogeneous nucleation was inhibited as a result. In addition, the temperature at which an amorphous layer is implanted at 40 keV so that the projected range is near the center of the film thickness, or an amorphous layer deposited by CVD is crystallized within 1 hour (i.e., 60 keV)
When the amorphous layer was heat-treated at 70 keV at 70 keV with the implantation depth near the interface, transmission electron microscopy confirmed that this layer did not crystallize even after 100 hours or more. Ta. FIG. 2 shows the relationship between the time from the start of heat treatment to the start of crystallization (latent time) and the implantation depth. As shown in FIG. 2, the deeper the implantation depth toward the interface, the longer the latent time and the harder it is to crystallize. (Projected range)/(Film thickness)=:1, that is, the incubation time is maximum and has a maximum point near the nasal surface where the most damage occurs.

From the above, it has been revealed that the crystallization temperature and the latent time differ by changing the implantation energy, and the cause is judged to be the inhibition of heterogeneous nucleation near the interface.

The nucleation position is controlled using the above phenomenon.

As shown in Figure 3, a mask such as a resist is used on the surface of the amorphous St deposited layer to cover the area where nuclei are to be generated, and Si ions are applied only to areas where the nuclei are not generated near the interface between the amorphous Si layer and the underlying layer. Select the injection energy and inject it so as to cause damage.

Damage is caused mainly near the interface in areas not masked by the resist, and nucleation is inhibited during subsequent heat treatment.

Area with high degree of implantation damage (hereinafter referred to as interface damage area)
The temperature and time at which the silicon does not crystallize and the region with a low degree of implantation damage or no implantation damage (hereinafter referred to as non-interface damage region) crystallizes is determined from Figures 1 and 2, and Si The ion-implanted amorphous Si layer is treated with N2 or N2
heat-treated inside. Nuclei are generated locally by such heat treatment. Typically, heat treatment at around 630° C. for about 100 hours is appropriate for an amorphous St layer. The non-interface damage area has a small area (5 μm diameter or less, preferably 2 μm (diameter)
Below, if the area is optimally set to 1 μm (diameter) or less, nuclei will be generated early from the micro region when heat treatment is started.
A single crystal grows (Figure 3(B)). As shown in FIG. 3(C), when this crystalline phase having a single domain is continued to undergo heat treatment, the interface between the crystalline phase and the amorphous phase moves outward. That is, Si atoms in the amorphous state jump across the interface and are incorporated into the crystalline phase. In this way, the size of the crystal continues to increase, but this phase transition from the amorphous phase to the crystalline phase occurs at a lower energy than the energy for nucleation, which has a disadvantage in surface energy. Before nucleation occurs, they are incorporated into a single crystal phase generated from the non-interface damaged region, and eventually adjacent crystals collide with each other, forming grain boundaries there.

At this time, the crystal grain size becomes approximately equal to the interval between the non-interface damaged regions, and the desired crystal grain size can be determined, as well as the grain boundary position.

Note that the amorphous thin film in the present invention is not limited to one formed by amorphizing a polycrystalline thin film by performing ion implantation into the polycrystalline thin film, but may also be one that has an amorphous structure when deposited.

When the starting material is a polycrystalline layer, first ion implantation is performed without providing a mask so that the projected range is near the center of the polycrystalline thin film. By such ion implantation, the polycrystalline thin film can be made amorphous without causing implantation damage near the interface between the polycrystalline thin film and the underlying material. Next, a second ion implantation is performed with a mask made of, for example, resist provided in a portion corresponding to the minute region so that the projected range is near the interface between the amorphous thin film and the underlying substrate. Due to such ion implantation, implantation damage occurs near the interface between the amorphous thin film and the underlying substrate in areas other than the area where the mask was provided, whereas no implantation damage occurs in the area where the mask was provided, so nucleation occurs in this area. It becomes an area.

When forming a thin film with an amorphous structure during deposition, the first ion implantation described above may be omitted.

In the above method, ion implantation was performed twice, but if the material and thickness of the mask are appropriately selected, the projection range in the part corresponding to the micro region can be made to be near the center of the thin film, while the projection range in other parts can be Since the projected range in the step can be set near the interface between the amorphous thin film or polycrystalline thin film and the underlying substrate, the formation of a microscopic region with small particle size of implantation damage and the amorphization of the polycrystalline thin film can be performed in one step. This can be done by ion implantation.

As such a mask, the ions to be implanted can be
Y! It is desirable that the mask be made of a material that can be used for LA, such as an inorganic material such as silicon oxide.

[Example] (Example 1) Amorphous Si was deposited to a thickness of 1100 nm on a glass substrate containing Sin2 as a main component by low pressure CVD.

S i H4 was used as the source gas at 550°C and pressure 0.
It was formed at 3 Torr.

Thereafter, a resist was applied, and two types of resist having a diameter of 1 μm were left in the form of lattice points at intervals of 5 μm and 10 μm using a normal lithography technique.

Using this resist as a mask, apply Si0 ions at 70 keV.
It was injected all over. The implantation amount was 3×10 ``cm-''. With the implantation energy of 70 keV, the projected range comes close to the interface between 1100n of St, the underlying material SiO, and the glass. This allows the area other than the resist with a diameter of 1 μm to be Damage was caused to the interface (S i /S i O2) in all cases. After stripping the resist, 630° C. was applied in a N atmosphere.
Heat treatment was performed at ℃ for 80 hours. Thereafter, observation using a transmission electron microscope revealed that the crystal grain boundaries were aligned at intervals of 5 μm and 10 μm, which corresponded to the initial pattern spacing, and the grain size distribution was within ±1 μm with respect to the average of 5 μm and 10 μm, respectively.

Similar effects were obtained when the heat treatment in the H2 atmosphere was replaced with the heat treatment in the H3τ atmosphere.

(Example 2) A polycrystalline Si thin film was formed by thermally decomposing SiH4 using a reduced pressure chemical vapor phase method on a base material made of plate-shaped glass.
00n was deposited. Formation temperature is 620℃, pressure 0.3To
rr, and the particle size was fine, about 50 nm. Si injection was performed twice. First, we first implanted 3×10 implants with an energy of 40 keV on the entire surface without a resist mask.
St ions were implanted into the polycrystalline Si layer at an implantation dose of I5 cm-'', and as mentioned above, the damage became continuous and the layer became amorphous. However, the projected range of 40 keV was near the center of the film thickness of 1100 nm. As a result, there is almost no damage near the St/5i02 base interface.

Thereafter, in the same manner as in Example 1, two types of resist masks were provided in the form of lattice points with a diameter of 1 μm and intervals of 5 μm and 10 μm, and a second St” ion implantation was performed, this time at 70 keV, to introduce damage near the interface. The amount was the same as the first injection. After the resist was removed, it was heat-treated in N at 620°C for 100 hours. As a result, the particle size was 5 μm ± 1 as in Example 1.
μm, 10 μm±1 μm, and the grain boundaries were arranged in a lattice shape.

A large number of channels with a length of 3 μm were formed on the 1100 nm thick Si layer obtained in Example 1 and Example 2 using a normal IC process.
When a field effect transistor of m was prototyped, the electron mobility was 200±5 cm/V-sec, and the variation in Lz threshold was ±0.2 V. Since it is possible to arrange the channel portion of a transistor so that no grain boundaries exist, it has become possible to improve the performance of the device characteristics and narrow the distribution of device characteristics.

(Example 3) An amorphous Ge thin film with a thickness of 50 nm is vacuum deposited on a base material consisting of 5 in 2 by electron beam. The vacuum level was 1xlO-'Torr, and the deposition was performed at room temperature. Mask an area with a diameter of 1.5 μm and an interval of 10 μm using a resist,
Ge+ ions are implanted over the entire area at 130 keV. The injection volume was 2×10 15 cm −2 . The implantation depth of the Ge'' ions is about 50 nm from the surface, and the implantation is concentrated mainly near the interface of the underlying substrate, causing damage to the interface.

After removing the mask, immerse in N2 or H4 atmosphere for 38 hours.
After heat treatment at 0°C for 50 hours, Ge was covered with a mask.
A single crystal grows only from a small region where no ions are implanted and the interface is undamaged, and the crystal extends into the amorphous 'JjGe region where damage is introduced to the interface by Ge ions, and adjacent crystal nuclei are generated. Both crystals collided in the middle of the point, and a grain boundary was formed there. As a result of examining the crystal structure with a transmission electron microscope, the diameter of each single domain crystal was 10 μm ± 1 μm.
It became.

(Example 4) 1 A polycrystalline Ge thin film was formed on a base material made of 5i02 to a thickness of 50 nm at a deposition temperature of 400° C. by GeH4 thermal decomposition using a low pressure CVD method. This as-deposited polycrystalline Ge has a grain size of about 1100 nm, which was confirmed by transmission electron microscopy. Zero-order Ge" ions were implanted at an implantation energy of 60 keV and at an implantation dose of 2 x 10 "am-'.
The entire film is made amorphous. The implantation depth with an implantation energy of 60 keV is about 25 nm from the surface, and at this time, almost no damage is introduced into the Ge film/SiO2 substrate interface.

Furthermore, with resist, the 1.2 μm diameter portion was
Ge+ ions were implanted at 130 keV with a dose of 2×10"am-' using a mask at intervals of m. At this time, damage was introduced mainly to the interface (Ge/5io2) in the implanted region. After removing the resist mask, N2 60 at 390℃ in atmosphere
Heat treatment was performed for a period of time.

Only the micro region that is not damaged at the Ge1ii interface crystallizes, and a crystal with a single domain grows. Furthermore,
The crystal maintains its crystal structure and extends into the region where damage has been introduced at the interface, and eventually collides with the adjacent crystal, forming a grain boundary between the adjacent microinterface undamaged region. is formed.

As a result of examining with a transmission electron microscope, the particle size was 15 μm ± 2 μm.
Therefore, a polycrystalline film with uniform grain size could be formed.

(Example 5) A polycrystalline Si thin film of 1,100 mL was deposited on a fused silica substrate as a base material by low-pressure CVD under the following conditions.
The film was deposited to a thickness of n.

Gas used: SiH4 Gas flow rate ratio: 50 sec Pressure: 0.3 Torr Substrate temperature: 620°C Next, a 30 nm thick amorphous SiO2 film is deposited on this amorphous ysi thin film by atmospheric pressure CVD, and this is subjected to a normal photolithography process. By, 1 μm square Sin
, patterning was performed so that regions remained in the form of lattice points spaced at intervals of 10 μm.

Then, St" ions accelerated to an energy of 70 keV were implanted into the entire surface of the substrate at a dose of 5.times.10" cm.sup.-2. By this ion implantation, the polycrystalline Si thin film was made amorphous over the entire area, including the area where the surface was covered with the Sin thin film. And in this case, Si in Si
Since the projected range of ions is 99.7 nm, in the region where no 5i02 thin film remains on the surface of the Si thin film, the largest number of implanted Si ions are distributed near the interface with the fused silica substrate. Thus, a non-nucleation region is formed. On the other hand, 1μ with 5i02 thin film left on the surface.
In the m-square region, the maximum distribution of implanted Si ions (
Not only does the projected range remain in the Si thin film, but its absolute amount is small, so it becomes a nucleation region.

Therefore, the 5in2 thin film scattered on the surface was removed by etching with HF diluted with water, and then the substrate temperature was maintained at 600° C. in an N2 atmosphere to anneal it. Then, for 10 hours after starting the annealing, the
, crystal nuclei began to occur in a 1 μm square area into which Si ions were implanted while still being covered with a thin film. At this point, Sin
Since no nucleation occurs in the region where Si ions are implanted without being covered with a thin film, if annealing is continued further, the crystal nuclei that had already formed in the 1 μm square region will extend beyond that region in the lateral direction. The crystals grew into large-grain thin film crystals.

After annealing for 100 hours, the growth end surface came into contact with a crystal grain grown from an adjacent region about 10 μm apart to form a grain boundary, and the amorphous Si thin film was crystallized over almost the entire area. As a result, the grain boundaries were reduced to approximately 10 μm.
A thin film crystal consisting of a group of crystal grains having an average grain size of 10 μm was obtained while being arranged in a lattice shape with intervals.

(Example 6) Amorphous St was deposited on a quartz substrate as a base material by electron beam evaporation in ultra-high vacuum under the following conditions.
was deposited to a thickness of 1100 nm.

Ultimate vacuum level: lX10-''Torr Vacuum during deposition: 5xlO-''Torr Substrate temperature: 150°C Deposition rate: ~100 nm/hr On this amorphous Si thin film, a resist is applied to a 1 μm square area by a normal photolithography process. was buttered so that it remained in the form of lattice points at intervals of 10 μm.

Further, St'' ions accelerated to an energy of 70 keV were implanted into the entire substrate at an implantation dose of 1X10''cm-'. In this case, since the projected range of Si ions in Si is 99.7 nm, the largest number of Si ions are distributed near the interface between the amorphous Si thin film and the quartz substrate in the area not covered by the resist. , a lot of damage is introduced at the interface.

After removing the resist, the substrate temperature was lowered to 55% in an N2 atmosphere.
Heat treatment was performed while maintaining the temperature at 90°C. 15 hours after the start of heat treatment, in a 1 μm square area where Si ions were not implanted,
Crystal nuclei began to form. At this point, no nucleation has occurred in the region not covered with resist and implanted with Si ions, so if annealing is continued further, the crystal nuclei that have already formed in the 1 μm square region will exceed that region. The crystals grew laterally and became dendritic, large-grain thin film crystals. After annealing for 120 hours, the growth end face came into contact with a crystal grain grown from an adjacent region approximately 10 μm apart to form a grain boundary, and the amorphous Si thin film was crystallized over almost the entire area. As a result, a thin film crystal consisting of a group of crystal grains with an average grain size of 10 μm was obtained, with grain boundaries arranged in a lattice shape with an interval of approximately 10 μm.

(Example 7) A glass substrate was used as the base material, and amorphous St was deposited to a thickness of 1100 nm on the surface of the substrate by DC magnetron sputtering under the following conditions.

Ultimate vacuum level: 5xlO-'Torr Vacuum during deposition: 2xlO-3Torr Substrate temperature: 20°C Deposition rate: ~200 nm/hr Next, a resist is applied onto this amorphous St thin film, and this is subjected to a normal photolithography process. 10μm in 2μm square
It was patterned so that lattice points remained at intervals.

Then, Si0 ions accelerated to an energy of 60 keV were implanted into the entire surface of the substrate at a dose of 5 x 10"cm-2. In this case, the projected range of Si ions in Si is 84.5 nm, so In the region where no resist is left on the surface of the crystalline Si thin film, the largest number of Si ions are distributed near the interface with the fused silica substrate, forming a non-nucleation region.On the other hand, In the 1 μm square region where the resist remains on the surface, the implanted Si ions do not reach the amorphous Si thin film and become a nucleation region.

Therefore, after removing the resist scattered on the surface, N2
This was annealed in an atmosphere while keeping the substrate temperature at 620°C. Then, 15 hours after starting the annealing, the silicon ions were covered with resist and no Si ions were implanted.
Crystal nuclei began to occur in a μm square area. at this point
Since no nucleation occurs in the region where Si ions are implanted without being covered with resist, if annealing is continued, the crystal nuclei that had already formed in the 2 μm square region will extend laterally beyond that region. The crystals grew into dendritic, large-grain thin film crystals. Then, after annealing for 120 hours, 10
The amorphous St thin film was crystallized over almost the entire area, with the growth end surface coming into contact with a crystal grain grown from an adjacent region that was about .mu.m thick to form a grain boundary. As a result, the average grain size was 10 μm while the grain boundaries were arranged in a lattice shape with an interval of approximately 10 μm.
A thin film crystal consisting of micron crystal grains was obtained.

[Effects of the Invention] According to the present invention, a flat thin film with large grain size can be formed without requiring a process such as polishing.

Further, according to the present invention, the position of grain boundaries formed between adjacent crystal grains and the grain size can be arbitrarily controlled.

Therefore, various elements with little variation can be formed over a large area.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a graph showing the relationship between implantation energy and crystallization temperature. FIG. 2 is a graph showing the relationship between projected range and latency time. FIG. 3 is a side sectional view for explaining one embodiment of the present invention, and FIGS. 4 and 5 are side sectional views showing the prior art. Figure 1 Figure 2 Section Wμ Town Figure 4 Figure 5

Claims (9)

[Claims] (1) In a crystal growth method in which an amorphous thin film is crystallized by solid phase growth to form a thin film crystal, the degree of damage due to ion implantation is greater in the amorphous thin film provided on the base material than in other areas. Ions of a constituent material of the amorphous thin film are implanted so that a micro region with a small area is formed near the interface between the amorphous thin film and the base material, and then the temperature is lower than the melting point of the amorphous thin film. 1. A crystal growth method characterized in that a crystal grown from a single nucleus is formed preferentially from the micro region by performing heat treatment in the micro region. (2) The amorphous thin film has an amorphous structure as it is deposited, or a thin film formed by amorphizing a polycrystalline thin film by performing ion implantation into the polycrystalline thin film. Crystal growth method described. (3) The amorphous thin film is a thin film obtained by making the polycrystalline thin film amorphous by performing ion implantation so that the projected range of the ion implantation is near the center of the polycrystalline thin film. Crystal growth method. (4) The micro region is formed so that the projected range of the ion implantation is near the interface between the amorphous thin film and the underlying substrate, with a resist mask provided on the portion of the amorphous thin film corresponding to the micro region. 3. The crystal growth method according to claim 2, wherein the ion implantation is performed so that the ion implantation is performed so as to form a minute region in which the degree of implantation damage is smaller than in other regions. (5) The formation of the minute area is performed by providing a mask capable of shortening the projected range in a portion corresponding to the minute area, and the projected range other than the area where the mask is provided is between the polycrystalline thin film and the underlying substrate. Claim 1, wherein the ion implantation is performed so as to be near the interface with the polycrystalline thin film, and the polycrystalline thin film is made amorphous, and the formation of a minute region where the degree of implantation damage is smaller than other regions is performed in a single ion implantation. crystal growth method. (6) The crystal growth method according to any one of claims 1 to 5, wherein a plurality of the micro regions are formed at desired intervals. (7) Injecting ions of a constituent material of the thin film into a thin film provided on a base material to form regions with different degrees of damage by ions at the interface between the base material and the thin film, and then below the melting point of the thin film. Crystal growth characterized in that a crystal grown from a single nucleus is formed preferentially from the micro region where the degree of damage is small by performing heat treatment at a temperature of , and the thin film is crystallized by solid phase growth. Method. (8) The crystal growth method according to claim 7, wherein the thin film is an amorphous thin film. (9) The crystal growth method according to claim 7, wherein the thin film is a polycrystalline thin film.