JPH0241937B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for receiving pulse control signals between a main device and a button telephone in a button telephone device.

Conventionally, there has been a demand for button telephone devices to reduce the number of cable cores connecting the main device and the key telephone, and in order to meet this demand, control information between the main device and the key telephone is converted into pulses and allocated in time. Mutual transmission is performed through a pair of control lines.

The present invention relates to a reception method that enables stable reception of pulse control signals in such a pulse data transmission type button telephone device. The present invention will be explained in detail below with reference to the drawings.
FIG. 1 is an example of a pulse train transmitted between the main device and the button telephone in a conventional button telephone device, where the first pulse a has a high level, and the second pulse b and the third pulse c have a low level. The fourth pulse d is composed of a binary pulse train, with the level being high again, and if any of the pulses is detected, a clock pulse is sent, that is, the clock is "1", The data is discriminated as ``1'' when the level is high for pulses a and d, and ``0'' when the level is low for pulses b and c. e indicates that no pulse was detected, and in this case the clock becomes "0".

In order to discriminate such binary level pulses, a binary level discrimination circuit is required in the data receiving circuit, and the pulse level changes due to voltage fluctuations, etc., resulting in false detection. There were other problems.

In order to solve these problems, the present invention uses one-value pulses for each of the clock and data, and forms the transmission data format so that one data pulse and one clock pulse are sent out alternately. This device is designed to stably receive each of the above-mentioned pulses even if there is a difference in the oscillation frequency of the oscillation circuit that oscillates the cycle that is the basic operation of the main device that transmits and receives pulses or the button telephone. be.

FIG. 2 is a block diagram of a key telephone device implementing the data transmission method according to the present invention, 1 is a main device;
0 and 17 are button telephones No. 1 and No. 2, respectively.
and a communication line 3 and a control line 4 are connected to the main device 1.
are connected in multiple ways by 2 is the office line terminal,
Reference numeral 6 denotes a central office line incoming circuit that receives the central office line incoming signal, 5 a one-chip microprocessor with a built-in memory, 9 an oscillation circuit that oscillates at a period that is the basis of the operation of the microprocessor, and 7 a telephone line 3. This is a communication path switching circuit that switches to a local office line or an extension line, and includes a communication current supply circuit.

8 is a data transmission/reception circuit that performs an interface for data transmission and reception; 11 and 18 are communication circuits;
12 and 19 are data transmitting and receiving circuits that provide an interface for transmitting and receiving data; 16 and 23 are indicators such as lamps; 15 and 22 are data input means such as a telephone line selection key; and 13 and 20 are control circuits that input received data. 14 and 21 are control circuits 1 to 14 and 21, respectively, for detecting and controlling the display and converting information from the data input means into pulse data to the main device 1.
This is an oscillation circuit that oscillates at the basic cycle of the operations of No. 3 and 20.

FIG. 3 is a pattern diagram showing an embodiment of the data transmission method, and in the figure, D ₁ , D ₂ . ₁ , T ₂ ...Tn is button telephone No. 110,
This is data sent from No. 217 and No. n to the main device 1. That is, the main device 1 is configured to sequentially send data to each key telephone and receive data from the key telephone each time, and these operations are performed cyclically.

Next, to explain the operation using a central office line call as an example, the data input means 15 in key telephone No. 110
When the office line key is operated, the control circuit 13 converts this information into a pulse and sends it to the main device ₁ when transmitting the data T1 shown in FIG. In the main device 1, this data _T1 is given to the microprocessor 5 via the data transmitting/receiving circuit 8, so the data processing by the microprocessor 5 drives the call path switching circuit 7, and the key telephone No. 110 The communication circuit 11 is connected to the office line terminal 2 via the communication line 3, so that communication with the office line is possible. At the same time, the microprocessor 5 converts the information for lighting the lamps of the displays 16 and 23 into pulses when sending the data D ₁ to Dn to each button telephone No. 1 to No. n as part of the above data processing. Send.

The button telephone that received this data e.g. D ₂
The control circuit 20 of No. 217 thereby controls the display 2.
Turn on the 3rd lamp. So each button phone
In No. 1 to No. n, it is displayed that the central office line is busy. Each piece of data for performing the above-mentioned control, for example, data _D1 , forms a data format as shown in FIG. The code consists of a total of 4 bits, each with a number of bits of 2, and a total of 22 bits including the stop bit. In both cases, the clock pulse CP (shaded) and the data pulse DP are sent out alternately. (This data format shows the case where there are a maximum of four key telephones, and the dotted line indicates that the data is "0".) The operations of transmitting and receiving such data pulses are mainly Device 1 and key telephone No. 110, No. 2
Oscillation circuit 9 and 14,2 provided in 17
Since the period is determined by the oscillation frequency of 1,
If there is a difference in the oscillation frequencies on the transmitting and receiving sides, an erroneous signal may be received or it may not be possible to receive the signal. For this reason, it becomes necessary to adjust each oscillation frequency or use a highly accurate oscillation circuit, but the present invention attempts to solve this problem as well.

This will be explained in detail below with reference to the drawings. Fifth
The figure is a pattern diagram to explain the transmission and reception status. A indicates the transmission data pulse, CP ₁ , CP ₂
...CP _o is clock pulse, DP ₁ , DP ₂ ...DP _o
is the data pulse. B shows timing pulses for detecting each of the above data pulses on the receiving side, and SC1' and SC1 are clock pulses for detecting the first clock pulse _CP1 .
CP ₁ , CP ₂ ... Sampling pulses consisting of a period t shorter than the width s of CP _o .
At the timing of SC1, the first clock pulse _CP1 is detected, and after this detection, at the timing pulse SD1 at a predetermined time T, the data pulse DP1 is detected.
is detected, and the cycle of time T is repeated, and the second clock pulse CP ₂ is generated with the timing pulse SC ₂ ,
It is possible to detect data pulse DP ₂ with timing pulse SD ₂ and receive data. However, the oscillators 9 and 1 oscillate the period DT of the transmission data pulse and the period of time T on the receiving side.
If there is a difference between the oscillation frequencies of 4 and 21, and the above-mentioned transmission data pulses are continuously transmitted for a long time, it will become impossible to receive the data pulses as described above.

FIG. 6 shows an embodiment of the receiving method according to the present invention.
A indicates the transmission data pulse, CP ₁ , CP ₂ ...
CP _o is a clock pulse, DP ₁ , DP ₂ ...DP _o is a data pulse.

B shows timing pulses for detecting each of the above data pulses on the receiving side. S
is the pulse width of the clock pulses CP ₁ , CP ₂ , CP ₃ . . . CP _o , and CT is the period of the clock pulse. SC
1', SC1, SC2', SC ₂ ... SC _o is a sampling pulse for detecting a clock pulse ("'" indicates a pulse at a timing that could not be detected. The same applies hereinafter), and SD ₁ , SD ₂ ... SDn is data pulse
DP ₁ , DP ₂ ... are timing pulses for detecting DP _o . The above sampling pulse SC1',
SC1, SC2', SC2...The period A of SC _o is shorter than the clock pulse width S, and the period B is the second clock pulse after detection of the first clock pulse _CP1 (detected by the sampling pulse SC1 in the figure). The period B is the period up to the first sampling pulse SC2' for starting the detection of the clock pulse _CP2 , and the period B is shorter than the period CT of the clock pulses CP1 to CPn. Also, the time of period A is equal to the period B
(this is indicated by period C) is selected so that it is longer than the period CT of clock pulses CP1 to CPn. Timing y is the timing for detecting data pulses DP1, DP2...DPn, and clock pulse CP1 on the transmitting side.
~Data pulse sent out after each CPn
It is determined in advance according to the timing of DP1 to DPn.

Now, if a data pulse is received with such a configuration, and if the oscillation frequencies, which are the basics of operation on the transmitting side and the receiving side, are the same, the state will be that period B < period CT < period C, and the data pulse will be Can receive data. Furthermore, as can be understood from Figure 6B, the second
Since the detection of the third clock pulse CP ₂ is performed with a period C longer than the period CT of the clock pulse, the receiving side will be delayed with respect to the period CT, but the detection of the third clock pulse CP ₃ is performed with a period C longer than the period CT of the clock pulse.
Since it will be performed at cycle B, which is shorter than CT,
The above delay will be absorbed.

FIG. 6C shows a case where the oscillation frequency, which is the basis of operation on the receiving side, is lower than that on the transmitting side; in this case, clock pulses CP1 to CPn are received with period B. On the other hand, the clock pulses CP1 to CPn are received at period C for the first few times, but then they are received at period B, and the clock pulses CP1 to CPn are received at period C, and the clock pulses CP1 to CPn are received at period C, and the clock pulses CP1 to CPn are received at period B after that. Data pulses can be stably received even if there is a slight difference in transmission frequency.

As mentioned above, the period A is configured to be shorter than the clock pulse width S, but in cases where it is necessary to shorten the time for data transmission and reception, etc.
It becomes necessary to reduce the clock pulse width S.
In such a case, if the clock pulse width S is made relatively smaller than the period A, it will be difficult to detect the clock pulse, so the receiving side stores at least the clock pulse in a temporary memory until it is detected. Configure it as follows.

FIG. 7 illustrates this. In order to avoid duplication of explanation, the same reference numerals as in FIG.
The signals CP ₁ to CP _o are temporarily stored on the receiving side (microprocessor 5 or control circuits 13 and 20) until they are detected by sampling pulses SC1 to SCn. In addition, in Fig. 7, the data pulse
_The data pulses DP ₁ to DP _o are also temporarily stored until they are detected _.
It is not necessarily necessary to reduce the pulse width of . But usually data pulse DP ₁
~DP _o and the clock pulses CP ₁ ~ _{CP o} are usually the same, so an example is shown here.

In this case, even if the period A is longer than the clock pulse width S, the illustrated data pulse can be received. Note that the temporarily stored clock pulses CP1' to _{CP o} ' and data pulses DP1' to
DP _o ′ are respectively the sampling pulses SC
1 to SCn and timing pulses GD1 to SDn are cleared at the falling edge.

Although the control circuits 13 and 20 can be constructed from ordinary semiconductor circuits, the use of a microprocessor allows the device to be made smaller.

As explained above, according to the present invention, data pulses can be received more stably than in the past in a button telephone device that performs pulse data transmission between a plurality of key telephones and a main device. can.

[Brief explanation of the drawing]

FIG. 1 is an example of a pulse train transmitted between a main device and a key telephone in a conventional key telephone device. FIG. 2 is a block diagram of a button telephone device implementing the data transmission method according to the present invention, FIG. 3 is a pattern diagram showing an example of the data transmission method to which the present invention can be applied, and FIG. It's Matsuto. FIG. 5 is a pattern diagram for explaining transmission and reception states, and FIGS. 6 and 7 are pattern diagrams showing embodiments of the reception method according to the present invention. 1...Main device, 2...Station line, 3...Talking line, 4
...data line, 10,17...key telephone,
CP ₁ , CP ₂ ~ _{CP o} ... clock pulse, DP ₁ , DP ₂
~DP _o ...Data pulse.

Claims (1)

[Claims] 1. In a pulse control signal reception method in a button telephone device that performs pulse data transmission between a plurality of button telephones and a main device, the transmitted data format is divided into one data pulse and one clock pulse. On the receiving side, in order to detect the clock pulse, a sampling pulse with a short period A that is repeated until the clock pulse is detected, and a sampling pulse with a short period A, which is repeated until the clock pulse is detected, and
Alternatively, after the clock pulse is detected by a sampling pulse with a period B, a sampling pulse with a long period B is formed for detecting the next clock pulse, and the period A is longer than the width of the clock pulse, and the period B is longer than the width of the clock pulse. Each period is shorter than the period of the clock pulse, and the data pulse is detected after a certain period of time after the clock pulse is detected by the sampling pulse of the period A or the period B, and the clock pulse is detected by the sampling pulse of the period B. 1. A pulse control signal receiving system in a button telephone device, characterized in that when the clock pulse is not detected, a sampling pulse having the period A is formed to detect the next clock pulse. 2. In a pulse control signal reception method in a button telephone device that performs pulse data transmission between a plurality of key telephones and the main device, the transmission data format is alternately sent as one data pulse and a clock pulse. On the receiving side, in order to detect the clock pulse, a sampling pulse with a short period A that is repeated until the clock pulse is detected;
Alternatively, after the clock pulse is detected by a sampling pulse with a period B, a sampling pulse with a long period B is formed for detecting the next clock pulse, and the period A is longer than the width of the clock pulse, and the period A is longer than the width of the clock pulse, and the period A is longer than the width of the clock pulse. is shorter than the period of the clock pulse, and at least the clock pulse is temporarily stored in the memory until detected by the sampling pulse of the period A or period B, and the clock pulse is temporarily stored in the memory by the sampling pulse of the period A or period B. The data pulse is detected after a certain period of time after the stored clock pulse was detected, and if no clock pulse is detected by the sampling pulse of the period B, a sampling pulse of the period A is formed and the next pulse is detected. 1. A pulse control signal receiving system in a button telephone device, characterized in that the clock pulse of the button is detected.