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JPH025530A - Gettering for impurity and crystal defect - Google Patents

Gettering for impurity and crystal defect

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Publication number
JPH025530A
JPH025530A JP15717288A JP15717288A JPH025530A JP H025530 A JPH025530 A JP H025530A JP 15717288 A JP15717288 A JP 15717288A JP 15717288 A JP15717288 A JP 15717288A JP H025530 A JPH025530 A JP H025530A
Authority
JP
Japan
Prior art keywords
regions
crystal defect
region
gettering
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15717288A
Other languages
Japanese (ja)
Inventor
Isao Murakami
村上 勇雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP15717288A priority Critical patent/JPH025530A/en
Publication of JPH025530A publication Critical patent/JPH025530A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To prevent contamination by impurities from the surface of a semiconductor substrate and the like and to prevent element characteristics from deteriorating by a method wherein crystal defect regions are each formed in scribing lanes and the impurities from the surface of the semiconductor substrate and a crystal defect layer in the vicinity of the surface of the substrate are gettered. CONSTITUTION:Scribing lanes 3 are formed between semiconductor elements on a semiconductor substrate 1 and a crystal defect region 4 is formed in each lane 3. That is performed by a method wherein the regions 4 are formed by inflicting mechanically a damage before semiconductor element regions 2 are formed. If the crystal defect formation regions 4 are outside of the regions 2, the regions 4 may be scattered outside of the regions 2 even if the regions 4 is not as one region. Then, the elements are each formed on the regions 2 and after that, each scribing region 5 is mechanically cut. Gettering of contamination from the exterior, the interior of the substrate 1 and a crystal defect layer in the vicinity of the surface of the substrate becomes possible without performing a special heat treatment and the efficiency of the elements is increased.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体素子の形成方法のうち、素子特性を劣化
させる不純物および結晶欠陥を、素子領域から排除する
技術、即ちゲッタリング技術に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for forming a semiconductor device, and relates to a technique for eliminating impurities and crystal defects that degrade device characteristics from a device region, that is, a gettering technique.

従来の技術 従来のゲッタリング技術としては、リンゲッタリング技
術、イントリンシックゲッタリング技術。
Conventional technology Conventional gettering technologies include ring gettering technology and intrinsic gettering technology.

バックサイドダメージ処理、ポリシリコンバックシール
処理など種々提案されている。
Various proposals have been made, including backside damage treatment and polysilicon back seal treatment.

発明が解決しようとする課題 リンゲッタリング技術では、第3図(a)に示す様に、
半導体基板1の裏面にリン化合物領域eを形成し、10
00℃程度の熱処理中に不純物等をゲッターするが、素
子の微細化に伴ない高温熱処理が不可能となってきた。
Problems to be Solved by the Invention In the ring-gettering technology, as shown in FIG. 3(a),
A phosphorus compound region e is formed on the back surface of the semiconductor substrate 1,
Impurities and the like are gettered during heat treatment at about 00°C, but as elements become smaller, high-temperature heat treatment has become impossible.

まだ、イントリンシックゲッタリング技術は、第3図(
1))に示す如く、半導体基板1内に含まれる酸素を析
出させ、酸素析出物形成領域7を形成し半導体基板1の
表面および裏面にデヌーテットゾーン(DZ領域8)と
呼ばれる無酸素層を形成するものであるが、素子形成中
の熱処理により、析出酸素が溶融しゲッタリング能力が
低下してしまう。
However, the intrinsic gettering technology is not yet effective as shown in Figure 3 (
As shown in 1)), oxygen contained in the semiconductor substrate 1 is precipitated to form an oxygen precipitate formation region 7, and an oxygen-free layer called a denoutet zone (DZ region 8) is formed on the front and back surfaces of the semiconductor substrate 1. However, during the heat treatment during element formation, the precipitated oxygen melts and the gettering ability decreases.

半導体基板の裏面処理として、バックザイドダメージや
ポリシリコンバックシールなどの技術があるが、裏面に
ゲッタリング源があるため、表面層からの汚染に対する
効力が低いという問題があった。
Techniques such as backside damage and polysilicon back sealing are available for processing the backside of semiconductor substrates, but since there is a gettering source on the backside, there is a problem in that they are less effective against contamination from the surface layer.

課題を解決するための手段 本発明では、半導体基板表面に形成した半導体素子をチ
ップ状に分割するためのスクライプレーン領域内に結晶
欠陥領域を形成した。結晶欠陥領域形成工程は半導体素
子形成前あるいは、金属類使用工程前の途中工程とした
。金属類使用工程後では、素子製造工程において高温処
理が不可能なため、ゲッタリング効果がないためである
Means for Solving the Problems In the present invention, a crystal defect region is formed in a scribe plane region for dividing a semiconductor element formed on the surface of a semiconductor substrate into chips. The crystal defect region forming step was performed before the semiconductor element was formed or during the process of using metals. This is because after the process of using metals, high temperature treatment is not possible in the element manufacturing process, so there is no gettering effect.

作  用 結晶欠陥自体が、不純物や他の欠陥をゲッタリングする
効力をもつことはよく知られている。本発明ではスクラ
イプレーン内に、結晶欠陥領域を形成することで半導体
基板の表面からの不純物や、表面近傍の結晶欠陥をゲッ
ターすることができる。
It is well known that functional crystal defects themselves have the effect of gettering impurities and other defects. In the present invention, impurities from the surface of the semiconductor substrate and crystal defects near the surface can be gettered by forming a crystal defect region in the scribe plane.

従って、ゲッタリングのだめの特殊な熱処理は不要であ
り、工程途中でゲッタリング能力が匹下することなく、
表面からの不純物汚染等を防止でき、かつ、素子領域外
である為、素子特性を劣化させることかない。
Therefore, there is no need for special heat treatment of the gettering pot, and the gettering ability does not deteriorate during the process.
It is possible to prevent impurity contamination from the surface, and since it is outside the device area, the device characteristics will not deteriorate.

実施例 半導体基板表面に形成した半導体素子をチップ状に分割
するために、第2図(a)に示す如く、半導体基板1上
に半導体素子2を形成すると同時に半導体素子間にスク
ライプレーン3を形成し、第2図(b)の断面図のスク
ライプ領域を切断するわけであるが、本発明では前記ス
クライプレーン3内に結晶欠陥領域4を形成した(第1
図(a))。本実施例では半導体素子領域2を形成する
前に結晶欠陥領域4を機械的にダメージを与えることに
よシ形成した。本実施例では、ダイヤモンドカッターに
よシ半導体基板表面に損傷を与えて結晶欠陥領域を形成
したが、他の手段により結晶欠陥領域4を形成しても本
発明は有効である。また結晶欠陥形成領域は、半導体素
子領域外であれば、第1図(、)に示した領域でなくて
もよく、半導体素子領域外に散在していてもよい。
EXAMPLE In order to divide the semiconductor element formed on the surface of the semiconductor substrate into chips, as shown in FIG. However, in the present invention, a crystal defect region 4 is formed in the scribe plane 3 (the first
Figure (a)). In this example, before forming the semiconductor element region 2, the crystal defect region 4 was formed by mechanically damaging it. In this embodiment, the crystal defect region was formed by damaging the surface of the semiconductor substrate using a diamond cutter, but the present invention is also effective even if the crystal defect region 4 is formed by other means. Further, the crystal defect forming region does not have to be the region shown in FIG. 1(,) as long as it is outside the semiconductor element region, and may be scattered outside the semiconductor element region.

次いで、半導体素子を領域2に形成した後、機械的にス
クライプ領域6を切断し、半導体素子を得た。
Next, after a semiconductor element was formed in region 2, the scribe region 6 was mechanically cut to obtain a semiconductor element.

本実施例で得られた半導体素子は、表面からの不純物汚
染や素子形成工程中で発生する欠陥等の影響が全くない
特性を示した。
The semiconductor device obtained in this example exhibited characteristics that were completely free from the effects of impurity contamination from the surface and defects generated during the device formation process.

発明の効果 本発明により、特殊な熱処理を施さずに、外部からの汚
染や、半導体基板内部や表面の結晶欠陥層のゲッタリン
グが可能となり、半導体素子の高性能化の一手段となっ
た。
Effects of the Invention The present invention makes it possible to remove contamination from the outside and getter the crystal defect layer inside and on the surface of a semiconductor substrate without performing any special heat treatment, thus becoming a means of improving the performance of semiconductor devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を説明するための図、第2図は従来の素
子形成方法を説明するための図、第3図は従来の技術を
説明するための図である。 1・・・・・・半導体基板、2・・・・・・半導体素子
形成領域、3・・・・・・スクライプレーン、4・・・
・・・結晶欠陥形成領域、6・・・・・・スクライプ領
域、6・・・・・・リン化合物領域、7・・・・・・酸
素析出物形成領域、8・・・・・・DZ(デヌーテット
ゾーン)領域。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 1・−手導体&抜 2−−+鼻本素子傾戚 3− スクライブレーン 4− 繍品欠陽形式4Il威 5− スクライフg域 !−千導体幕枝 ブ 積載 /3 〜5 1− 参塩体ts。 2・−素子形威碩戚 6− シン化合資領域
FIG. 1 is a diagram for explaining the present invention, FIG. 2 is a diagram for explaining a conventional element forming method, and FIG. 3 is a diagram for explaining a conventional technique. DESCRIPTION OF SYMBOLS 1...Semiconductor substrate, 2...Semiconductor element formation region, 3...Scribe plane, 4...
... Crystal defect formation region, 6 ... Scripe region, 6 ... Phosphorus compound region, 7 ... Oxygen precipitate formation region, 8 ... DZ (denutet zone) area. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 1 - Hand conductor & extraction 2 - + Nose element tilt 3 - Scribe lane 4 - Missing embroidery form 4 Il power 5 - Scribe g area! - 1,000 conductor curtain branches loading/3 ~ 5 1- Salt body ts. 2・-Element form Weishuo relation 6- Synthesis investment area

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板表面に形成したスクライブレーン領域
内に、半導体素子形成工程前あるいは工程途中に、結晶
欠陥領域を形成しておくことを特徴とする不純物および
結晶欠陥のゲッタリング方法。
(1) A method for gettering impurities and crystal defects, which comprises forming a crystal defect region in a scribe lane region formed on the surface of a semiconductor substrate before or during a semiconductor element formation process.
(2)結晶欠陥領域の形成工程が、半導体素子形成工程
の中の金属類使用工程よりも前であることを特徴とする
特許請求の範囲第1項記載の不純物および結晶欠陥のゲ
ッタリング方法。
(2) The method for gettering impurities and crystal defects according to claim 1, wherein the step of forming the crystal defect region is performed before the step of using metals in the semiconductor element forming step.
JP15717288A 1988-06-24 1988-06-24 Gettering for impurity and crystal defect Pending JPH025530A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15717288A JPH025530A (en) 1988-06-24 1988-06-24 Gettering for impurity and crystal defect

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15717288A JPH025530A (en) 1988-06-24 1988-06-24 Gettering for impurity and crystal defect

Publications (1)

Publication Number Publication Date
JPH025530A true JPH025530A (en) 1990-01-10

Family

ID=15643763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15717288A Pending JPH025530A (en) 1988-06-24 1988-06-24 Gettering for impurity and crystal defect

Country Status (1)

Country Link
JP (1) JPH025530A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005260042A (en) * 2004-03-12 2005-09-22 Nec Electronics Corp Semiconductor storage device, semiconductor device, and manufacturing method therefor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005260042A (en) * 2004-03-12 2005-09-22 Nec Electronics Corp Semiconductor storage device, semiconductor device, and manufacturing method therefor
US7790579B2 (en) 2004-03-12 2010-09-07 Nec Electronics Corporation Semiconductor storage device, semiconductor device, and manufacturing method therefor
US8039940B2 (en) 2004-03-12 2011-10-18 Renesas Electronics Corporation Semiconductor storage device, semiconductor device, and manufacturing method therefor

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