JPH0281111A - Power supply circuit for memory card - Google Patents

Abstract

PURPOSE:To attain the packaging of a battery with no power consumption at shipping of a memory card by using an external power supply connection signal and a 2nd semiconductor switch which is controlled by the battery output passed through a 1st semiconductor which to control this 1st semiconductor switch set between a built-in battery and a static RAM. CONSTITUTION:When a memory card is set at a terminal equipment, an exterminal power supply connection signal is applied to an OR gate 13 of a circuit 10 via a feeder 4 and voltage dividing resistances 15 and 16. Thus a 2nd semiconductor switch 12 is turned on and held by a battery 2. At the same time, a 1st semiconductor switch 11 is also turned on and held. Under such conditions, the voltage higher than the voltage of the battery 2 that passed through a reverse current preventing diode 3 is supplied to a static RAM 1. Thus the battery 2 consumes no power. Then the memory card is pulled out of the terminal equipment and the voltage passed through a serial diode 5 is supplied to the RAM 1 via both switches 11 and 12. Thus the recorded data are preserved. In such a constitution, the battery 2 can be packaged with no power consumption at output of the memory card.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power supply circuit for a portable memory card.

[Conventional technology]

FIG. 5 is a power supply circuit diagram of a conventional memory card. In the figure, 1 is a static RAM (Ramdom Access M
esory), 2 indicates a battery built into the memory card.

Static RAM 1 is interfaced with a terminal via address bus la, control bus 1b, and data bus 1c. static RA
M1 is connected to a power supply line 4 connected to the power supply side of the terminal, which is an external power source, through a reverse current prevention diode 3, and to a battery 2 in the battery holder through a series diode 5 and a limiting resistor 6. It is now possible to do so. 7 is a monitoring grinder, and 8 is a signal line for monitoring the battery 2.

Now, when the memory card is not installed in the terminal device, in other words, when the memory card is carried or carried, the battery 2 to the limiting resistor 6 is used.
, static RAM 1 through series diode 5
When a memory card is installed in the terminal, the power supply line 4 is connected to the power supply side of the terminal, and the static RAM is connected through the reverse current prevention diode 3.
1, and the data stored in the static RAM 1 is maintained. To check if there is a voltage drop in battery 2, check if the memory card is installed in the terminal.
It is detected by the terminal device through the monitor resistor 7 and the monitor signal line 8.

Incidentally, although FIG. 5 shows the case where there is only one static RAM 1, memory cards are becoming larger in capacity, and it is common to have a plurality of static RAMs 1 installed.

In such a case, static RA? Since the standby current per 11 RAMs is normally about 6 μA to 10 μA at a voltage of 3 μ and a temperature of 50° C., for example, when 16 static RAMs are mounted, a standby current of 96 to 160 μ is required.

However, since the memory card has a thin pancake structure that is the size of a business card, there is a limit to the capacity of the built-in battery, and the capacity from the viewpoint of mounting possibility is about 165 mA. Therefore, the battery life is 165■AH/96μ^= 1718 hours#
It is about 0.2 years, which is extremely short.

Since battery replacement is expected to be relatively frequent, a memory card power supply circuit as shown in FIG. 6 has been proposed as a countermeasure.

FIG. 6 is another power supply circuit diagram of a conventional memory card, which includes an auxiliary battery 30 in addition to the original battery 2.

This battery (hereinafter referred to as the main battery) 2 and the auxiliary battery 30 can be selectively switched into a static mode via a changeover switch 31. A.M.
It is designed to be connected to 1. The other configurations are substantially the same as the power supply circuit shown in FIG. 5, and corresponding parts are given the same numbers.

However, in such a conventional power supply circuit, the monitor resistor 7. The output of the battery 2 is checked on the terminal device through the monitor signal line 8, and when the voltage of the main battery 2 drops and replacement is required, the selector switch 31 is switched to the auxiliary battery 30 side. 30 to static RAM 1
During this time, the main power source 2 is replaced, and when the replacement is completed, the selector switch 31 is switched to the main battery 2 side again to supply power.

[Problem to be solved by the invention]

By the way, in such conventional power supply circuits, in order to compensate for the short battery life due to the large standby current, the battery is not used during the long distribution and sales process or during long-term storage. 2 has to be removed, which poses a problem in that battery management is very troublesome.

The present invention has been made in view of the above circumstances, and its purpose is to provide a memory card that allows a battery to be mounted on the memory card at the time of shipment, and that does not cause substantial battery consumption. It is there to provide the card's power circuit.

[Means to solve the problem]

A power supply circuit for a memory card according to the present invention includes a first semiconductor switch interposed between a built-in battery and a storage circuit, and a second semiconductor switch interposed between a control terminal of the first semiconductor switch and the battery. 2 semiconductor switches, and means for applying a signal indicating that an external power source is connected or an output signal of the battery via the second semiconductor switch to a control terminal of the second semiconductor switch.

[Effect]

According to the present invention, it is possible to ship the battery in a mounted state, and the battery is not substantially consumed just by being mounted, and battery management becomes easy.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS The power supply circuit of a memory card according to the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a power supply circuit diagram of a memory card according to the present invention, in which 1 is a static RAM that constitutes the memory circuit that is the main body of the memory card, 2 is a battery built into the memory card, and 3 is a reverse current prevention A diode, 4 is a power supply line, 5 is a series diode, and 6 is a limiting resistor.

Static RAM 1 is interfaced with the terminal via the address bus LAS control bus lb and data bus 1c when the memory card is installed in the terminal, and writing to or reading from it is performed. There is. Also, at this time, the power supply line 4 is connected to the power supply side of the terminal, which is an external power supply, and power is supplied to the static RAM 1 through the power supply line 4 with the reverse current prevention diode 3 interposed therebetween.

On the other hand, the battery 2 mounted in the battery box of the memory card is not only connected to the circuit 10 but also connected to the static RAM 1 via a limiting resistor 6, a first semiconductor switch 11 in the circuit 10, and a series diode 5. Ori,
When the first semiconductor switch 11 is closed, power is supplied from the battery 2 to the static RAM 1. A control terminal 11a that controls opening and closing of the first semiconductor switch 11 is connected to the battery 2 through a second semiconductor switch 12 in the circuit 10, and the second semiconductor switch 12 is in a closed state. Then, a high level signal is inputted to the control terminal 11a of the first semiconductor switch 11 by the output of the battery 2, and the first semiconductor switch 11 is closed.

Control terminal 1 that controls opening and closing of the second semiconductor switch 12
The output end of a two-man OR circuit 13 is connected to 2a, and when the OR output from the OR circuit 13 is input, the second semiconductor switch 12 is closed.

1st. The second semiconductor switches 11 and 12 have substantially the same configuration, and their equivalent circuits are as shown in FIG. 2, for example.

One input terminal of the OR circuit 13 is connected to the second semiconductor switch 1
2, and the other input end is connected to the power supply line 4 via a distribution resistor 15, and is grounded via a distribution resistor 16. When the output of the battery 2 or the memory card is sent to the terminal and the power supply line 4 is connected to the terminal's power supply, the voltage divided by the distribution resistors 15 and 16 is input as an external power-on signal. It is now possible to do so.

In addition, 7 is a monitor resistor, 8 is a monitor signal line, 9 is a capacitor interposed between the battery 2 and the ground electrode, and 17 is a pull-down resistor.

In the memory card power supply circuit of the present invention, the battery 2 is mounted in the battery box of the memory card after the memory card is manufactured and prior to shipping. Even if the battery 2 is mounted, there is no signal input to both input terminals of the two-man OR circuit 13 in the circuit 10, and the first. The second semiconductor switch 11,12 remains open and the drain on the battery 2 is limited to the capacitor 9, the circuit 10 only. In the case of a CMOS process structure with a relatively small number of chips, such as a circuit IO, or a gate array, the current consumption is significantly less than 6 μA, and even if the battery is stored for a long time in the transportation and sales system, The consumption of 2 is negligible.

When the memory card is set in the terminal, an external power-on signal is first input from the power supply side of the terminal to the input terminal of the OR circuit 13 through the power supply line 4 and the distribution resistor 15.
An OR signal is output from the OR circuit 13 to the control terminal 12a, and the second semiconductor switch 12 is closed. This causes the battery 2 to connect to the control terminal 1 of the first semiconductor switch 11.
1a and the negative input terminal of the OR circuit 13, the output signal of the battery 2 is inputted to the first and second semiconductor switches 11 and 12.
is self-maintained in a closed state, the first semiconductor switch 11 is closed, and power is supplied from the battery 2 to the static RAM 1 through the limiting resistor 6, the first semiconductor switch 11, and the series diode 5.

However, in this state, reverse current prevention diode 3 is connected from the terminal side.
Since a voltage higher than the output voltage of the battery 2 is supplied to the static RAM l side through the battery 2, the battery 2 is not substantially consumed.

Also, between the terminal device and static RAM 1, there is an address bus la, a control bus lb, and a data node lc.
Data read and write operations are performed through this.

Further, the consumption of the battery 2 is monitored by the terminal device through the monitoring resistor 7 and the monitoring signal line 8 when the memory card is inserted into the terminal device.

After that, even if the memory card is removed from the terminal and the memory card is in the user's possession or carried, the first . Since the second semiconductor switch ratio 12 is maintained in a self-maintained state, the static RA is connected from the battery 2 through the limiting resistor 6, the first semiconductor switch 11, and the series diode 5.
The power supply to M 1 is maintained, the stored data is saved, and this state lasts as long as the battery 2 is not removed.

Note that the pull-down resistor 17 can have a large value because the circuit 10 has a CMOSIC gate array structure, and is usually set so that the voltage of the battery 2/the value of the pull-down resistor 17 becomes the consumption current of the static RAM 1. Ru.

In such an embodiment, it is possible to store the battery mounted on the memory card for a long period of time during the distribution and sales process, transportation process, etc., and there is no need to transport or store the battery with the battery removed, as was the case in the past. The trouble of battery management such as loss of batteries is eliminated.

Furthermore, although the above-described embodiment shows a configuration in which the OR circuit 13 is arranged within the circuit 10, it is possible to arrange this outside and use a commercially available CMOS.
It may also be configured using an IC. Furthermore, reverse current prevention diode 3, static RAM 1 and address bus 1a+
Of course, for the control bus lb, data bus lc, etc., conventionally known structures having similar functions may be used.

FIG. 3 is a power supply circuit diagram of a memory card showing another embodiment of the present invention. In this embodiment, an auxiliary battery 30 is provided, and a battery 2 (hereinafter referred to as the main battery) is activated at a predetermined timing.
It is now possible to switch between The switching circuit 20 has the same first and second semiconductor switches 11 as in the embodiment shown in FIG.
．． In addition to 12, the 3rd. Fourth and fifth semiconductor switches 23
．． 24.25.3 A human-powered OR circuit 26.2 A human-powered AND circuit 27 and an inversion circuit 28 are provided.

The positive electrode side of the auxiliary battery 30 is branched into two branches, one of which is connected to the limiting resistor 3.
6, connected to the static RAM 1 with a third semiconductor switch 23 and a series diode 35 interposed therebetween;
The other branch is further branched into two, one of which is connected to the switching circuit 20 through a fourth semiconductor switch 24, and the other is connected to a two-man AND circuit through a series resistor 37 and a fifth semiconductor switch 25. 27, and further branches along the way to power storage capacitors 38 and 27, respectively.
They are grounded in parallel with a discharge resistor 39 interposed therebetween.

Open semiconductor switch 23.24.25 in each section 3.4.5.

The control terminals 23a, 24a, and 25a for controlling closing are connected to each other and to the positive electrode side of the main battery 2 with an inverting circuit 28 interposed therebetween. When the output of the main battery 2 drops below a predetermined value, a high level signal is output from the inverting circuit 28 to the third
．． The signal is output to the control terminals 23a, 24a, and 25a of the semiconductor switches 23, 24, and 25 of No. 4.5, thereby closing each of the semiconductor switches 23, 24, and 25.

The other input terminal of the AND circuit 27 is connected to the positive electrode side of the main battery 2, and its output terminal is connected to the three-person OR circuit 26.
It is connected to the - input terminal of. The other two input terminals of the OR circuit 26 are connected to a power supply line 4 and a second semiconductor switch 12, which are connected to the power supply when the memory card is set in the terminal, as in the embodiment shown in FIG. and are respectively connected to the positive electrode side of the main battery 2.

The other configurations are substantially the same as those of the embodiment shown in FIG. 1, and corresponding parts are given the same numbers and explanations will be omitted.

In this embodiment, similarly to the embodiment shown in FIG. 1, after the memory card is manufactured, the main battery 2 and, if necessary, the auxiliary battery 30 are mounted, respectively. The consumption of the main battery 2 at this time is limited to only through the switching circuit 20 and the pull-down resistor 17, and is extremely small compared to the battery life and can be ignored. Regarding the auxiliary battery 30, all of the third, fourth, and fifth semiconductor switches 23, 24, and 25 are in the open state, and there is no substantial consumption.

When the memory card is set in the terminal and the power supply NlA 4 is connected to the power supply side of the terminal, a power-on signal is input to the three-man OR circuit 26, and the first and second semiconductor switches 11
．． 12 is in the closed state, and thereafter, even when the memory card is removed from the terminal, the first and second semiconductor switches 11.
12 is self-maintained in the closed state, and the output of the main battery 2 is supplied to the static RAM 1.
The stored data is retained as is.

When the terminal determines via the monitor resistor 7 and the monitor signal line 8 that the output of the main battery 2 has decreased to the extent that it requires replacement, the memory card is removed from the terminal and the main battery is replaced. Remove 2. When the main battery 2 is removed, the output from the main battery 2 becomes low level (OV), all inputs to the OR circuit 26 become low level, and the 1.2
The semiconductor switches 11 and 12 are in the open state, but at the same time, a high level signal is sent from the inverting circuit 28 to the
control terminals 23a of semiconductor switches 23, 24, 25,
24a and 25a, these become closed, and the output of the auxiliary battery 30 is connected to the limiting resistor 36 and the series diode 35.
In addition to being supplied to the static RAM 1 through the fourth semiconductor switch 24 and holding the stored data, it is supplied to the switching circuit 20 through the fourth semiconductor switch 24, and further to the fifth semiconductor switch 2.
A high level signal is input to one input terminal of the AND circuit 27 through the input terminal 5.

When the main battery 2 is removed, the voltage applied to the switching circuit 20 will drop depending on the value of the resistor 50 and the time constant of the capacitor 9.
The time constant is generally determined by the action of the resistor 50 and because the capacitor (not shown) interposed between the capacitor 9 and the series diode 5 and the static RAM 1 is usually set to a capacitance of several μF to several tens of μF. 100m to
5 or more, which is sufficiently longer than the time required for the voltage to drop to the minimum voltage for maintaining the stored data in the static RAM 1, and in addition, the third semiconductor switch 23.24.
Since the operating speed of 25 is very high, several Ions,
The stored data will not disappear during the switching operation from the main battery 2 to the auxiliary battery 30.

Then, when the main battery 2 is replaced with a new battery, the main battery 2
A high-level signal is input from the AND circuit 27 to the negative input terminal of the AND circuit 27, and a high-level signal is output from the AND circuit 27 to the OR circuit 26, and the first and second semiconductor switches 11 and 12 are closed again. , and at the same time, the inverting circuit 2
A low level signal is output from the 3rd.
4.5 semiconductor switches 23, 24 and 25 are opened, and power is again supplied from the main battery 2 instead of the auxiliary battery 30.

During switching at this time, the 3.4.5 semiconductor switches 23, 24, and 25 are opened in several tens of ns, but at this time, the time constants of the storage capacitor 38 and the discharge resistor 39 are maintained higher than this. Static RA by keeping
M 1 may maintain stored data.

In the above-described embodiment, the three-man powered child circuit 26, the two-man powered AND circuit 27, and the inverting circuit 28 are arranged inside the switching circuit 20, but it is also possible to arrange them outside the switching circuit 20. It may be constructed from a commercially available CMO5IC or the like.

In this embodiment, the main battery can be easily replaced without any inconvenience.

FIG. 4 is an electric circuit diagram showing still another embodiment of the present invention. In this embodiment, when the output of the main battery 2 drops to a predetermined value, the auxiliary battery 30 is automatically switched to the static RAM. It is configured to maintain power supply to 1,
Therefore, a comparator 41 for monitoring the output of the main battery 2 is provided.

One input terminal of the comparator 41 is connected to the positive electrode side of the main battery 2, and the other input terminal is connected to the reference voltage setting resistor 42.
43. The output terminal of the comparator 41 is branched into two, one being connected to the inverting circuit 28 in the switching circuit 40, and the other being connected to the -
are connected to the input terminals of each.

44 is a light emitting diode, and 45 is a limiting resistor, which are connected in series between the output terminal of the comparator 41 and the power supply line 4, so that the output of the main battery 2 decreases to a value that requires replacement. In this state, that is, when power is being supplied from the auxiliary battery 30, when a memory card is set in the terminal, the light emitting diode 44 is powered by power from the power supply line 4.
lights up to issue a warning and prompt the replacement of the main battery 2.

46 and 47 are 6.7 semiconductor switches provided in the switching circuit 40, the 6th semiconductor switch 46 is connected to the main battery operation monitor signal line 53, and the 7th semiconductor switch 47 is connected to the auxiliary battery operation monitor signal line. 54 respectively. Open the sixth semiconductor switch 46.

The control terminal 46a for controlling closing is connected to the second semiconductor switch 12.
The control terminal 47a which controls opening and closing of the seventh semiconductor switch 47 is connected in parallel to the control terminal 11a of the first semiconductor switch 11 to the main battery 2 via the inverting circuit 2.
8 through the 3.4.5 semiconductor switches 23, 24
．． 25 control terminals 23a, 24a, and 25a are connected to the output terminal of the comparator 41.

Additionally, there is a third
A reverse current prevention diode 56 is provided in place of the resistor 50 in the embodiment shown in the figure.

The other configurations are substantially the same as the embodiment shown in FIG. 3, and corresponding parts are given the same numbers and their explanation will be omitted.

In this embodiment, the main battery 2 and, if necessary, the auxiliary battery 30 are also mounted on the memory card after it is manufactured and prior to shipping. After that, when the memory card is set in the terminal, the 1st and 2nd semiconductor switches 11 and 12
is closed and self-maintained, and the static I? is continuously maintained from the main battery 2 through the first semiconductor switch 11. Power is supplied to AM l.

As the main battery 2 continues to wear out, the final voltage (approximately 2.5 V) approaches and becomes equal to the reference voltage set by the resistor 42.43 (a voltage slightly higher than the final voltage, for example, set to approximately 26 V). Then, the output from the comparator 41 becomes low level, and the inverting circuit 28 outputs a high level signal to each semiconductor switch 23.
24, 25.47 control terminals 23a, 24a.

25a, 47a, and each of these semiconductor switches 2
3°24.25.47 is closed.

As a result, the output of the auxiliary battery 30 is transferred to the static RA via the third semiconductor switch 23 and the series diode 35.
M 1 and the switching circuit 40 through the fourth semiconductor switch 24 .

Although the main battery 2 remains mounted at this time, the main battery 2 is not affected by the action of the reverse current prevention diode 51.

Although the first and second semiconductor switches 1L12 may be kept closed, the series diode 5 does not affect the semiconductor switches 11, 12.

For example, even if you are not aware that power is being supplied by the auxiliary battery 30, when a memory card is set in the terminal, power is supplied from the terminal to the static RAM 1 through the power supply line 4 and at the same time. , the limiting resistor 52, and the light emitting diode 51 are supplied with power, and the light emitting diode 51 lights up. This provides a visual warning that the power supply to the static RAM 1 is being switched from the main battery 2 to the auxiliary battery 3o.

Therefore, for example, if you pull out the memory card from the terminal to replace the main battery 2, and even if you remove the main battery 2, the auxiliary battery 3
Since power is continuously supplied from 0, no problem occurs.

Next, when a new main battery 2 is set, the output of the new main battery 2 will be the reference voltage (2, 6
V), the output of the comparator 41 becomes high level, and the AND circuit 27 is connected to the main battery 2 and the auxiliary battery 3.
0 and 0 simultaneously, a high-level AND signal is output from the AND circuit 27 to the OR circuit 26, and a high-level signal is also output from the OR circuit 26. Each sixth semiconductor switch 1
1.12.46 is closed, and power supply from the main battery 2 to the static RAM 1 via the limiting resistor 6, the first semiconductor switch 11, and the series diode 5 is started.

On the other hand, the high level signal from the converter 41 is output to the inverting circuit 28, and as a result, the inverting circuit 28 outputs a low level signal to each of the semiconductor switches 23, 24, 25, and 47. , 25.
47 is in an open state, and the output of the auxiliary battery 30 is cut off.
It won't be consumed any more.

Incidentally, the OR circuit 26, the AND circuit 27, and the inverting circuit 28 in the above-described embodiment may be constructed from a commercially available CMO3IC. Furthermore, in the above embodiment, the power source of the terminal device is used as the power source for the light emitting diode 51, but it is also possible to use the power source from the common line between the connection point between the cathodes of the series diodes 5 and 35 and the static RAM 1. Of course, it is also possible to do so.

The other configurations and operations are substantially the same as those of the embodiment shown in FIG. 3, and corresponding parts are given the same numbers and explanations will be omitted.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to install a power supply for retaining data stored in the memory circuit of a memory card after the memory card is manufactured and before shipping, and moreover, this can substantially reduce battery consumption. Since this does not occur, battery management becomes extremely easy, distribution costs can be reduced accordingly, and the convenience and reliability of the memory card can be improved.

[Brief explanation of the drawing]

FIG. 1 is a power supply circuit diagram of a memory card according to the present invention, and FIG.
The figure is an equivalent circuit diagram showing an example of a semiconductor switch, Section 3.4.
The figures are power supply circuit diagrams of memory cards showing different embodiments of the present invention, and FIGS. 5 and 6 are power supply circuit diagrams of conventional memory cards, respectively. 1...Static RAM 2...Battery 3...
Reverse current prevention diode 4...Power supply line 5...Series diode 6...Limiting resistor 10...Circuit 11.1
2... 1st. Second half-four body switch 13...OR circuit 20...switching circuit 30...auxiliary battery 40...
-Switching circuit 41... comparator Note that in the drawings, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Scope of Claims] 1. In a power supply circuit for a memory card that selectively uses a built-in battery and an external power source to retain data stored in a memory circuit, the power supply circuit comprises: a first semiconductor switch interposed between a control terminal of the first semiconductor switch and the battery, and a signal indicating that an external power source is connected; A power supply circuit for a memory card, comprising means for applying an output signal of the battery via a semiconductor switch to a control terminal of the second semiconductor switch.