JPH0287485A - Terminal board for electronic components - Google Patents
Terminal board for electronic componentsInfo
- Publication number
- JPH0287485A JPH0287485A JP63238182A JP23818288A JPH0287485A JP H0287485 A JPH0287485 A JP H0287485A JP 63238182 A JP63238182 A JP 63238182A JP 23818288 A JP23818288 A JP 23818288A JP H0287485 A JPH0287485 A JP H0287485A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- terminals
- electronic components
- terminal board
- cylindrical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3415—Surface mounted components on both sides of the substrate or combined with lead-in-hole components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3447—Lead-in-hole components
Landscapes
- Multi-Conductor Connections (AREA)
- Connections Arranged To Contact A Plurality Of Conductors (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔概 要〕
本発明は半導体チップ等を搭載した電子部品用端子板の
端子構造に関し、
筒状端子を用いることによ多端子間の分離を完全にして
かつ端子密度を高密度化した電子部品用端子板を提供す
ることを目的とし、
半導体チップ等を搭載し配線の各端子を格子状に配列し
た電子部品用端子板において、前記各端子が、端子ピン
を中心に筒状端子で囲み、その間に低訪電率、高絶縁性
材料を充填した対端子より成る構成とする。[Detailed Description of the Invention] [Summary] The present invention relates to a terminal structure of a terminal board for electronic components mounted with a semiconductor chip, etc., which uses cylindrical terminals to completely separate multiple terminals and achieve high terminal density. The purpose of the present invention is to provide a terminal board for electronic components in which a semiconductor chip, etc. is mounted and terminals for wiring are arranged in a grid pattern, in which each of the terminals is centered around a terminal pin. The structure consists of a pair of terminals surrounded by a cylindrical terminal and filled with a low-visibility, high-insulating material between them.
本発明は半導体チップ等を搭載した電子部品用端子板の
端子構造に関するものである。The present invention relates to a terminal structure of a terminal board for electronic components on which a semiconductor chip or the like is mounted.
近年の半導体素子の高速、高集積化に伴ない、該素子を
搭載するチップキャリアや配線板に対し【も要求が厳し
くなっている。高速化では素子を含む回路上の誘電率の
低減や特性インピーダンスの整合を図る必要があシ、高
集積化では配線や端子間ピッチの微細化が求められてい
る。As semiconductor devices have become faster and more highly integrated in recent years, requirements have become more stringent for chip carriers and wiring boards on which these devices are mounted. Higher speeds require lower dielectric constants and characteristic impedance matching on circuits containing elements, and higher integration requires smaller wiring and pitches between terminals.
従来の電子部品用端子板では集積度を高くするため、格
子状に端子を配設し、また面積当シの端子数を増すには
、端子間のピッチを小さくしていた。第3図はこの種の
従来例の説明図であシ、同図(α)の外観斜視図に示す
ように、半導体素子(IC)チップ13に対し、引出し
端子が多数の場合、以前のように2方向または4方向に
のみ配列された端子では賄いきれないから、図示のよう
に、端子を格子状に配設した端子板10を設け、多数の
端子ピン11を同図(b) K示すように貫通し【下面
に突出させ上面にICチップ13を搭載しその引出線を
各端子ピン11に接続する。この格子状端子ピン11を
プリント板14の所定の設置位置12の対応する接続穴
12(スルーホールまたはコネクタ)に挿入し接合また
は圧接する。In conventional terminal boards for electronic components, the terminals are arranged in a grid to increase the degree of integration, and the pitch between the terminals is reduced to increase the number of terminals per area. FIG. 3 is an explanatory diagram of this type of conventional example. As shown in the external perspective view of FIG. Since this cannot be covered by terminals arranged only in two or four directions, a terminal board 10 with terminals arranged in a grid pattern is provided as shown in the figure, and a large number of terminal pins 11 are arranged in the same figure (b). The IC chip 13 is mounted on the top surface of the IC chip 13 and its lead wires are connected to the respective terminal pins 11. The lattice-shaped terminal pins 11 are inserted into corresponding connection holes 12 (through holes or connectors) at predetermined installation positions 12 of the printed circuit board 14 and joined or pressed together.
この場合、ICチップの高密度化に伴ない端子数を増設
するとともに、端子ピッチをできるだけ小さくする方法
が採られたが、隣接端子間の絶縁特性や高周波特性によ
る制約や、物理的な限界があるため、所要の端子数を溝
たすには、端子配列の外形を大きくせざるを得ない場合
があった。In this case, the number of terminals was increased as the density of IC chips increased, and the terminal pitch was made as small as possible. Therefore, in order to accommodate the required number of terminals in the groove, the outer shape of the terminal array may have to be enlarged.
上記格子状端子板においては、搭載されたICチップを
さらに高密度化しようとしても容易ではない。In the above-mentioned lattice-shaped terminal board, it is not easy to further increase the density of the IC chips mounted thereon.
本発明は、ICチップの各素子の端子の信号には、入出
力のような動的信号と電源、グラウンドのような静的信
号があシ、動的信号は関連する静的便号電位の導体でじ
ゃへいすることによル、安定化する効果があることを利
用し、端子ピンとこれを囲む筒状端子の間に低誘電率の
高絶縁性材料を充填することによシ、端子ピッチをほぼ
同じにして端子数を等制約にすることができるため、こ
の筒状端子を利用することを考えたものである。In the present invention, the signals at the terminals of each element of an IC chip include dynamic signals such as input/output, and static signals such as power and ground, and the dynamic signals are based on the related static potential. Taking advantage of the stabilizing effect of blocking with a conductor, the terminal pitch can be reduced by filling a high insulating material with a low dielectric constant between the terminal pin and the cylindrical terminal surrounding it. The use of this cylindrical terminal was considered because it is possible to make the number of terminals almost the same and to impose equal constraints on the number of terminals.
本発明の目的は、筒状端子を用いることによシ端子間の
分離を完全にしてかつ端子密度を高密化した電子部品用
端子板を提供することにある。An object of the present invention is to provide a terminal board for electronic components in which the terminals are completely separated and the terminal density is increased by using cylindrical terminals.
前記目的を達成するため、本発明においては、半導体チ
ップ等を搭載し配線の各端子を格子状に配列した電子部
品用端子板において、第1図(α)〜(6)本発明の要
部構成に示すように、前記各端子が、端子ピン211を
中心に筒状端子21!で囲み、その間に低誘電率、高絶
縁性材料213を充填した対端子より成る構成とする。In order to achieve the above object, the present invention provides a terminal board for electronic components in which a semiconductor chip or the like is mounted and terminals of wiring are arranged in a lattice pattern, as shown in FIGS. As shown in the configuration, each terminal has a cylindrical terminal 21! centered around a terminal pin 211. It has a structure consisting of a pair of terminals surrounded by and filled with a low dielectric constant, high insulating material 213 between them.
上記対端子の構成によシ、信号の高速化を確保するため
の誘電率の低減と、動的信号を端子ピンに、静的信号を
筒状端子に割シ当て、外来ノイズからしやへいして信号
を安定化させる。また、該対端子のピッチは従来の端子
ピッチと同程度に設定できるから、はぼ2倍の端子密度
が得られる。The configuration of the pair of terminals mentioned above reduces the dielectric constant to ensure high-speed signal transmission, and allocates dynamic signals to the terminal pins and static signals to the cylindrical terminals to protect them from external noise. to stabilize the signal. Furthermore, since the pitch of the pair of terminals can be set to be approximately the same as the conventional terminal pitch, a terminal density approximately twice as high can be obtained.
第2図(8)〜(6)は本発明の実施例の構成説明図で
ある。同図(α)が第3図(α)と異なる点は、端子板
10の格子状対端子21と、対応するプリント板14の
設置部20における端子パッド22の形状である。FIGS. 2(8) to 2(6) are explanatory diagrams of the configuration of an embodiment of the present invention. The difference between FIG. 3(α) and FIG. 3(α) is the shape of the grid-like paired terminals 21 of the terminal board 10 and the terminal pads 22 in the corresponding installation portion 20 of the printed board 14.
すなわち、格子状対端子21は、第1図(α) 、 (
b)に示すように、それぞれ端子ピン211を中心にし
て筒状端子212で囲み、その間にたとえばテフロンの
ような低誘電率、・高絶縁性材料を充填する。そして、
プリント板14への接合形式に応じ、その端部を質化さ
せる。同図(α)は斜めに切欠した上等長としたもので
、プリント板14の表面配線に設けた端子パッド22は
円内拡大図に示すように、切欠部の端子端面と対応した
形状に形成され、これに対し【同図(6)に示すように
はんだ部25を形成し筒状端子222にはんだ接合され
る。That is, the lattice-shaped pair terminals 21 are arranged as shown in FIG. 1 (α), (
As shown in b), each terminal pin 211 is surrounded by a cylindrical terminal 212, and a low dielectric constant, high insulating material such as Teflon is filled between them. and,
Depending on the type of bonding to the printed board 14, its edges are textured. In the same figure (α), the terminal pad 22 provided on the surface wiring of the printed circuit board 14 has a shape corresponding to the terminal end surface of the notch, as shown in the enlarged view of the circle. A solder portion 25 is formed thereon and soldered to the cylindrical terminal 222, as shown in FIG.
第1図(6)は切欠部の端子ピン211の先端を筒状端
子212から廂丁ようにI4・曲させたものであシ、は
んだ付の際の短絡を防止するものでおる。同図(C)は
、端子ピン211をプリント板14のスルーホールに挿
入し、内部または裏面の配線と接合し、筒状端子は表面
配線と接合される。なお接合方法ははんだ接合に限定さ
れない。In FIG. 1(6), the tip of the terminal pin 211 in the notch is bent I4 in a direction from the cylindrical terminal 212 to prevent a short circuit during soldering. In the same figure (C), the terminal pin 211 is inserted into the through hole of the printed board 14, and is connected to the wiring inside or on the back surface, and the cylindrical terminal is connected to the surface wiring. Note that the joining method is not limited to solder joining.
以上説明したように、本発明の対端子は、従来の端子ピ
ンと同程度のピッチで格子状端子に形成され、それぞれ
2つの端子として用いられるから、はぼ2倍に端子数を
増設したのと等価となる。その用法は端子ピンを入出力
等の動的信号に、筒状端子を電源、グラウンド等の静的
信号に充当するようにする。その間に低誘電率、高絶縁
性材料を充填することによシ、高周波における信号遅延
が低減され、かつ外部ノイズに対するしゃへい効果が十
分性なわれる。As explained above, the paired terminals of the present invention are formed into lattice-shaped terminals with the same pitch as conventional terminal pins, and each is used as two terminals, so it is possible to double the number of terminals. be equivalent. The terminal pin is used for dynamic signals such as input/output, and the cylindrical terminal is used for static signals such as power supply and ground. By filling the gap with a material having a low dielectric constant and high insulating properties, signal delay at high frequencies is reduced and the shielding effect against external noise is sufficient.
また対端子の使用による機械的強度の向上も利点として
挙げることができる。Another advantage is the improvement in mechanical strength due to the use of paired terminals.
このように、本発明の対端子を用いた端子板は、格子状
端子を倍に高密度化するのみならず、電気的特性の改善
と機械的強度の向上を併せて図ることが可能となる。In this way, the terminal board using the paired terminals of the present invention not only doubles the density of the grid terminals, but also improves the electrical characteristics and mechanical strength. .
第1図(a)〜(6)は本発明の詳細な説明図、第2図
(a) 、 (6)は本発明の実施例の構成説明図、第
3図(α) 、 (6)は従来例の説明図でl)、図中
、10は端子板、13はICチップ、14はプリント板
、21は対端子、211は端子ピン、211は筒状端子
、213は低誘電率高絶縁材料、22は端子パッド、2
6ははんだを示す。
(bl
本発明の要部め1丞vv1回
第 1 図
(b) はんだ接合図
本発明の実施例の構成説明図
第 2 図FIGS. 1(a) to (6) are detailed explanatory diagrams of the present invention, FIGS. 2(a) and (6) are configuration explanatory diagrams of embodiments of the present invention, and FIGS. 3(α) and (6). is an explanatory diagram of a conventional example l), in the figure, 10 is a terminal board, 13 is an IC chip, 14 is a printed board, 21 is a pair terminal, 211 is a terminal pin, 211 is a cylindrical terminal, and 213 is a low dielectric constant high Insulating material, 22 is a terminal pad, 2
6 indicates solder. (bl Main parts of the present invention 1st part vv1st part Figure 1 (b) Solder joint diagram Configuration explanatory diagram of an embodiment of the present invention Figure 2
Claims (1)
た電子部品用端子板において、 前記各端子が、端子ピンを中心に筒状端子で囲み、その
間に低誘電率、高絶縁性材料を充填して分離した対端子
より成ることを特徴とする電子部品用端子板。[Scope of Claims] A terminal board for electronic components on which a semiconductor chip or the like is mounted and wiring terminals arranged in a grid pattern, each terminal having a terminal pin surrounded by a cylindrical terminal, and a low dielectric A terminal board for electronic components comprising a pair of separated terminals filled with a highly insulating material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63238182A JPH0287485A (en) | 1988-09-22 | 1988-09-22 | Terminal board for electronic components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63238182A JPH0287485A (en) | 1988-09-22 | 1988-09-22 | Terminal board for electronic components |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0287485A true JPH0287485A (en) | 1990-03-28 |
Family
ID=17026388
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63238182A Pending JPH0287485A (en) | 1988-09-22 | 1988-09-22 | Terminal board for electronic components |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0287485A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190055512A (en) * | 2017-11-15 | 2019-05-23 | 주식회사 엘지화학 | Substrate with insulated connector pins and method for manufacturing thereof |
-
1988
- 1988-09-22 JP JP63238182A patent/JPH0287485A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190055512A (en) * | 2017-11-15 | 2019-05-23 | 주식회사 엘지화학 | Substrate with insulated connector pins and method for manufacturing thereof |
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