JPH0310292A - Liquid crystal driving circuit - Google Patents

Abstract

PURPOSE:To obtain a highly-integrated liquid crystal driving circuit which has good output voltage characteristics by including a level shift circuit group, a selecting circuit group, a holding capacitor group, a source follower output circuit group, and a bias voltage power source. CONSTITUTION:A required number of reference voltages for a gradational display are selected by selecting circuits 121 -12k which are provided, output by output, held by holding capacitors 131 - 13k provided at respective output stages, and outputted by source follower circuits 191 - 19k provided at the respective output stages to decrease the number of output transistors(TR), so the high integration of an IC is enabled. Further, voltages passed through the level shifting circuits 171 - 17k which bias and level up only voltages to be leveled down by the source follower circuits 191-19k used for the output stages are applied to inputs of the selecting circuits 121 - 12k provided at the output stages as reference voltages required for a gradational display. Consequently, the circuit variance in an integrated circuit is small and the output voltage characteristics are improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a liquid crystal driving circuit, and more particularly to a liquid crystal driving circuit for an active matrix liquid crystal display panel that requires gradation display using digital image data as input.

[Conventional technology]

FIG. 4 is a block diagram of an example of a conventional liquid crystal drive circuit.

Generally, when displaying density gradations on an active matrix liquid crystal panel, the drive output voltage v(
1 must be applied to the source line from the drive output terminal group 161 to 16k, so as a select drive circuit,
It has shift register groups 101 to 10 and latch groups 111 to 11 of the stages to which image input data from the image data input terminal 6 is input, and drives select circuit groups 201 to 20k with their selection signals. So, the transistor
Output transistor group 311 to 3mk of switch 30
and each drive output terminal group 161 to 16k.
drive output voltage VQ was output.

That is, n-bit digital image input data Vi representing m gradations is input from the image data input terminal 6,
Clock pulse V applied to clock input terminal 1. The signal is transferred to the shift register groups 101 to 1olc by the latch input terminal 2, and transferred to the latch groups 111 to 11k by the retrace latch pulse vr.

The latched data is passed through the select circuit group 201 to 20k, and the first output transistor stage 311 to 3ml, which is grounded to the drive output terminal 161 of the transistor switch 30, is connected to the terminal 16k according to the data value. In the first output transistor stage 31, one of the m transistors up to ~3mk is turned on, and the m levels of gradation drain power supply voltage terminal group 11~ are turned on.
A corresponding voltage of 1 m is output, and a voltage of m gradations is supplied to an external liquid crystal display.

[Problem to be solved by the invention]

In the conventional drive circuit described above, when the number of gray levels is large, it is necessary to connect a low impedance power source with current capacity externally for the number of gray levels, and thick wiring is required when mounting on a liquid crystal panel. The number of LCD panels will increase, and the LCD panel set will also become larger.

Furthermore, as the number of pixels of a liquid crystal panel increases, the impedance of the drive circuit also needs to be lowered.

If the number of gradations is further increased, the disadvantage is that if a low impedance, multi-output buffer circuit is constructed on the same semiconductor substrate, the chip size becomes enormous and the cost of the drive circuit increases.

An object of the present invention is to provide a highly integrated liquid crystal drive circuit with good output voltage characteristics.

[Means to solve the problem]

The liquid crystal drive circuit of the present invention includes a shift register group at each stage for transferring image input data, a latch circuit group for inputting the output signal of each stage of the shift register group, and a number of levels corresponding to the number of gradations of the image. a reference voltage generation circuit, a level shift circuit group that outputs a level shift voltage obtained by shifting the reference voltage by a bias voltage, and one selection from the level shift voltage corresponding to the latch output of the latch circuit group. a select circuit group that selects a voltage; a hold capacitor group that uses the selected voltage as a holding voltage; a north follower output circuit group that inputs the holding voltage and connects in series to the transistor constant current circuit; and a bias voltage power supply that commonly supplies the bias voltage to the level shift circuit group.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
3 is a circuit diagram of the level shift circuit shown in the figure, and FIG. 3 is a timing diagram of each voltage in FIG. 1.

As shown in FIG. 1, the liquid crystal drive circuit transfers image input data vl from the image data input terminal 6 to a shift register group 101-10 to the stages, and a latch group 111 to latch the output signals of each stage. - 〜llk and the world's standard voltage V required for m-level gradation display of an image! Input the reference voltage generation circuit 3 for generating ~Vm and these reference voltages 1~vm, respectively,
Bias voltage V r e r that is commonly input at the same time
M level shift circuit group 17 for level shifting
1 to 17m and the n-bit latch signal vR1""""Rk held in each of the latch groups 111 to 11 are input, and the level shift voltage for m gradations output from the level shift circuit group 171 to 17m is generated. Value Vll~V, , -
Selection circuit group 121 for selecting each of V and m
12, hold capacitor groups 131 to 13 that hold the selected voltages selected by the select circuit groups 121 to 12k, and hold capacitors 131 of each stage.
A second follower composed of an output transistor group 141 to 14k and a constant current transistor group 151 to 15k for outputting a holding voltage VH held at ~13k.
In the amplifier group 191-19, the constant current transistor 151
-15 and a bias voltage power source 4 that supplies a bias voltage Lef to be applied to the common bias voltage input terminal group 31 to 3m of the level shift circuit group 1716 to 17m. be done.

As shown in FIG. 3, the image data human input v1 is inputted from the image data input terminal 6, and the clock pulse V1 is inputted from the image data input terminal 6. transfers the output signal to the shift register group 101-10,
Data for the next horizontal period is held in the latch group 111-11k by the latch pulse vr.

Each stage of the select circuit group 121 to 12 is controlled by the input signal of nl)it and is controlled by m analog switches.
The level shift voltage II corresponding to the data values VRI to VRk held in each stage of the latch groups 111 to 11 is converted to the level shift voltage group V11-. Select from V, m, and select the corresponding hold capacitor group 1 for each stage.
Hold at 31-13k.

The held voltage is applied to the output transistor group 141.
~14, a large capacity liquid crystal line is driven by a north follower output group 201~20k constituted by a constant current transistor group 151~15k.

At this time, the drive output voltage VQ to the source follower output circuit groups 191 to 19 can be determined by designing the output transistor groups 141 to 14 and the constant current transistor groups 151 to 15 to have the same dimension. Compared to the holding voltage VH input to the output circuit, the output voltage is lowered by the gate voltage Vref of the constant current transistor groups 151 to 15.

As a countermeasure, increase the input voltage by that voltage.

As shown in FIG. 2, the i-th level shift circuit 31 is
Two n-channel transistors Qnl and HQn2 follower circuit, input operational amplifier OP and output buffer B
It consists of

The output voltage Vp of the operational amplifier OP has a potential higher than the input voltage Vl by the amount of the bias voltage vre f supplied to the common bias voltage input terminal 31.

Similarly, the level shift voltages v, -Vl, -V, and m are all raised by Vref.

Therefore, the drive output voltage v,) is the constant current transistor 1
The effects of the gate voltages 51 to 15 are compensated for, and the effect is that the reference voltages 1 to 15 are equal to accurate values, and the drive current capacity is large.

In addition, the number of output transistors per stage is reduced to 1/m, and the number of drain voltage power supplies with large current capacity is also reduced to m.
It decreased to one-fold.

Incidentally, if the reference voltage Vl-Vm of the above-described embodiment is set in advance in accordance with the voltage characteristics of the transmittance of the liquid crystal display, the linearity of the gradation is good.

〔Effect of the invention〕

As explained above, the present invention selects a number of reference voltages necessary for displaying gradations on an active matrix liquid crystal panel by a select circuit provided for each output, and uses a hold capacitor provided at each output stage. By holding the selected reference voltage and outputting it through a second follower circuit provided in each output stage, the number of output transistors can be reduced, thereby making it possible to achieve high integration of the IC.

-Also, the reference voltage required for gradation display is pre-biased by the amount of voltage that will be leveled down in the output stage follower circuit, and then passed through a level shift circuit that increases the level. By adding it to the input of the circuit, it has the effect of reducing circuit variation within the integrated circuit and improving output voltage characteristics.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
3 is a timing diagram of each voltage in FIG. 1, and FIG. 4 is a block diagram of an example of a conventional liquid crystal drive circuit. 1... Clock input terminal, 2... Latch input terminal, 3... Reference voltage generation circuit, 31.
...i-th common bias voltage input terminal, 4...
...Bias voltage power supply, 5...Drain voltage terminal, 6...Image data input terminal, 101-1
0k...Shift register group, 111-11k.
...Latch group, 121-12k...10 11. Select circuit group, 131-13k...Hold capacitor group, 141-14 - Output transistor group, 151-15k... Constant current transistor group, 161-16k. ...Drive output terminal group, 171-17k...Level shift circuit group, 181-18k...n-bit signal, 191
~19k...North follower output circuit group, ■! ,
...i-th level 77 voltage, Vi...
- i-th reference voltage, vc...-clock pulse, Vi...image input data, v.・・・・・・
・Drive output voltage, vr...Latch voltage, Vre
f...Bias voltage.

Claims (1)

[Claims] A group of shift registers at each stage for transferring image input data,
a group of latch circuits that input the output signals of each stage of the shift register group; a reference voltage generation circuit that generates reference voltages of a number of levels corresponding to the number of gradations of an image; a level shift circuit group that outputs a level shift voltage; a select circuit group that selects one selected voltage from the level shift voltages in response to the latch output of the latch circuit group; and the selected voltage is used as a holding voltage. a group of hold capacitors, a group of source follower output circuits that input the holding voltage and are connected in series to the transistor constant current circuit, and a bias voltage power source that commonly supplies the bias voltage to the gate of the constant current transistor and the level shift circuit group. A liquid crystal drive circuit comprising: