JPH03156965A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To prevent a noise of an output signal by a large electric current and to increase a static-electricity breakdown strength of an output terminal by a method wherein a plurality of output circuits are divided into the required number of blocks, respective dedicates power supplies for source use are installed and the power supplied for source use and power supplies for substrate-potential fixation use are set to an identical potential and separate power supplies. CONSTITUTION:By using a plurality of first power-supply feed terminals PS1 corresponding to the number of blocks B which have divided a plurality of output circuits OC, a voltage is applied to sources of the output circuits OC inside the individual blocks B. A voltage whose potential is identical to that of the first power-supply feed terminals PS1 is applied, at a second power-supply feed terminal PS2, to a substrate including the plurality of output circuits OC; a substrate potential is fixed. Consequently, when static electricity is applied to terminals OP of the arbitrary output circuits OC, an excess voltage by the static electricity is dispersed to capacity components C attached to the terminals OP of the plurality of output circuits OC via a common interconnection PL of the second power-supply feed terminal PS2. Thereby, it is possible to prevent a noise of an output signal by a large electric current and to increase a static-electricity breakdown strength of an output terminal.

Description

[Detailed Description of the Invention] [Summary] Regarding a semiconductor integrated circuit device in which a plurality of output circuits are divided into a predetermined number of blocks, the present invention relates to a semiconductor integrated circuit device in which a plurality of output circuits are divided into a predetermined number of blocks, and the present invention relates to a semiconductor integrated circuit device in which a plurality of output circuits are divided into a predetermined number of blocks. A semiconductor integrated circuit device that divides a plurality of output circuits into a predetermined number of blocks to prevent noise in output signals caused by large currents, with the aim of A plurality of first power supply terminals to which a voltage is applied to each block, and a voltage having the same potential as the first power supply terminals are commonly applied to the substrate including the plurality of output circuits to increase the substrate potential. and second power supply terminals for fixing the integrated circuit chips, respectively, are arranged independently on the integrated circuit chip.

[Industrial application field]

The present invention relates to a semiconductor integrated circuit device, and particularly to a semiconductor integrated circuit device in which a plurality of output circuits are divided into a predetermined number of blocks.

As the speed of semiconductor integrated circuit devices increases, the impedance of output circuits becomes lower, and when the terminals of multiple output circuits change simultaneously, a large amount of current (1) (2) flows instantaneously, causing noise in the output signal. May be included.

For example, a circuit connected to the next stage may malfunction due to the noise component of this output signal. Furthermore, it is also necessary for semiconductor integrated circuit devices to improve the withstand voltage against static electricity from the outside, and it is desired to increase the static electricity withstand voltage of the output terminal while preventing noise in the output signal.

[Conventional technology]

Conventionally, as the speed of semiconductor integrated circuit devices has increased, the impedance of output circuits has become lower, and when the terminals of multiple output circuits change simultaneously, a large amount of current flows instantaneously, causing noise to be included in the output signal. However, in order to prevent noise in the output signal, a semiconductor integrated circuit device has been proposed in which a plurality of output circuits are divided into a predetermined number of blocks.

FIG. 6 is a diagram showing an example of a conventional semiconductor integrated circuit device. The semiconductor integrated circuit device shown in the figure is, for example, 8
Two output circuits OCo++-0Co+a, 0CO21~
0CO2B+... each into one block B0iB
. 2°... The structure is such that a dedicated power supply voltage is applied to each block. That is, block B
Vcco+ and vSSo+ are applied to block B; 2 for Vccoz and Vss
oz is applied. As a result, even if the terminals of a plurality of output circuits change simultaneously, the current that instantaneously flows through one power source is divided corresponding to the blocks, thereby preventing noise in the output signal.

[Problem to be solved by the invention]

As described above, semiconductor integrated circuit devices have been proposed in which a plurality of output circuits are divided into a predetermined number of blocks in order to prevent noise in output signals due to large currents. By the way, as a semiconductor integrated circuit device, it is necessary not only to prevent noise in the output signal due to a large amount of current (but also to strengthen (increase) the electrostatic withstand voltage of the output terminal.

However, as in the conventional semiconductor integrated circuit device shown in FIG.
1 to 0COZ11+... as a predetermined number of blocks B. l+
B112+ ... is divided into (3) (4) and each block Bo++ Boz+ ... has a dedicated power supply voltage VCCOIIVSSOI; VCCO2
In the configuration configured to apply 1v5Soz; '', the electrostatic withstand voltage of the output terminal was supposed to decrease.

FIG. 7 is a sectional view showing the output section of the semiconductor integrated circuit device of FIG. 6. As shown in the figure, the output section is, for example, an n-well 71 formed in a P-type semiconductor substrate 716.
Inside 5, there is an output circuit pad (terminal of the output circuit). The P impurity region (drain region D of the output circuit transistor) 712 connected to 11 and the n substrate contact HJf region 71L 714 to which the voltage VCCo+ for fixing the substrate potential (well potential) is applied, and the same voltage Vcco+
The impurity region (source region 5 of the transistor of the output circuit) 713 is applied with P impurity region (source region 5 of the output circuit transistor).

When static electricity with a positive potential is applied to the output pad 0Poz, one of the current routes through which current flows to clamp the overvoltage is as shown by the bold line in Figure 7, that is, the drain region. 712 to well 715. Power supply (electrode) ν via substrate contact region 711 and power supply line (aluminum wiring ttM) p t,o
There is something missing in CCQI. Here, the electrode Vcc6.
The smaller the impedance, the easier the current will flow and the faster the overvoltage can be clamped. However, usually aluminum wiring PL.

Since there is a resistance component R0 in the aluminum wiring PL near the output pad OPo++ to which static electricity is applied.

The smaller the impedance, the easier the current will flow and the stronger the resistance to electrostatic damage. That is, the larger the junction capacitance around the power supply, the greater the electrostatic withstand voltage of the output terminal.

However, in order to prevent noise in the output signal due to large currents as shown in FIG. , only the capacitance added to the output pads in each block can be used, and the capacitance added to the output pads in other blocks cannot be used. Therefore, a semiconductor integrated circuit device (5) (6) in which a plurality of output circuits are divided into a predetermined number of blocks as shown in FIG. 6 has a lower electrostatic withstand voltage than one in which the circuit device is not divided into blocks.

Specifically, in the semiconductor integrated circuit device of FIG. 6, when static electricity is applied to the output j pad OPo++, block B. Output circuit pads within 2 0PO21 to 0PO211
The capacitances added to the output circuit pads in other blocks do not contribute to the impedance reduction of the aluminum wiring PL, and block B. Output circuit pad OP in l
Only the capacitance added to o+□ to OPo+8 lowers the impedance of the aluminum wiring PL, making it impossible to sufficiently increase the electrostatic withstand voltage of the output terminal.

SUMMARY OF THE INVENTION In view of the above-mentioned problems with conventional semiconductor integrated circuit devices, it is an object of the present invention to prevent noise in output signals caused by large currents and to increase the electrostatic withstand voltage of output terminals.

[Failure to solve the problem]

FIG. 1 is a block circuit diagram showing the principle of a semiconductor integrated circuit device according to the present invention.

According to the present invention, there is provided a semiconductor integrated circuit device in which a plurality of output circuits OC are divided into a predetermined number of blocks B to prevent noise in output signals caused by large currents, and the output circuits in each block B are provided. a plurality of first power supply terminals PSI without applying a voltage to the source of the OC for each block B; and the first power supply terminal ps to a substrate including the plurality of output circuits OC. A second power supply terminal P that fixes the substrate potential by commonly applying a voltage of the same potential.
Provided is a semiconductor integrated circuit device characterized in that SZs are provided independently on an integrated circuit chip.

[For production]

According to the semiconductor integrated circuit device of the present invention, the source of the output circuit OC in each block B is connected to the source of the output circuit OC in each block B by the plurality of first power supply terminals ps corresponding to the number of blocks B into which the plurality of output circuits OC are divided. A voltage (driving voltage) is applied thereto. Also, a substrate (well) containing multiple output circuits OC
On the other hand, a voltage having the same potential as the first (7) (8) power supply terminal PS is applied by the second power supply terminal PS2, and the substrate potential (well potential) is fixed. As a result, when static electricity is applied to the terminal (output pad) op of any output circuit OC, the overvoltage due to the static electricity is transferred to the common wiring PL of the second power supply terminal PS2.
The capacitance C added to the terminal OP of the plurality of output circuits OC is distributed through the capacitance C, and the electrostatic withstand voltage of the output terminal is increased.

As described above, in the semiconductor integrated circuit device of the present invention, a plurality of output circuits are divided into a predetermined number of blocks, each having a dedicated source power supply, and the source power supply and the substrate potential fixing power supply having the same potential. However, by using a separate power supply, it is possible to prevent noise in the output signal due to a large amount of current, and to increase the electrostatic withstand voltage of the output terminal.

〔Example〕

Embodiments of an eleven-conductor integrated circuit device according to the present invention will be described below with reference to the drawings.

FIG. 2 is a circuit diagram showing an embodiment of the semiconductor integrated circuit device of the present invention. As shown in the figure, the semiconductor integrated circuit device of this embodiment has, for example, eight output circuits OC, .
, 0C21 to 0Cza, . . . into one block B, , B2 . It is designed to be divided into... As a result, the semiconductor integrated circuit device of this embodiment, like conventional semiconductor integrated circuit devices, blocks the instantaneous current flowing into one power supply even when the terminals (output pads) of multiple output circuits change simultaneously. Divide according to
It is possible to prevent the generation of noise. However, the semiconductor integrated circuit device of this embodiment and the conventional semiconductor integrated circuit device are
The structure of the voltage for fixing the substrate potential is completely different.

That is, as is clear from FIG. 2, the semiconductor integrated circuit device of this embodiment is, for example, block B.

For the sources of output circuits OCz to 0C18 in block B2 and the sources of output circuits 0C21 to 0C28 in block B2, dedicated source voltages (power supplies) VCC++, Vss++, and VCCI21V are applied to each block, respectively.
SSI2 is applied and the output circuits OC++ to OC+
For the substrate (or well) containing e, 0C21 to OC28 (9) (10) ..., a voltage of the same potential as the source power supply is commonly applied to the substrate potential fixing voltage (electricity 1l) Vccz, Vssz is commonly applied. For example, in the output circuit OC1 composed of an inverter, the voltages applied to the sources of the P-type and N-type transistors constituting the inverter are source voltages Vccz and Vss++, and the voltage applied to the substrate of each transistor ( The voltages applied to the substrate potential fixing voltages VCC2 and VSS2 are applied to the substrate potential fixing voltages VCC2 and VSS2.

FIG. 3 is a circuit diagram for explaining the semiconductor integrated circuit device of FIG. 2. As shown in the figure, each output circuit (Q
Diodes Dc and Ds are provided at the terminals (for example, the output pad OP port) of C, , ) for flowing static overvoltage to the power supplies Vcc2 and Vssz. In the semiconductor integrated circuit device of this embodiment, for example, the output pad 0P
The positive static electricity applied to 11 is transmitted to the common wiring PLc of the substrate potential fixing voltage VCC2 via the diode Dc and flows to the power supply VCC2, and the capacitance added to each output bat is transferred from this common wiring PLc. A current is allowed to flow through it. Here, for example, static electricity applied to the output pad OP++ may cause the common wiring PLc
The additional capacitance that flows through the output pad OP
1. Output pad OPI□~op in the same block B1 as
, ll, but not only the output bats 0P21-OP28. in the other block B2. . . . , etc., it is possible to significantly strengthen the withstand voltage against static electricity compared to the semiconductor integrated circuit device shown in FIG. 6. Further, the additional capacitance of each output pad includes, of course, capacitance components parasitic in the band itself, wiring, etc., in addition to the capacitance due to the electrostatic breakdown prevention diode provided on each output pad.

In this way, the semiconductor integrated circuit device of this embodiment divides a plurality of output circuits into a predetermined number of blocks, provides dedicated source power supplies for each block, and connects the source power supplies and the substrate potential fixing power supply to the same potential. However, depending on the separate power supply,
, prevents noise in the output signal due to large current, and
Static electricity at the output terminal (11) (12) It is possible to increase the withstand voltage.

FIG. 4 is a diagram showing the output section of the semiconductor integrated circuit device of FIG. 2, with FIG. 4(a) showing a cross-sectional view and FIG. 4(b) showing a plan view.

As is clear from FIG. 4(a), the output section is, for example,
N-well 115 formed in P-type semiconductor substrate 116
In the output pad OP1. n to which a substrate potential fixing voltage VCCZ for fixing the substrate potential (well potential) is applied.

Substrate contact regions 111 and 114 and output circuits (OC
ll) to which a source voltage VCCI+ is applied, and a P impurity region (source region 5 of the transistor of the output circuit) 113. As shown in FIG. 4(b), the drain region 112 and the output pad OPz, the substrate contact region 111.114 and the substrate potential fixing voltage Vccz+, and the source region 113 and the source voltage Vcc++ are connected by aluminum wiring, respectively. It is connected.

As explained with reference to FIG. 2, source voltage vcc
II is the output circuit OCz~OC in block B1
+e is applied to the source, and the source voltage Vcc
+□ is the output circuit 0C21 to 0C in block B2
28 sources, thereby preventing noise in the output signal due to large currents. Further, the substrate potential fixing voltage Vccz is applied to all the output circuits OC1, ~OC, Il of this block Bl+B2+...
.

The static electricity applied to the substrate (well) of QC2, ~0C2s, ... and thereby the output pad is transferred to the common wiring PLc of the substrate potential fixing voltage Vcc2.
via multiple output circuits OC,, ~0CRs, OCz
+~0Czi.

Terminals (output pads) OPz to OP+s, OP
z+~op2. .

Capacity added to...CIl~CI8+CZI
~ CZ a + . . . are applied in a distributed manner to increase the electrostatic withstand voltage of the output terminal. In the above description, the source power source and the substrate potential fixing power source are high potential power sources νCCz+Vccl. , and VcCz have been described, but the same applies to 'C for the low potential power supplies Vssz+Vss+z and Vssz.

FIG. 5 shows (13) in the semiconductor integrated circuit device of the present invention. (14) FIG. 3 is a diagram for explaining bonding of a power source.

As shown in FIG. 5(a), in the package, the pad 201 of the source power supply (Vcc++) on the chip 200 side and the pad 202 of the substrate potential fixing voltage (Vccz) are connected to dedicated bosses 203, respectively. and 20
However, as shown in FIG. 5(b), the pad 201 of the source power supply
It is also possible to configure the substrate potential fixing voltage pad 202 to be bonded to a common post 205.

〔Effect of the invention〕

As described above in detail, in the semiconductor integrated circuit device of the present invention, a plurality of output circuits are divided into a predetermined number of blocks, each of which is provided with a dedicated source power supply, and the source power supply and the substrate potential fixing power supply are connected to each other. By using separate power supplies even though they have the same potential, it is possible to prevent noise in the output signal due to a large amount of current, and to increase the electrostatic withstand voltage of the output terminal.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing the principle of a semiconductor integrated circuit device according to the present invention, FIG. 2 is a circuit diagram showing an embodiment of the semiconductor integrated circuit device according to the present invention, and FIG. 3 is a block circuit diagram showing the principle of a semiconductor integrated circuit device according to the present invention. 4 is a diagram showing the output section of the semiconductor integrated circuit device of FIG. 2; FIG. 5 is a diagram illustrating power supply bonding in the semiconductor integrated circuit device of the present invention. , FIG. 6 is a diagram showing an example of a conventional semiconductor integrated circuit device, and FIG. 7 is a sectional view showing an output part of the semiconductor integrated circuit device of FIG. 6. (Explanation of symbols) B...Block, C...Additional capacitance, OC...Output circuit, OP...Output pad, (15) (16) PL...Second power supply terminal Common wiring, ps,...
- First power supply terminal, PS2... second power supply terminal.

Claims (1)

[Claims] 1. A plurality of output circuits (OC) are arranged in a predetermined number of blocks (B)
A semiconductor integrated circuit device is configured to prevent noise in an output signal caused by a large amount of current by dividing the circuit into a plurality of first circuits that apply a voltage to a source of an output circuit in each block. Power supply terminal (PS_1
), and a second power supply terminal (PS_2) that commonly applies a voltage of the same potential as the first power supply terminal to the substrate including the plurality of output circuits to fix the substrate potential. A semiconductor integrated circuit device characterized in that each device is independently provided on a chip.