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JPH03195360A - Loop formation circuit - Google Patents

Loop formation circuit

Info

Publication number
JPH03195360A
JPH03195360A JP33435789A JP33435789A JPH03195360A JP H03195360 A JPH03195360 A JP H03195360A JP 33435789 A JP33435789 A JP 33435789A JP 33435789 A JP33435789 A JP 33435789A JP H03195360 A JPH03195360 A JP H03195360A
Authority
JP
Japan
Prior art keywords
transistor
line
converter
potential side
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33435789A
Other languages
Japanese (ja)
Inventor
Yutaka Terasaki
寺崎 裕
Kazunori Masuko
増子 和則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Miyagi Ltd
Original Assignee
NEC Corp
NEC Miyagi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Miyagi Ltd filed Critical NEC Corp
Priority to JP33435789A priority Critical patent/JPH03195360A/en
Publication of JPH03195360A publication Critical patent/JPH03195360A/en
Pending legal-status Critical Current

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  • Dc-Dc Converters (AREA)
  • Interface Circuits In Exchanges (AREA)

Abstract

PURPOSE:To keep power consumption down by connecting two output terminals of a DC.DC converter of one input and two output respectively to an earth potential side and negative potential side of two-wire line through transistors, and feeding line voltage back to a switching controlling circuit. CONSTITUTION:The first output terminal of a DC.DC converter 1 is connected to an earth potential side of a line through a transistor(Tr) 3, and the second output terminal is connected to a negative potential side of the line through a Tr 4. The DC.DC converter 1 provided with a controlling circuit 2 on a primary side outputs electric power to two secondary sides. The absolute values of voltages generated in two secondary sides are equal to each other. Trs 3 and 4 are used for power supply, and a line voltage generating circuit 5 feeds the line voltage back to the controlling circuit 2. Voltage between emitter- collectors of the Trs 3 and 4 is so controlled that it is kept constant.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は交換機トランクに接続されるPCM端局装置な
どに適用されるループ形成回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a loop forming circuit applied to a PCM terminal equipment connected to a switching trunk.

〔従来の技術〕[Conventional technology]

従来、この種のループ形成回路は、第4図に示すように
、給電用のトランジスタ13のコレクタを2線式線路の
地気電位(GND)に近い、1線に接続し、エミッタを
エミッタ抵抗14を介して2線式線路の負電位(−48
V)に近い1線に接続し、コレクタとベースとを第1の
バイアス抵抗を介して接続し、ベースを第2のバイアス
抵抗を介して2線式線路の負電位に近い1線に接続する
とともに定電圧ダイオードのカソードに接続し、定電圧
ダイオードのアノードを2線式線路の負電位に近い1線
に接続した構成である。
Conventionally, this type of loop forming circuit, as shown in FIG. 14 to the negative potential of the two-wire line (-48
V), the collector and base are connected through the first bias resistor, and the base is connected through the second bias resistor to the one wire close to the negative potential of the two-wire line. It is also connected to the cathode of a constant voltage diode, and the anode of the constant voltage diode is connected to one wire close to the negative potential of the two-wire line.

〔発明が解決しようとする課題] 上述した構成のループ形成回路は、回路全体の消費電力
を抑えるなめに定電流特性を有しているので、給電抵抗
が小さくなる程、給電用のトランジスタでの消費電力が
増加し、発熱量が増加するという問題がある。
[Problem to be solved by the invention] The loop forming circuit having the above-mentioned configuration has a constant current characteristic in order to suppress the power consumption of the entire circuit, so the smaller the power supply resistance is, the more the power supply transistor is used. There is a problem that power consumption increases and heat generation increases.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のループ形成回路は1入力2出力のDCDCコン
バータの第1の出力端子を給電用の第1のトランジスタ
のエミッタに接続し、前記第1のトランジスタのコレク
タを2線式線路の地気電位側の線路に接続し、前記第1
の1−ランシスタのベースを地気電位に接続し、前記D
CDCコンバータの第2の出力端子を給電用の第2のト
ランジスタのエミッタに接続し、前記第2のトランジス
タのコレクタを前記2線式線路の負電位側の線路に接続
し、前記第2の1〜ランシスタのベースを負電位に接続
し、前記第1及び第2のトランジスタのコレクタに線間
電圧発生回路を接続し、前記DC−DCコンバータのス
イッチング制御回路に帰還した構成である。
The loop forming circuit of the present invention connects the first output terminal of a one-input, two-output DCDC converter to the emitter of a first transistor for power supply, and connects the collector of the first transistor to the ground potential of a two-wire line. Connect to the side track, said first
Connect the base of the 1-run transistor to the earth's potential, and
A second output terminal of the CDC converter is connected to the emitter of a second transistor for power supply, a collector of the second transistor is connected to a line on the negative potential side of the two-wire line, and the second output terminal is connected to the emitter of a second transistor for power supply. - The base of the RANCISTOR is connected to a negative potential, a line voltage generation circuit is connected to the collectors of the first and second transistors, and the voltage is fed back to the switching control circuit of the DC-DC converter.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

本発明の一実施例を示す第1図、第2図及び第3図を参
照すると、DC−DCコンバータ]は1次側にスイッチ
ング制御回路2を有し、1次側の直流電流を一定の高周
波スイッチングにより断続することにより、2つの2次
側へ電力を出力する。この時、2つの2次側に発生する
電圧の絶対値は等しくなる様にする。スイッチング制御
回路2は外部入力端子を有し、この外部入力端子に入力
される電圧により、スイッチングのデユーティ比を変化
させる機能を持つ。スイッチング制御回路2のスイッチ
ングデユーティ比が変化することにより、2次側へ出力
する電力量が変化し、出力電圧が変化する。トランジス
タ3.4は給電用1〜ランシスタであり、線間電圧発生
回路5は2線式線路の線間電圧をコンバータ1のスイッ
チング制御回路2の外部入力端子にフィーI〜バックし
ている。何らかの外的要因の変化により、線間電圧が増
加する場合、線間電圧発生回路5の出力電圧が大きくな
り、スイッチング制御回路2にフィードバックされ、ス
イッチング制御回路2はコンバータ1のスイッチング開
閉比を第2図に示すように開いている時間を長くする。
Referring to FIGS. 1, 2, and 3 showing an embodiment of the present invention, a DC-DC converter has a switching control circuit 2 on the primary side, and controls the DC current on the primary side at a constant level. Power is output to the two secondary sides by intermittent high-frequency switching. At this time, the absolute values of the voltages generated on the two secondary sides are made to be equal. The switching control circuit 2 has an external input terminal, and has a function of changing the switching duty ratio based on the voltage input to the external input terminal. As the switching duty ratio of the switching control circuit 2 changes, the amount of power output to the secondary side changes, and the output voltage changes. The transistor 3.4 is a power supply transistor, and the line voltage generation circuit 5 feeds back the line voltage of the two-wire line to the external input terminal of the switching control circuit 2 of the converter 1. When the line voltage increases due to a change in some external factor, the output voltage of the line voltage generation circuit 5 increases and is fed back to the switching control circuit 2, and the switching control circuit 2 adjusts the switching ratio of the converter 1 to the Increase the open time as shown in Figure 2.

この開時間が長くなることにより、伝達電力が減少し、
2次側に発生ずる電圧が小さくなる。また、線間電圧が
減少する場合、線間電圧発生回路5の出力電圧が小さく
なり、スイッチング制御回路2にフィードバックされ、
スイッチング制御回路2はコンバータ1のスイッチング
開閉比を第3図に示すように閉じている時間を流くする
。この閉時間が長くなることにより、伝達電力が増加し
、2次側に発生ずる電圧か大きくなる6上述の動作によ
り給電用のトランジスタ3,4のエミッタ・コレクタ間
電圧は常に一定に保たれる。
This longer opening time reduces the transmitted power and
The voltage generated on the secondary side becomes smaller. Further, when the line voltage decreases, the output voltage of the line voltage generation circuit 5 becomes smaller and is fed back to the switching control circuit 2,
The switching control circuit 2 controls the switching opening/closing ratio of the converter 1 during the closed period as shown in FIG. As this closing time becomes longer, the transmitted power increases and the voltage generated on the secondary side increases. 6 Due to the above operation, the emitter-collector voltage of the power supply transistors 3 and 4 is always kept constant. .

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、外的要因に影響さ
れることなく、給電用のトランジスタのコ1/クタ・エ
ミッ7タ間電圧を必要最小限に一定に保つことにより、
必要最小限め消費電力に抑えることかでき、これにより
ループ形成回路自体の発熱量を抑えることができる。
As explained above, according to the present invention, by keeping the voltage between the collector and emitter of the power supply transistor constant to the necessary minimum level without being influenced by external factors,
Power consumption can be kept to the minimum necessary level, and thereby the amount of heat generated by the loop forming circuit itself can be suppressed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図及び第3図は本発明の一実施例を示す図
、第4図は従来のループ形成回路を示す構成図である。 1・・・DC・DCコンバータ、2・・・スイッチング
制御回路、3.4・・トランジスタ、5・・・線間電圧
発生回路、6・・給電リレー、7.8,9.10・・・
抵抗器、11.12・・端子。
1, 2, and 3 are diagrams showing one embodiment of the present invention, and FIG. 4 is a configuration diagram showing a conventional loop forming circuit. DESCRIPTION OF SYMBOLS 1... DC/DC converter, 2... Switching control circuit, 3.4... Transistor, 5... Line voltage generation circuit, 6... Power supply relay, 7.8, 9.10...
Resistor, 11.12... terminal.

Claims (1)

【特許請求の範囲】[Claims] 1入力2出力のDC・DCコンバータの第1の出力端子
を給電用の第1のトランジスタのエミッタに接続し、前
記第1のトランジスタのコレクタを2線式線路の地気電
位側の線路に接続し、前記第1のトランジスタのベース
を地気電位に接続し、前記DC・DCコンバータの第2
の出力端子を給電用の第2のトランジスタのエミッタに
接続し、前記第2のトランジスタのコレクタを前記2線
式線路の負電位側の線路に接続し、前記第2のトランジ
スタのベースを負電位に接続し、前記第1及び第2のト
ランジスタのコレクタに線間電圧発生回路を接続し、前
記DC・DCコンバータのスイッチング制御回路に帰還
したことを特徴とするループ形成回路。
A first output terminal of a 1-input, 2-output DC/DC converter is connected to the emitter of a first transistor for power supply, and a collector of the first transistor is connected to a line on the earth potential side of the two-wire line. and connects the base of the first transistor to earth potential, and connects the base of the first transistor to the earth potential, and
The output terminal of the second transistor is connected to the emitter of a second transistor for power supply, the collector of the second transistor is connected to the line on the negative potential side of the two-wire line, and the base of the second transistor is connected to the negative potential side. , a line voltage generation circuit is connected to the collectors of the first and second transistors, and feedback is fed back to the switching control circuit of the DC/DC converter.
JP33435789A 1989-12-21 1989-12-21 Loop formation circuit Pending JPH03195360A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33435789A JPH03195360A (en) 1989-12-21 1989-12-21 Loop formation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33435789A JPH03195360A (en) 1989-12-21 1989-12-21 Loop formation circuit

Publications (1)

Publication Number Publication Date
JPH03195360A true JPH03195360A (en) 1991-08-26

Family

ID=18276470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33435789A Pending JPH03195360A (en) 1989-12-21 1989-12-21 Loop formation circuit

Country Status (1)

Country Link
JP (1) JPH03195360A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997047071A1 (en) * 1996-06-05 1997-12-11 Ntt Data Corporation Electric circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997047071A1 (en) * 1996-06-05 1997-12-11 Ntt Data Corporation Electric circuit

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