JPH03196529A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PURPOSE:To prevent the reaction of, Si and a metal at the time of heat treatment at a high temperature after the formation of a laminated film by forming metallic nitride films among metals on source/drain or a gate and substrate Si or gate Si. CONSTITUTION:Source/drain regions 15 and a gate electrode 13 are formed to the surface of a semiconductor substrate 10. A Ti film 17 is deposited on the whole surface of a wafer, and a TiSi2 film 18 is formed onto source/drain/ gate through lamp annealing. A nitride mixed film 19 shaped onto the surface of the Ti film is removed at that time, N2 ions are implanted to the whole surface, the TiSi2 film 18 is changed into a TiN film 110, and a W film 111 is deposited on TiN on source/drain/gate. Consequently, the nitride layer of a metal stable even through heat treatment exists between a second metal such as W and substrate Si. Accordingly, the reaction of the second metal and substrate Si in the reflow process of an SiO2 film on an element is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to the structure of a semiconductor device, and particularly to a field effect transistor in which metal or metal silicide is selectively formed on the source/drain.

(Prior Art) The miniaturization and high integration of MOS transistor integrated circuits using silicon substrates have been remarkable. However, as the device becomes finer, the contact hole between the metal wiring and the source/drain diffusion layer also becomes smaller, so this contact resistance tends to increase. Furthermore, due to miniaturization, the source/drain diffusion layer becomes shallower, which increases the sheet resistance of the diffusion layer. An increase in these resistances decreases the current driving power of the Mos transistor, causing deterioration in the speed of the device.

In order to solve such problems, it is known to form metal or metal silicide on the source/drain diffusion.

FIG. 3 shows, as an example of the prior art, a cross-sectional view of a Mos transistor in which a W film is formed on the source/drain/gate by selective CVD on Si.

An MO in which a 5in2 film 31 for element isolation, a gate polycrystalline silicon 32, a gate side wall Sin, and a film 33 are formed in advance.
In the S transistor, high-dose ions of As were implanted into the portion 34 that would become the source/drain diffusion layer, and the ions were dried at 900 °C in a drying oven.
This impurity is activated by oxidation at .degree. C. for 30 minutes (FIG. 3(a)).

Thereafter, the SiO□ film 35 on the source/drain/gate formed by this oxidation is removed by dilute 14F treatment to expose the Si surface (Fig. 3(b)).
A W film 36 is deposited only on the W film 36 using the selective CVD method (FIG. 3(C)), and then Sin,
A film 37 is deposited (FIG. 3(d)).

However, in this method, since the W film on the source/drain/gate reacts with the underlying Si at a temperature of 600° C. or higher, it is necessary to maintain the process after depositing the W film at a low temperature of 600° C. or lower. Therefore, it is not possible to perform the surface planarization process (approximately 900 degrees Celsius) using a PSG film melt as is currently being done, and problems such as thinning of the metal wiring such as Aa on top of the process and cutting at stepped parts occur. becomes.

As shown in FIG. 3(d), the sin is uneven.

A film is deposited, a resist is applied over the entire surface, the surface is flattened, and the entire surface is etched using reactive ion etching to form a sinter on the flat surface.

There is also a method of transferring it to the film surface, but in this case, the soft X-rays generated during reactive ion etching increase the number of neutral traps in the gate oxide film, which deteriorates the resistance of the device against hot electrons.

This problem can also be considered when A0 or AQ is used instead of W, and the limit temperature at which reaction with the underlying Si does not occur is equal to or lower than that in the case of W.

Another method is to use metal silicide with high heat resistance instead of pure metal such as W. In this case, since the metal silicide film is formed using the reaction between the sputtered metal and the substrate Si, the structure is such that the silicide is embedded in the substrate Si, and when trying to form a film on a shallow P-N junction of about 0.1- , the leakage current increases, and ultra-fine MO5
There are some aspects that make it unsuitable for application to Tr.

(Problem to be Solved by the Invention) As described above, in a MOS transistor in which metal is selectively formed on the source/drain, 5i0
There was a problem in that the metal/substrate Si reacted in the two-film adhesive flow process.

An object of the present invention is to provide a semiconductor device and a manufacturing method thereof to solve these problems.

[Structure of the invention]

(Means for Solving the Problems) The present invention has been made in view of the above circumstances, and a first invention includes a source/drain region formed on the surface of a semiconductor substrate, and a source/drain region formed on the semiconductor substrate. The present invention provides a semiconductor device including a gate electrode, a metal nitride layer formed on at least the source/drain region, and a metal film formed on the metal nitride layer.

Further, a second invention includes a step of forming a gate electrode and a source/drain region on a semiconductor substrate.

selectively over at least this source/drain region.
a step of forming a metal film, a step of nitriding this first metal film to form a metal nitride film, and a step of forming a second metal film on this metal nitride film.
An object of the present invention is to obtain a method for manufacturing a semiconductor device in which a metal film of 1 is selectively formed.

(Function) According to the method of the present invention, the second metal such as W and the substrate Si
Since there is a metal nitride layer between the metal nitride layer that is stable even during heat treatment at about 900°C, there is no reaction between the second metal and the substrate Si during the 5-in2 film deposition process on the device, and the source/drain P- The N-junction is well maintained. Further, when this structure is applied to the gate polycrystalline Si film, the breakdown voltage of the gate oxide film can be maintained satisfactorily.

In particular, the presence of this nitride layer also suppresses the diffusion of B in the P"-Si of the P-ch transistor to the outside (to the W film or the outside), and as shown in Figure 4, the contact resistance decreases when heated to high temperatures. It does not rise even after passing through the process.

(Example) Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 shows a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

A 5in2 film 11 for element isolation is formed, and a gate SiO2 film 12 and a polycrystalline S for gate electrode are formed on the part that will become the element.
i-film 4000 people13 was formed on the entire surface, then POCQ,
By heating in an atmosphere at 900° C. for 30 minutes, this polycrystalline silicon is used as a mask and processed into llo and 5p to form gate electrodes. Thereafter, 1000 SiO□ films are deposited on the entire surface of the wafer using the CVD method, and the entire surface is etched using reactive ion etching, leaving the gate sidewalls Sin and the film 14 only on the side surfaces of the gates. Next, As+ is 40KeV
A source/drain diffusion layer N+15 is formed by implanting 5XIO''cm<-2> ions and heat-treating at 900[deg.] C. for 10 minutes in a dry oxygen atmosphere (FIG. 1(a)).

The Sin film 16 (approximately 300 layers) formed on the source/drain/gate by this heat treatment is removed with a dilute HF solution (FIG. 1(b)).

Next, 300 Ti films 17 are deposited on the entire surface of the wafer by sputtering (Fig. 1(c)).
Approximately 300% of
A TiSi film 18 is formed. At this time, a TiN:Ti mixed film 19 is formed by nitriding the surface of the Ti film (Fig. 1(d)), and this film 19 is removed by heating in a solution containing hydrogen peroxide (Fig. 1(d)). e)) Next, nitrogen is introduced into this TiSi film 18 by implanting N2 ions across the entire surface at 20 KeV with a depth of 3 x 101'cm-'', and then the entire 18 is heat-treated at 900°C for 12 seconds in a N2 atmosphere. Change to TiN film 110 (first
Figure (f)), followed by TeWF, + SiH, + N2 (
71 Mixed gas system at 300°C
A 1000-layer W film 111 is deposited on top of the
)). Then, on top of that, a CVD method was applied to create a film containing a large amount of B and P (phosphorus) (approximately 10"cgl-"), (BPSG).
) film 112 is deposited on the entire surface of the wafer (Fig. 1 (h)).
, POCQ, the surface of this BPSG film is flattened by annealing at 850°C for 60 minutes in an atmosphere (see Figure 1).
i)).

Finally, a contact hole is made in this BPSG film and AQ113
is deposited on the entire surface by sputtering with 8,000 sputters and patterned (FIG. 1(j)).

The metal silicide deposited on the Si substrate used in the first embodiment is not limited to TiSi, but also silicides that can form a high melting point metal by nitriding, such as WSi,
, MoSi, Te are also good. Further, the metal formed by the selective CVD method is not limited to W, but any metal may be used as long as it can be selectively formed on the above-mentioned high melting point nitride. In addition, as a method for nitriding silicide, N
Although a method using 2 ion implantation is shown, heat treatment in an ammonia atmosphere, N2 atmosphere, etc. can be used as a substitute.

FIG. 2 shows a method for manufacturing a semiconductor device according to a second embodiment of the present invention. The implementation method up to Figure 1(b) is the same, and then by selective growth of Ti on Si, 300
A film 26 is formed on the source/drain/gate (FIG. 2(a)), and then N2 ions are added to the Ti film 20.
This Ti film was injected with 3
The composition of the film 27 is changed (FIG. 2(b)).

Thereafter, a 1000 W film 28 is selectively deposited on top of the TiN film 2 using a mixed gas system of WF, +SiH4+)I (FIG. 2(c)).

After that, the BPSG film 1-29 is deposited (
Figure 2(d)), and the surface was flattened by heat treatment at 850°C for 60 minutes in a POCQ atmosphere (Figure 2(e)).

Finally, an Al electrode 210 is formed (FIG. 2(f)).

The first selected CVD metal used in the second embodiment is Ti.
However, materials that can be selectively deposited on Si and form a high melting point metal by nitriding, such as W,
No., TiSi, etc. may also be used. Further, as a method for nitriding this metal, a method using N2 ion implantation is shown in the embodiment, but an ammonia atmosphere is used.

Heat treatment in a N2 atmosphere can be used instead.

〔Effect of the invention〕

As described above, according to the present invention, in a transistor structure in which metal is formed on the source/drain or gate to reduce parasitic resistance, metal nitride is directly placed on Si to prevent the reaction between SL and other metals. Due to the presence of a membrane,
High-temperature heat treatment after forming these laminated films (specifically, BPS
The breakdown voltage of the source/drain R junction or gate oxidation 1112 is maintained at a good level without the SL reacting with the metal due to the G glue flow process.

Furthermore, when TiN is used as the reaction prevention film, it is possible to prevent B from diffusing into the metal film from P''-Si of the P-ch transistor during high-humidity heat treatment, and the P''-Si and Ti
It also has the effect of keeping the contact resistance with the N film low.

[Brief explanation of drawings]

1 and 2 show an embodiment of the present invention,
FIG. 3 is a diagram showing the prior art, and FIG. 4 is a diagram showing an experimental example in which TiN acts as a diffusion barrier for B. to, 20.30...P-type Si substrate 11, 21.3
1... SiO□ for element isolation 12, 22... Gate 5ins 13, 23. 32... Gate polycrystal 5i14, 24.
33...Gate side wall 5in215, 25.34...
N+ diffusion layer 16, 35...Sin, film 18...TiSi, film 110, 27...TiN film 112, 29...BPSG film 37---CV DSin, film 17.26...Ti Film 19...TiN: Ti mixed film ill, 28.36...W film 113, 210...AQ electrode

Claims (2)

[Claims] (1) A source/drain region formed on the surface of a semiconductor substrate, a gate electrode formed on the semiconductor substrate, a metal nitride layer formed at least on the source/drain region, and this metal nitride layer. A semiconductor device comprising a metal film formed thereon. (2) A step of forming a gate electrode and a source/drain region on a semiconductor substrate, a step of selectively forming a first metal film on at least this source/drain region, and a step of nitriding this first metal film. a step of forming a metal nitride film;
A method for manufacturing a semiconductor device, comprising selectively forming a second metal film on the metal nitride film.