JPH0323705A - Equalizer amplifier circuit - Google Patents
Equalizer amplifier circuitInfo
- Publication number
- JPH0323705A JPH0323705A JP1158580A JP15858089A JPH0323705A JP H0323705 A JPH0323705 A JP H0323705A JP 1158580 A JP1158580 A JP 1158580A JP 15858089 A JP15858089 A JP 15858089A JP H0323705 A JPH0323705 A JP H0323705A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- amplifier circuit
- electrolytic capacitor
- circuit
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 26
- 230000008878 coupling Effects 0.000 abstract description 7
- 238000010168 coupling process Methods 0.000 abstract description 7
- 238000005859 coupling reaction Methods 0.000 abstract description 7
- 230000005236 sound signal Effects 0.000 abstract description 7
- 230000007257 malfunction Effects 0.000 abstract description 4
- 230000007547 defect Effects 0.000 abstract description 3
- 230000002950 deficient Effects 0.000 abstract description 2
- 230000003321 amplification Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005513 bias potential Methods 0.000 description 1
- 238000013016 damping Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、ビデオテーブレコーダに関し、特にノーマル
音声の再生処理に使用されるイコライザ増幅回路に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video table recorder, and particularly to an equalizer amplification circuit used for normal audio reproduction processing.
従来、ビデオテーブレコーダ(以下VTRと略す)のノ
ーマル音声の録再処理に使用されるイコライザ増幅回路
は、第3図に示す様に増幅回路A2及び増幅回路入力端
子Aへ接続される第4の抵抗R4、12のコンデンサC
2、第4のコンデンサC4及び増幅回路入力端子Bと増
幅回路出力端子C間に接続された第1,第2,第3の抵
抗R1,R2,R3と第1,第3のコンデンサc 1
,C3より構成されていた。動作について説明するとV
TRのノーマルオーディオ用ヘッドと02から或るタン
ク回路によりテープ上に磁気記録されたノーマル音声信
号は電気信号に変換され端子Aへ入力される。ここで、
R4は夕冫ク回路のダンピング用抵抗であり、またc4
は端子Aの直流電位カット用のカップリング用電解コン
デンサである。端子Aに入力されたノーマル音声信号は
、増幅回路の端子B,C間にあるRl,R2,R3とC
1より形或され周波数特性に沿って増幅され端子Cより
出力され、ライン増幅回路へ入力され、ラインアウトよ
り出力される。ここで03は端子B,Cの直流電位カッ
ト用の電解コンデンサである。Conventionally, an equalizer amplifier circuit used for recording and reproducing normal audio of a video table recorder (hereinafter abbreviated as VTR) has an amplifier circuit A2 and a fourth amplifier circuit connected to the amplifier circuit input terminal A, as shown in FIG. Resistor R4, 12 capacitor C
2. Fourth capacitor C4, first, second, and third resistors R1, R2, and R3 connected between amplifier circuit input terminal B and amplifier circuit output terminal C, and first and third capacitors c1
, C3. To explain the operation, V
A normal audio signal magnetically recorded on a tape by a certain tank circuit from the TR's normal audio head and 02 is converted into an electrical signal and input to terminal A. here,
R4 is a damping resistor for the evening circuit, and c4
is a coupling electrolytic capacitor for cutting the DC potential of terminal A. The normal audio signal input to terminal A is transmitted to Rl, R2, R3 and C between terminals B and C of the amplifier circuit.
1, is amplified along the frequency characteristics, is output from terminal C, is input to a line amplification circuit, and is output from line out. Here, 03 is an electrolytic capacitor for cutting the DC potential of terminals B and C.
次に、増幅回路A2の具体的な回路構戒及び動作につい
て第4図にて説明する。第4図において端子Aに入力さ
れたノーマル音声信号は、第1,第2のトランジスタ対
θ1,θ2と第3,第4のトランジスタθ3,θ4と第
10,第11の抵抗RI O,Rl 1と定電流源工,
より戒る差動増幅回路にて増幅される。ここでbは安定
化された定電圧端子であり、θ1,θ2の差動対のベー
スバイアス電位を決定する為のものです。また、第12
0゜抵抗R12はバイアス用抵抗です。ノーマル音声信
号は更にエミッタ端子が電源aに接続された第5のトラ
ンジスタθ5と定電流工2より威るエミッタ接地増幅回
路により増幅され、第6のトランジスタθ6と定電流源
工3より或るエミッタホロワ回路を介し出力端子Cへ出
力される。ここでCOは増幅回路の発振止め用のコンデ
ンサです。Next, the specific circuit structure and operation of the amplifier circuit A2 will be explained with reference to FIG. In FIG. 4, the normal audio signal input to terminal A is transmitted through the first and second transistor pair θ1, θ2, the third and fourth transistors θ3, θ4, and the tenth and eleventh resistors RI O, Rl 1 and constant current source,
It is amplified by a differential amplification circuit with a higher precision. Here, b is a stabilized constant voltage terminal, which is used to determine the base bias potential of the differential pair of θ1 and θ2. Also, the 12th
0° resistor R12 is a bias resistor. The normal audio signal is further amplified by a fifth transistor θ5 whose emitter terminal is connected to the power supply a and a common emitter amplifier circuit whose emitter is connected to the constant current source 2. It is output to output terminal C via the circuit. Here, CO is a capacitor for stopping oscillation in the amplifier circuit.
上述した従来のVTRのノーマル音声の再生処理に使用
されるイコライザ回路においては増幅回路の回路構或上
、入力端子に直流電位カット用のカップリング用電解コ
ンデンサC4が必ず必要となっているので、電解コンデ
ンサにおいてリーク電流の特性不良があった場合に、誤
動作する欠点がある。また、電解コンデンサを使用する
事はイコライザ増幅回路を形成する面でコストアップヘ
つながーる。In the equalizer circuit used for the normal audio reproduction processing of the conventional VTR described above, due to the circuit structure of the amplifier circuit, a coupling electrolytic capacitor C4 for cutting DC potential is always required at the input terminal. If the electrolytic capacitor has defective leakage current characteristics, it has the disadvantage of malfunctioning. Furthermore, the use of electrolytic capacitors increases the cost of forming the equalizer amplifier circuit.
本発明のVTRのノーマル音声の再生処理に使用される
イコライザ増幅回路は、GND基準入力端子を含む増幅
回路と増幅回路の出力端子と帰還端子間に直列に接続さ
れた第1,第2の抵抗と第2の抵抗に並列に接続された
第1のコンデンサと増幅回路の帰還端子と接地間に直列
に接続された第3の抵抗と第3のコンデンサと増幅回路
の入力端子と接地間に接続された第4の抵抗及び第2の
コンデンサを有している。The equalizer amplifier circuit used for normal audio reproduction processing of the VTR of the present invention includes an amplifier circuit including a GND reference input terminal, and first and second resistors connected in series between the output terminal and the feedback terminal of the amplifier circuit. and a first capacitor connected in parallel to the second resistor, a third resistor connected in series between the feedback terminal of the amplifier circuit and ground, and a third resistor connected in series between the third capacitor and the input terminal of the amplifier circuit and ground. and a fourth resistor and a second capacitor.
かくして、カップリング用電解コンデンサを省くことが
でき、電解コンデンサの不良による誤動作を防止するこ
とができる。In this way, the coupling electrolytic capacitor can be omitted, and malfunctions due to defects in the electrolytic capacitor can be prevented.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例を示すものであり、従来例を
示す第3図と同等部分は同一符号をもって示す。図にお
いて増幅回路A1の回路構成中入力端子AをGND基準
入力型に変更した事で従来端子Aに必要だった直流電圧
カット用のカップリング用電解コンデンサC4が不要と
なる。他の構戊部分は、第3図のそれと同等であり省略
する。FIG. 1 shows an embodiment of the present invention, and parts equivalent to those in FIG. 3 showing a conventional example are designated by the same reference numerals. In the figure, the input terminal A in the circuit configuration of the amplifier circuit A1 is changed to a GND reference input type, thereby eliminating the need for the coupling electrolytic capacitor C4 for DC voltage cut, which was conventionally required at the terminal A. The other structural parts are the same as those in FIG. 3 and will be omitted.
具体的に増幅回路AIの変更内容について第2図にて説
明する。増幅回路の従来例を示す第4図と同等部分は同
一符号をもって示す。図において入力端子Aにベース端
子の接続された第7のトランジスタθ7とダイオードD
1と定電流I4より形或された入力回路は、端子Aに入
力されたノーマル音声信号なθ7のエミッタホロワ動作
を介しダイオードD7にて直流電圧のシフトアップを行
い差動対を構或するトランジスタθ1,θ2のθlのベ
ースヘ信号を伝え、またθ1,θ2のベースバイアス電
圧をθ7,D1にて決定される。他の回路構成は第4図
のそれと同等であり省略する。The details of the changes to the amplifier circuit AI will be specifically explained with reference to FIG. Portions equivalent to those in FIG. 4, which shows a conventional example of an amplifier circuit, are designated by the same reference numerals. In the figure, a seventh transistor θ7 whose base terminal is connected to input terminal A and a diode D
1 and a constant current I4, the normal audio signal input to the terminal A is the normal audio signal θ7, and the input circuit shifts up the DC voltage at the diode D7 through the emitter follower operation of the transistor θ1 forming a differential pair. , θ2 to the base of θl, and the base bias voltages of θ1 and θ2 are determined by θ7 and D1. The other circuit configurations are the same as those shown in FIG. 4 and will be omitted.
以上説明したように本発明はVTRのノーマル音声の再
生処理に使用されるイコライザ増幅回路の入力端子をG
ND基準入力型に変更する事により入力端子に必要な直
流電圧カット用のカップリング用電解コンデンサを省略
出来、電解コンデンサの不良による誤動作がなくなる効
果がある。また電解コンデンサを省略することによりイ
コライザ増幅回路を形或する為のコストアップを防げる
効果がある。As explained above, the present invention provides a G
By changing to the ND reference input type, the coupling electrolytic capacitor for DC voltage cut required at the input terminal can be omitted, which has the effect of eliminating malfunctions due to defects in the electrolytic capacitor. Furthermore, by omitting the electrolytic capacitor, it is possible to prevent an increase in cost for forming the equalizer amplifier circuit.
第1図は本発明の一実施例図、第2図は第1図における
増幅回路A1の具体例図、第3図は従来例図、第4図は
第3図における増幅回路A2の具体例図である。
θ1,θ2,θ3,θ4jθ5,θ6,θ7・・・・・
・トランジスタ、DI・・・・・・ダイオード、Il+
I2+Is, I4・・・・・・定電流源、Cl,
C2,C3,C4,Co・・・・・・コンデンサ、Rl
,R2,R3,R4,Rl O,Rl 1・・・・・・
抵抗、a・・・・・・電源、b・・・・・・安定化され
た定電圧端子、A・・・・・・増幅回路の入力端子、B
・・・・・・増幅回路の帰還端子、C・・・・・・増幅
回路の出力端子、Al,A2・・・・・・増幅回路。FIG. 1 is an embodiment of the present invention, FIG. 2 is a specific example of the amplifier circuit A1 in FIG. 1, FIG. 3 is a conventional example, and FIG. 4 is a specific example of the amplifier circuit A2 in FIG. 3. It is a diagram. θ1, θ2, θ3, θ4jθ5, θ6, θ7...
・Transistor, DI...Diode, Il+
I2+Is, I4... Constant current source, Cl,
C2, C3, C4, Co... Capacitor, Rl
, R2, R3, R4, Rl O, Rl 1...
Resistor, a... Power supply, b... Stabilized constant voltage terminal, A... Input terminal of amplifier circuit, B
...Feedback terminal of the amplifier circuit, C...Output terminal of the amplifier circuit, Al, A2...Amplifier circuit.
Claims (1)
子2間に直列に接続された第1および第2の抵抗、前記
第2の抵抗に並列に接続された第1のコンデンサ、前記
帰還端子と接地間に直列に接続された第3の抵抗および
第3のコンデンサ、ならびに前記入力端子と接地間に並
列に接続された第4の抵抗及び第2のコンデンサを有す
ることを特徴とするイコライザ増幅回路。an input terminal, a feedback terminal, an output terminal, first and second resistors connected in series between the output terminal and the feedback terminal 2, a first capacitor connected in parallel to the second resistor, and the feedback terminal. and a third resistor and a third capacitor connected in series between the input terminal and the ground, and a fourth resistor and a second capacitor connected in parallel between the input terminal and the ground. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1158580A JP2518404B2 (en) | 1989-06-20 | 1989-06-20 | Equalizer amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1158580A JP2518404B2 (en) | 1989-06-20 | 1989-06-20 | Equalizer amplifier circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0323705A true JPH0323705A (en) | 1991-01-31 |
| JP2518404B2 JP2518404B2 (en) | 1996-07-24 |
Family
ID=15674795
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1158580A Expired - Fee Related JP2518404B2 (en) | 1989-06-20 | 1989-06-20 | Equalizer amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2518404B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5925500A (en) * | 1993-06-25 | 1999-07-20 | Polyfibron Technologies, Inc. | Method of making laser imaged printing plates utilizing ultraviolet absorbing layer |
| US7167050B2 (en) | 1999-08-10 | 2007-01-23 | Oki Electric Industry Co., Ltd. | Operational amplifier having large output current with low supply voltage |
-
1989
- 1989-06-20 JP JP1158580A patent/JP2518404B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5925500A (en) * | 1993-06-25 | 1999-07-20 | Polyfibron Technologies, Inc. | Method of making laser imaged printing plates utilizing ultraviolet absorbing layer |
| US7167050B2 (en) | 1999-08-10 | 2007-01-23 | Oki Electric Industry Co., Ltd. | Operational amplifier having large output current with low supply voltage |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2518404B2 (en) | 1996-07-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |