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JPH03268316A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH03268316A
JPH03268316A JP2067607A JP6760790A JPH03268316A JP H03268316 A JPH03268316 A JP H03268316A JP 2067607 A JP2067607 A JP 2067607A JP 6760790 A JP6760790 A JP 6760790A JP H03268316 A JPH03268316 A JP H03268316A
Authority
JP
Japan
Prior art keywords
alignment
alignment mark
mark
wafer
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2067607A
Other languages
Japanese (ja)
Inventor
Saeko Yamashita
山下 さえ子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2067607A priority Critical patent/JPH03268316A/en
Publication of JPH03268316A publication Critical patent/JPH03268316A/en
Pending legal-status Critical Current

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  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

PURPOSE:To enable detection even when the shape of an alignment mark is deformed to some extent, by performing alignment after the surface of the alignment mark is subjected to surface roughening treatment. CONSTITUTION:At the time of alignment of a photomask and a wafer in an exposing process, the surface of an alignment mark 2 formed on the wafer is subjected to a surface roughening treatment, and then alignment is performed. By roughening the surface of the alignment mark 2, the form of a detected signal is disordered, but the signal level is increased. That is, when an epitaxial layer 4 is grown on a substrate so as to cover the alignment mark 2, the bottom part surface of the alignment mark 2 is roughened and made to reflect on the epitaxial layer, thereby increasing the intensity of scattering light of the mark part of the epitaxial layer 4. Hence the alignment mark 2 can be detected even when the mark shape is deformed to some extent.

Description

【発明の詳細な説明】 〔概要] ウェハプロセスの露光工程におけるアしイメント方法に
関し。
[Detailed Description of the Invention] [Summary] This invention relates to an alignment method in an exposure step of a wafer process.

アライメントマークの形状が多少くずれても検出可能に
することを目的とし。
The purpose is to enable detection even if the shape of the alignment mark is slightly distorted.

1)露光工程におけるフォトマスクとウェハのアライメ
ントの際に、ウェハ上に形成されたアライメントマーク
の表面に粗面化処理を施した後にアライメントを行うよ
うに構成する。
1) When aligning a photomask and a wafer in an exposure process, the alignment is performed after roughening the surface of an alignment mark formed on the wafer.

2)前記粗面化処理はアライメントマークの表面にイオ
ンを衝撃して行うように構成する。
2) The surface roughening treatment is performed by bombarding the surface of the alignment mark with ions.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体装置の製造方法に係り、特にウェハプロ
セスの露光工程におけるアライメント方法に関する。
The present invention relates to a method of manufacturing a semiconductor device, and particularly to an alignment method in an exposure step of a wafer process.

〔従来の技術〕[Conventional technology]

近年の半導体工場のオンライン化に伴い、エラーの発生
により処理が停止することは避けなければならなくなっ
てきている。
As semiconductor factories have moved online in recent years, it has become necessary to avoid stopping processing due to the occurrence of errors.

ところが、露光装置の種類が増え、さらにウェハプロセ
スも複雑になり1ウエハ上に形成される暦数も増えてき
ているため、アライメントマークの形成がうまくいかず
、何層かでアライメントマ−りを兼用することも余儀な
くされている。
However, as the types of exposure equipment have increased, the wafer process has become more complex, and the number of patterns formed on one wafer has increased, it has become difficult to form alignment marks, and it has become necessary to create alignment marks in several layers. It is also forced to be used for both purposes.

従って、露光工程におけるアライメント時に。Therefore, during alignment in the exposure process.

アライメント信号が検出できなくなり、処理が停止して
しまうという問題を生じていた。
This has caused a problem in that the alignment signal cannot be detected and processing stops.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

本発明はアライメントマークの形状が多少くずれても検
出可能にすることを目的とする。
An object of the present invention is to enable detection even if the shape of an alignment mark is slightly distorted.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題の解決は。 What is the solution to the above problem?

1)露光工程におけるフォトマスクとウェハのアライメ
ントの際に、ウェハ上に形成されたアライメントマーク
の表面に粗面化処理を施した後にアライメントを行う半
導体装置の製造方法、あるいは 2)前記粗面化処理はアライメントマークの表面にイオ
ンを衝撃して行う半導体装置の製造方法により達成され
る。
1) A method for manufacturing a semiconductor device in which alignment is performed after roughening the surface of an alignment mark formed on a wafer during alignment of a photomask and a wafer in an exposure process, or 2) The roughening process. The processing is achieved by a semiconductor device manufacturing method in which ions are bombarded onto the surface of the alignment mark.

〔作用〕[Effect]

本発明はアライメントマークの表面を荒らして粗面化す
ることにより、検出信号の形状は不整形となるが信号の
レベルを高めて検出可能としたものである。
In the present invention, by roughening the surface of the alignment mark, the shape of the detection signal becomes irregular, but the level of the signal is increased and detection is made possible.

次に、第1図を用いてその理由を説明する。Next, the reason will be explained using FIG.

第1図(a)〜(p)は本発明の原理説明図である。FIGS. 1(a) to 1(p) are diagrams explaining the principle of the present invention.

図において、シリコン基板1に凸状のアライメント2が
形成され、その上に二酸化シリコン(SiO□)膜3が
被覆されている。
In the figure, a convex alignment 2 is formed on a silicon substrate 1, and a silicon dioxide (SiO□) film 3 is coated thereon.

(1)正常マークのアライメント(従来)第1図(a)
、 (b)は正常のアライメントマークの平面図と断面
図である。
(1) Normal mark alignment (conventional) Figure 1 (a)
, (b) are a plan view and a cross-sectional view of a normal alignment mark.

第1図(C)は位置に対する信号強度の分布で、レーザ
光をアライメントマーク上にレーザ光を走査したときの
散乱光の強度である。
FIG. 1(C) shows the distribution of signal intensity with respect to position, which is the intensity of scattered light when the laser beam is scanned over the alignment mark.

第1図(d)も位置に対する信号強度の分布で、レーザ
ステップアライメント(LSA) l)を用いたときの
信号強度を表す。
FIG. 1(d) also shows the distribution of signal intensity with respect to position, and represents the signal intensity when laser step alignment (LSA) l) is used.

この場合は、複数の凹または凸状のアライメントマーク
を間隔をおいて1列に並べてウェハ上に回折格子を構成
し、各マークをカバーするレーザビームを列の方向に垂
直に走査して得られる散乱・回折光を検出するもので、
出力信号はレーザがアライメントマークに重なっている
程強くなり。
In this case, a diffraction grating is formed on the wafer by arranging multiple concave or convex alignment marks in a row at intervals, and the laser beam covering each mark is scanned perpendicular to the direction of the row. It detects scattered and diffracted light.
The output signal becomes stronger as the laser overlaps the alignment mark.

その信号からアライメントマークの中心位置が求められ
る。
The center position of the alignment mark is determined from the signal.

1) N、Magome and N、5hirais
hi。
1) N, Magome and N, 5hirais
hi.

La5er Alignment Signal Si
mulationfor Analysis of A
I Layers。
La5er Alignment Signal Si
Mulation for Analysis of A
I Layers.

Proc、5PIF(Soc、Photo−optic
al InstrumentationEng、)、 
Vol108B、 p23B (1983)。
Proc, 5PIF (Soc, Photo-optic
al Instrumentation Eng.),
Vol108B, p23B (1983).

(2)正常マークのアライメント(本発明)第1図(e
)、 (f)は本発明による表面を荒らしたアライメン
トマークの平面図と断面図である。
(2) Alignment of normal marks (present invention) Fig. 1 (e
) and (f) are a plan view and a sectional view of an alignment mark with a roughened surface according to the present invention.

第1図(梢は位置に対する信号強度の分布で、レーザ光
をアライメントマーク上にレーザ光を走査したときの散
乱光の強度である。
FIG. 1 (The top shows the distribution of signal intensity with respect to position, and is the intensity of scattered light when the laser beam is scanned over the alignment mark.

この場合はマークの表面に対応する位置も散乱光がある
ため、マークの中央部にも検出信号が得られる。
In this case, since there is scattered light at a position corresponding to the surface of the mark, a detection signal is also obtained at the center of the mark.

第1図(ロ)も位置に対する信号強度の分布で、レーザ
ステップアライメントを用いたときの信号強度を表す。
FIG. 1(b) also shows the distribution of signal intensity with respect to position, and represents the signal intensity when laser step alignment is used.

この場合は、マーク表面の散乱光が検出されるため、不
整形のピークが多くでる。
In this case, since scattered light on the mark surface is detected, many irregularly shaped peaks appear.

従って、マークの中心位置は正確には求まらないが、信
号強度のレベルが高いので検出感度は第1図(d)の場
合と変わらない。
Therefore, although the center position of the mark cannot be determined accurately, the detection sensitivity is the same as in the case of FIG. 1(d) because the signal strength level is high.

(3)異常マークのアライメント(従来)第1図(i)
、 (j)は極端に高さの低いアライメントマークの平
面図、断面図である。
(3) Alignment of abnormal marks (conventional) Figure 1 (i)
, (j) is a plan view and a cross-sectional view of an alignment mark with an extremely low height.

第1図(財)は位置に対する信号強度の分布で、レーザ
光をアライメントマーク上にレーザ光を走査したときの
散乱光の強度である。
FIG. 1 shows the distribution of signal intensity with respect to position, which is the intensity of scattered light when the laser beam is scanned over an alignment mark.

この場合の信号強度は小さく、検出が困難となる。In this case, the signal strength is small and detection becomes difficult.

第1図(1)も位置に対する信号強度の分布で、レーザ
ステップアライメントを用いたときの信号強度を表す。
FIG. 1 (1) also shows the distribution of signal intensity with respect to position, and represents the signal intensity when laser step alignment is used.

この場合の信号強度も小さく、検出が困難となる。The signal strength in this case is also low, making detection difficult.

(4)異常マークのアライメント(本発明)第1図(ロ
)、(n)は本発明による表面を荒らした極端に高さの
低いアライメントマークの平面図、断面図である。
(4) Alignment of abnormal marks (present invention) FIGS. 1(b) and 1(n) are a plan view and a sectional view of an extremely low-height alignment mark with a roughened surface according to the present invention.

第1図(0)は位置に対する信号強度の分布で、レーザ
光をアライメントマーク上にレーザ光を走査したときの
散乱光の強度である。
FIG. 1(0) shows the distribution of signal intensity with respect to position, which is the intensity of scattered light when the laser beam is scanned over the alignment mark.

この場合はマークの表面に対応する位置も散乱光がある
ため、マークの全体に検出信号が得られる。
In this case, since there is scattered light at a position corresponding to the surface of the mark, a detection signal can be obtained over the entire mark.

第1図CP)も位置に対する信号強度の分布で、レーザ
ステップアライメントを用いたときの信号強度を表す。
FIG. 1 CP) is also a distribution of signal intensity with respect to position, and represents the signal intensity when laser step alignment is used.

〔実施例〕〔Example〕

第2図(a)〜(d)は本発明の一実施例を説明する図
である。
FIGS. 2(a) to 2(d) are diagrams illustrating an embodiment of the present invention.

第2図(a)はシリコン基板表面に形成された方形のア
ライメントマークの平面図である。
FIG. 2(a) is a plan view of a rectangular alignment mark formed on the surface of a silicon substrate.

第2図(b)はその断面図で、1はシリコン基板。FIG. 2(b) is a cross-sectional view of the same, and 1 is a silicon substrate.

2は2例えば48mX4μmX0.7μmに形成された
凹型のアライメントマークである。
2 is a concave alignment mark formed, for example, 48 m x 4 μm x 0.7 μm.

第2図(C)はアライメントマーク2を覆って基板上に
被覆層3例えばエビ層4を成長した断面図である。
FIG. 2(C) is a cross-sectional view of a coating layer 3, such as a shrimp layer 4, grown on the substrate to cover the alignment mark 2.

この場合、エビ層4の上からはアライメントマークは検
出できなくなる。
In this case, the alignment mark cannot be detected from above the shrimp layer 4.

そこで、第2図(d)のように本発明を適用して。Therefore, the present invention is applied as shown in FIG. 2(d).

アライメントマークの底部表面を荒らして粗面化し、エ
ビ層4に反映させると、エビ層4のマーク部の散乱光の
強度は太き(なり、検出が可能となる。
When the bottom surface of the alignment mark is roughened and reflected on the shrimp layer 4, the intensity of the scattered light at the mark portion of the shrimp layer 4 becomes thicker and detection becomes possible.

マーク表面を粗面化する方法として、マーク表面を露出
したマスクで基板を覆って2例えばイオンミリング装置
を利用してイオンで叩く。
As a method for roughening the mark surface, the substrate is covered with a mask that exposes the mark surface, and the substrate is bombarded with ions using, for example, an ion milling device.

この際のイオン種と加速エネルギーは、マーク表面の散
乱の度合を観測して決める。
The ion species and acceleration energy at this time are determined by observing the degree of scattering on the mark surface.

〔発明の効果] 以上説明したように本発明によれば、アライメントマー
クの形状が多少くずれても検出可能になり、粗アライメ
ントに利用すれば処理不能の障害はなくなる。
[Effects of the Invention] As described above, according to the present invention, even if the shape of the alignment mark is slightly distorted, it can be detected, and when used for rough alignment, there will be no trouble that cannot be processed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(P)は本発明の原理説明図。 第2図(a)〜(d)は本発明の一実施例を説明する図
である。 図において。 1はシリコン基板。 2はアライメントマーク。 3はSiO□膜。 4はエビ層 本発明の原理説明図 男1図(予の1) (k) (o) (fl) (p)−7〜−一 本発明の原理説明図 第1 図(での2) 英方包イ列の言能明図 第 図
FIGS. 1(a) to 1(P) are diagrams explaining the principle of the present invention. FIGS. 2(a) to 2(d) are diagrams illustrating an embodiment of the present invention. In fig. 1 is a silicon substrate. 2 is the alignment mark. 3 is a SiO□ film. 4 is a diagram explaining the principle of the shrimp layer of the present invention Male Figure 1 (Part 1) (k) (o) (fl) (p) -7~-1 Figure 1 (Part 2) of the principle explanatory diagram of the present invention Figure 1

Claims (1)

【特許請求の範囲】 1)露光工程におけるフォトマスクとウェハのアライメ
ントの際に、 ウェハ上に形成されたアライメントマークの表面に粗面
化処理を施した後にアライメントを行うことを特徴とす
る半導体装置の製造方法。 2)前記粗面化処理はアライメントマークの表面にイオ
ンを衝撃して行うことを特徴する請求項1記載の半導体
装置の製造方法。
[Claims] 1) A semiconductor device characterized in that when aligning a photomask and a wafer in an exposure process, the alignment is performed after roughening the surface of an alignment mark formed on the wafer. manufacturing method. 2) The method of manufacturing a semiconductor device according to claim 1, wherein the surface roughening treatment is performed by bombarding the surface of the alignment mark with ions.
JP2067607A 1990-03-16 1990-03-16 Manufacture of semiconductor device Pending JPH03268316A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2067607A JPH03268316A (en) 1990-03-16 1990-03-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2067607A JPH03268316A (en) 1990-03-16 1990-03-16 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH03268316A true JPH03268316A (en) 1991-11-29

Family

ID=13349793

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2067607A Pending JPH03268316A (en) 1990-03-16 1990-03-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH03268316A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7456372B2 (en) * 1996-11-20 2008-11-25 Ibiden Co., Ltd. Laser machining apparatus, and apparatus and method for manufacturing a multilayered printed wiring board
US7462802B2 (en) 1996-11-20 2008-12-09 Ibiden Co., Ltd. Laser machining apparatus, and apparatus and method for manufacturing a multilayered printed wiring board
US20110169164A1 (en) * 2010-01-13 2011-07-14 Shinko Electric Industries Co., Ltd. Wiring substrate, manufacturing method thereof, and semiconductor package
JP2011139032A (en) * 2009-12-02 2011-07-14 Ultratech Inc Optical alignment method for forming led having rough surface
JPWO2015152244A1 (en) * 2014-04-02 2017-04-13 三菱電機株式会社 SENSOR ELEMENT AND ITS MANUFACTURING METHOD, SENSING DEVICE AND ITS MANUFACTURING METHOD

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7456372B2 (en) * 1996-11-20 2008-11-25 Ibiden Co., Ltd. Laser machining apparatus, and apparatus and method for manufacturing a multilayered printed wiring board
US7462801B1 (en) * 1996-11-20 2008-12-09 Ibiden Co., Ltd. Laser machining apparatus, and apparatus and method for manufacturing a multilayered printed wiring board
US7462802B2 (en) 1996-11-20 2008-12-09 Ibiden Co., Ltd. Laser machining apparatus, and apparatus and method for manufacturing a multilayered printed wiring board
US7667160B2 (en) 1996-11-20 2010-02-23 Ibiden Co., Ltd Laser machining apparatus, and apparatus and method for manufacturing a multilayered printed wiring board
US7732732B2 (en) 1996-11-20 2010-06-08 Ibiden Co., Ltd. Laser machining apparatus, and apparatus and method for manufacturing a multilayered printed wiring board
JP2011139032A (en) * 2009-12-02 2011-07-14 Ultratech Inc Optical alignment method for forming led having rough surface
US20110169164A1 (en) * 2010-01-13 2011-07-14 Shinko Electric Industries Co., Ltd. Wiring substrate, manufacturing method thereof, and semiconductor package
US8525356B2 (en) * 2010-01-13 2013-09-03 Shinko Electric Industries Co., Ltd. Wiring substrate, manufacturing method thereof, and semiconductor package
US8673744B2 (en) 2010-01-13 2014-03-18 Shinko Electric Industries Co., Ltd. Wiring substrate, manufacturing method thereof, and semiconductor package
JPWO2015152244A1 (en) * 2014-04-02 2017-04-13 三菱電機株式会社 SENSOR ELEMENT AND ITS MANUFACTURING METHOD, SENSING DEVICE AND ITS MANUFACTURING METHOD

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