JPH03297143A - Formation method of metal silicide film; manufacture of semiconductor device using same method - Google Patents

Abstract

PURPOSE:To easily form a metal silicide film without forming a silicon film and without executing an etching operation by a method wherein a metal film which can be changed into a silicide is formed on a substratum, silicon ions are implanted into the film and, after that, a heat treatment is executed. CONSTITUTION:An insulating film 102 is formed on a substrate 101; they are used as a substratum 100; a metal film 104 which can be changed into a silicide is formed on it. Then, silicon ions are implanted into the film 104; a titanium metal film 106 is formed; after that, a heat treatment used to change the film 106 into a silicide is executed; a metal silicide film 108 is formed. Thereby, it is possible to easily form the metal silicide film without forming a layer of silicon, amorphous silicon or polysilicon between the film 104 and the film 102 and without contaminating the circumference.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of forming a metal silicide film and a method of manufacturing a semiconductor device using this forming method.

(Prior Art) Conventionally, a method for forming a metal silicide film is to perform heat treatment on a metal film provided on single crystal or amorphous silicon (Si) or polycrystalline silicon (Si). A known method is to silicide a metal film using a method or to directly form a metal silicide film using a sputtering method.

Prior to describing the present invention, a method for manufacturing a semiconductor device, such as a MOS (metal oxide semiconductor) FET (field effect transistor), using the former method will be described.

Figures 2 (A) to (D) are from the literature “I.
TRANSACT ON ELECTRON DEVICES
LECTRON DEVICES) VOL, ED34
．． No. 3. March 1987'' is a cross-sectional process diagram for explaining the conventional manufacturing method.

According to this conventional method, a silicon substrate is used as the base 10, a field oxide film] 2 is formed on this substrate 10 for carrying out the device amount M%, and a gate oxide film] 4 is formed by rough thermal oxidation. Thereafter, a polysilicon film pattern 16 is formed on the gate electrode formation region of the gate oxide film 14 to form a gate electrode layer (represented by 16). At the same time as this gate electrode layer 16 is formed, another polysilicon film pattern 1 is formed on a predetermined region that is a part of the field oxide film.
8) is formed on the first wiring layer (also shown as 18). This first wiring layer 18 is a wiring that connects elements. After removing the exposed portion of the gate insulating film by etching using the gate electrode layer] 6 and the first wiring layer 18 as a mask, a diffusion layer 20 for source and drain regions is formed in the active region of the substrate 10, and then both polygons and An insulating sidewall 2 is provided on the side of the silicon film pattern 16 and ]8.
2 and 24, respectively, to obtain a structure having a cross-sectional structure as shown in FIG. 2(A).

Next, as a metal that can be converted into silicide, titanium (T
i) is deposited on the entire upper surface of the structure shown in FIG. 2(A) to form a titanium gold scrap film 26. Subsequently, in the conventional method, an amorphous silicon (a-3i) film 28 is deposited on the entire upper surface of this metal film 26. Next, in the titanium metal film 26, a portion of the a-3i film 28 on the area that is to become a wiring is covered with a photoresist pattern 30, and the a-3i film 28 is selected using this photoresist pattern 30 as a mask. A structure having a cross-sectional structure as shown in FIG. 2(B) was obtained.

Roughly, after removing the photoresist pattern 30V from the structure shown in FIG. -3i film 28 to form a titanium silicide film, which is a metal silicide film 32, in each contact area (also shown as 32). After that, the remaining unreacted titanium metal film 3
The titanium is removed using a conventional technique, and then a second heat treatment is performed to completely silicide the titanium, thereby obtaining a structure having a cross-sectional structure as shown in FIG. 2(C). In this structure, the titanium metal film on the sidewalls 22 on both sides of the gate electrode layer 6 and on the sidewall 24 on one side of the first wiring layer 18 (the side farther from the gate electrode layer) is removed. be.

Next, after providing an appropriate insulating layer 34 on the entire upper surface of the structure shown in FIG. A contact hole 36 is opened in a portion of the insulating film 34, and a second wiring layer 38 is formed from aluminum in the contact hole 36, thereby obtaining a structure shown in cross section in FIG. 2(D).

In this way, according to this conventional manufacturing method, the diffusion layer 20
There is an advantage in that the connection to the first wiring layer 24 that connects other elements can be made through the titanium silicide film 32 instead of using the usual aluminum wiring through the insulating layer 34.

(Problem to be solved by the invention) However, silicidation by conventional heat treatment
Is it effective if the base of the metal film to be silicided is single crystal silicon, amorphous silicon, or polysilicon, or is it possible to form a metal silicide film if the base is an insulating film such as oxide? do not have.

Furthermore, in the method of forming a metal silicide film by sputtering, the area other than the area where the metal silicide film is to be deposited may be contaminated by the sputtering, which may reduce the production yield of the semiconductor snow to be manufactured.

In general, according to the conventional semiconductor device manufacturing method described above, a -H amorphous silicon film is formed on a titanium metal film, and then a portion of the amorphous silicon film is Parts need to be etched away. This etching is usually done by RIE.
(Reactive Ion Etching)
This etching reduces the thickness of the underlying titanium metal film, which may adversely affect the characteristics of the semiconductor device or the necessary treatments performed in subsequent manufacturing process steps. Alternatively, the ions for this etching may damage the substrate on the M ground.

This invention was made to solve the above-mentioned conventional problems, and therefore, an object of the invention is to form a metal silicide film even under a metal film or an insulating layer. It is an object of the present invention to provide a method for forming a metal silicide film that is possible to form a metal silicide film and that does not cause contamination of the surrounding area even when a treatment for siliciding the metal is performed.

Another object of the present invention is to provide a method for manufacturing a semiconductor device without adversely affecting the characteristics of the semiconductor device, even when a metal film is silicided.

(Means for Solving the Problems) In order to achieve this object, according to the method for forming a metal silicide film of the present invention, a step of forming a metal film that can be converted into silicide on the upper side of a base, The method is characterized by including a step of implanting silicon (Si) ions into the metal film, and a step of performing heat treatment to silicide the metal film into which the silicon ions have been implanted.

In carrying out the present invention, it is preferable that silicon ion implantation 1 be at least 1 x 1017/cm2 or more.

In general, according to a preferred embodiment of the present invention, the silicidable metal film is made of titanium (Ti), zirconium (Z r
), cobalt (Co), molybdenum (Mo), tungsten (W), nickel (Nl), platinum (Pt), and palladium (Pd).

Further, according to a preferred embodiment of the present invention, the temperature of the heat treatment is preferably set to an appropriate temperature within the temperature range of 600 to 900°C.

Furthermore, according to the method of manufacturing a semiconductor device using the method of forming a metal silicide film of the present invention, the gate oxide film is provided on a portion of the active region of the silicon base, and the insulating side wall A polysilicon film pattern for the gate electrode layer with a sidewall and/or a polysilicon film pattern for the first wiring layer with a sidewall are formed on a portion of the field oxide film underlying the silicon. a second step of forming a metal film that can be silicided on the entire upper surface of the structure obtained in the second step, and a step of injecting silicon ions into selected regions of this gold a film. A third step of implantation is to silicide the region of this metal film into which the silicon ions have been implanted, and the contact region of this metal film with the aforementioned underlying silicon and the aforementioned polysilicon film pattern to form a metal silicide film. The method is characterized in that it includes a fourth step of performing a heat treatment for forming the metal film, and a fifth step of removing the non-silicided region of the metal film and leaving the metal silicide film.

In carrying out this invention, preferably, the heat treatment in the fourth step described above is the first heat treatment between the third and fifth steps described above, and the second heat treatment after the fifth step described above. It is best to do it in two steps, including the heat treatment.

In addition, when performing the heat treatment in two steps, preferably the first heat treatment is performed at an appropriate temperature within the temperature range of 600 to 700 °C, and the second heat treatment is performed at a temperature of 800 to 700 °C.
It is preferable to carry out the process at a suitable temperature within the temperature range of 900°C.

In general, in carrying out the present invention, the first step described above preferably includes forming a field oxide film in a field region under silicon and a gate oxide film in an active region, respectively, and forming a field oxide film and a gate oxide film in an active region. A process of forming a polysilicon film on the oxide film, and selectively etching this polysilicon film to form a polysilicon film pattern for a gate electrode layer on a portion of the gate oxide film described above and a first polysilicon film pattern on the field oxide film described above. A step of forming both or one of the polysilicon film patterns for the wiring layer, a step of forming insulating sidewalls on each side wall of the above-mentioned polysilicon film pattern formed, and an exposed gate. It may also include a step of etching away the oxide film portion.

In general, in the embodiment of the present invention, diffusion layers for source and drain regions are preferably formed in the active region before the second step described above.

In general, in a preferred embodiment of the present invention, the polysilicon film patterns for both the gate electrode and wiring layer are provided in the first step, and the polysilicon film patterns are formed in the fifth step. An insulating film is provided on the entire upper surface of the obtained structure, a contact hole is opened in a part of the insulating film on the metal silicide film where the above-mentioned voluminous film pattern is not formed, and a second wiring r is formed in this contact hole.
It is preferable to obtain a semiconductor device by providing tH.

(Function) According to the method for forming a metal silicide film of the present invention, a metal film that can be silicided is formed on a base, silicon ions are implanted into this metal film, and then silicon ions are implanted into the metal film. A metal silicide film is formed by heating the metal film at a temperature suitable for silicidation. With this method, even if the underlying layer is an insulating film, there is no need to prepare a silicon film for silicidation or to perform an etching process, so it is easy to form a metal silicide film without contaminating the surrounding area. It can be formed into

Further, since it is not necessary to provide a special silicon film for silicidation and to etch the silicon film, it is easy to form a metal silicide film.

Further, according to the method for manufacturing the semiconductor device 1 of the present invention, a polysilicon film pattern for a gate electrode and, if necessary,
After forming a polysilicon film pattern for the first wiring, a metal film that can be silicided is formed on the silicon substrate including these polysilicon film patterns, and then, of this metal film, polysilicon and silicon Silicon ions are selectively implanted into non-contact areas,
After that, the entire structure obtained at this point is heat-treated at a temperature suitable for silicidation, and the areas in contact with polysilicon and silicon are closed, and the metal film area into which silicon ions are implanted or the silicide is formed. become and,
A wiring pattern of the metal silicide film is obtained by removing unreacted and remaining non-silicide regions of the metal film.

In this way, metal silicide [%] can be simultaneously formed for the gate electrode of the field effect transistor, and for each interconnection of the source region and drain region. In addition, with this manufacturing method, since an amorphous silicon film is not used to silicide the metal film, there is no need for the formation of this amorphous silicon film and the process of processing and etching it. Since the non-silicide region of the metal film is etched later, the manufacturing process is simplified and the manufacturing yield is improved.

(Embodiment) An embodiment of the present invention will be described below with reference to the drawings. It should be noted that each drawing merely schematically shows the shapes, thicknesses, and dimensions of the necessary constituent components to the extent that the present invention can be understood.

<Method for forming metal silicide film> First, a method for forming a metal silicide film will be explained.

FIG. 1 is a process diagram for explaining the method of forming a metal silicide film of the present invention, and each figure is a cross-sectional view of a structure obtained at the main process steps.

A metal film 104 is formed on the base 100.

In this case, as the substrate 101 itself, it is possible to form a Yokei film directly on this substrate 701, or in this embodiment, it is possible to have a structure in which an insulating film 102 such as an oxide film or a nitride film is provided on this substrate 101. is used as the base 100, and titanium (Ti), which is a metal that can be silicided, is placed on the insulating film 102 of [this base]○○! A titanium metal film 104 is formed by deposition using any suitable conventional technique to obtain a structure as shown in FIG. 1A.

Next, silicon (S) is applied to this titanium metal film 104.
i) Ions are implanted and the titanium metal film 106 into which S1 ions have been implanted is obtained to obtain a structure as shown in Figure 1 (8). In this case, the concentration of 81 ions implanted is at least 1, for example.
×] ○l 7 / cm 2 or so, preferably,
The thickness is set to about 5×10”/cm 2 so that silicidation can be performed more reliably.

Next, heat treatment is performed to silicide the titanium metal film 106 into which Si ions have been implanted, and the metal silicide film 106 is
8 obtained (Figure 1 (C)). This heat treatment may be carried out using an electric furnace or a heating lamp at a temperature suitable for silicidation of titanium, for example, 600 to 900°C.

In this way, the titanium metal film 104 and the insulating film 102
The metal silicide film 108 can be formed on the insulating film 102 without providing a layer such as silicon, amorphous silicon, or polysilicon between the two.

Further, according to the above-described method, since the metal silicide film is formed mainly by implanting Si ions and heat treatment, there is no risk of contaminating or damaging the area around the area where the metal silicide film is to be formed.

In this example, a titanium metal film was used as the metal film, or instead, zirconium (Z r
), cobalt (Co), molybdenum (Mo), tungsten (W), nickel (Ni), platinum (Pt), and palladium (Pd). A metal silicide film can be formed in the same way as the film. Further, the heat treatment for silicidation may be performed not once but in multiple times.

In addition, in the above embodiment, an insulating film]02 is formed on the base]00.
or directly on the base 100 ]04
Alternatively, another film such as a conductive film may be provided in place of the insulating film]02.

<Method for Manufacturing a Semiconductor Device> Next, an example of a method for manufacturing a semiconductor device, particularly a MOSFET, using this method for forming a metal silicide film will be described.

FIG. 3 is a manufacturing process diagram for explaining the MOSFET manufacturing method, and each figure schematically shows a cross section of a structure obtained at the main manufacturing stage.

In the first step, a polysilicon film pattern for a gate electrode layer and/or a part of a field oxide film is provided on a part of an active region of a silicon base via a gate oxide film, and has an insulating sidewall. A polysilicon film button for the first wiring layer with sidewalls is formed thereon.

Therefore, first, for example, a p-type silicon substrate 200 is prepared as a base. On this substrate 200, a field oxide film 202 with a thickness of approximately 0.5 m is formed in the field region using a selective oxidation method in order to isolate the FET elements. Then, on a portion of the active area of the substrate 200,
A gate oxide film 204 is formed to an appropriate thickness within the range of 5 to 20 nm by thermal oxidation in a tri-oxygen gas atmosphere. After that, the oxide film 202 is
A polysilicon film 206 having an appropriate thickness within the range of 0.1 to 0.3 um is deposited on the entire surface of the substrate 2o○ on which the polysilicon film 204 is formed.
In order to lower the resistance of this film 206, a poron (B) % diffusion layer or ions, which are p-type impurities, are implanted into the film 206, as shown in FIG. 3(A).
You will get a structure as shown in .

Next, this polysilicon film 206V is selectively etched away using a normal lithography technique to form a polysilicon film pattern 208 for a gate electrode layer and/or a polysilicon film pattern 210 for a first wiring layer. This first wiring layer polysilicon film pattern 210 is a wiring for interconnecting FET elements. In this embodiment, both polysilicon film patterns 208 and 210 are formed simultaneously.

After that, mainly these two polysilicon film patterns 20
8 and 210 are used as masks to form a diffusion layer. Therefore, phosphorus (P) and/or arsenic (As) are ion-implanted to provide low concentration (n) for the source and drain regions.
- type) diffusion layer 222 is formed.

Then, an insulator such as PSG (Phospho
After depositing on the entire surface of the substrate 200 including the polysilicon film patterns 208 and 2]0, RIE (active Io
By an appropriate method such as n Etching method, P
Sidewalls 224 and 226 are formed on the sidewalls of polysilicon film patterns 208 and 210, respectively, by performing anisotropic etching on the SG. At this time, the gate oxide film except under the polysilicon film pattern and the sidewalls is removed. In the figure, since both the sidewalls 224 and 226 and the gate oxide film 204 are insulating films, their boundaries are shown as an integral binding film structure.

Next, for example, arsenic is ion-implanted into the substrate 200 from above the substrate surface to form a high concentration (n) source and drain region.
A + type) diffusion layer 228 is formed to obtain a structure as shown in FIG. 3(B).

Next, in a second step, a metal film that can be converted into silicide is formed on the entire upper surface of the structure shown in FIG. 3(B) obtained in the first step described above.

Therefore, a titanium metal film 230 is formed by depositing, for example, titanium to a thickness of about 50 nm using a suitable conventional technique such as sputtering to obtain a structure as shown in FIG. 3(C). In this case, a metal film other than the titanium metal film 230 that can be converted into silicide may be used as the metal film. These metals may be, for example, the already mentioned zirconium, molybdenum, tungsten, nickel,
Platinum, palladium, etc. may also be used.

Next, in a third step, five silicon (Si) ions are formed in selected areas of the titanium metal film 230.

For this reason, a mask pattern 232 is provided on the titanium metal film 230 on the upper surface of the structure obtained in the second step, in a region other than the region that will become the wiring, to obtain a structure as shown in FIG. 3(D). . In this case, for example, this mask pattern us
io2 or other insulating film, and may be formed of photoresist depending on the case, or if fine wiring is desired, a multilayer resist layer having resistance to ion implantation may be used.

Then, Si ions are implanted into the entire upper surface of the structure on which these mask patterns 232 are formed, and F! Si ions are implanted into the unfilled regions. The metal film region in which S1 ions have been implanted in this manner is shown at 234 in FIG. 3(E). The Si ion implantation concentration should be at least about 1×]017/cm2 or higher, preferably about 5×1017/cm2.

After this Si ion implantation, mask pattern 232 is removed by a suitable conventional technique to obtain the structure shown in FIG. 3(F).

Next, in the fourth step, heat treatment is performed to silicide the titanium metal film. In this embodiment, this heat treatment is performed separately into preliminary silicidation of the titanium metal film and heat treatment of the roller for complete silicidation. This is to avoid the fact that if the titanium silicide film is completely silicided, it will be difficult to remove the titanium silicide film on the sidewall.

For this purpose, first, the structure shown in FIG. 3(F) is heated in advance to a relatively low temperature of 600 to 700'C using an appropriate heating means such as heater heating or lamp heating. A first heat treatment is performed at a certain temperature to preliminarily silicide a predetermined region of the titanium metal film. This state is shown in FIG. 3(G). In the case of this embodiment, it is appropriate to use heating for about 30 minutes in the case of normal heater heating and about 30 seconds in the case of lamp heating. Further, the predetermined regions of the titanium metal film are the regions in contact with the underlying silicon and polysilicon patterns 208 and 210 of the substrate 200, and the region 234 where Si ions have been implanted.

Then, not only these regions but also the region of the high concentration diffusion layer 228 of the substrate 200 is silicided, resulting in an incomplete titanium silicide film 236. In this case, the titanium metal film regions that are not deposited on the silicon, such as on the field oxide film 202 and on the sidewalls 224 and 226, and the titanium metal film regions that have not been implanted with Si ions remain as unreacted titanium. . The unsilicided region of the titanium metal film remaining without being silicided is shown at 238 in FIG. 3(G).

Next, in a fifth step, the non-silicided region 238 shown in FIG. 3(G) is removed to leave an incomplete titanium silicide film 236.

Therefore, tri-etching or wet etching is performed on the non-silicided region 238 of the structure shown in FIG. 3(G) to obtain a structure not shown in FIG. 3(H).

When performing tri-etching, for example, a gas consisting of carbon element and fluorine element such as CF4, or a gas obtained by combining both or one of these elements with chlorine element, hydrogen element, etc., or these gases. Selective etching can be performed using a gas to which oxygen gas, nitrogen gas, or the like is added.

Further, when performing wet etching, for example, a mixed solution of sulfuric acid and hydrogen peroxide, or a mixed solution of ammonia wood or ammonium hydroxide and hydrogen peroxide solution can be used.

Next, a second heat treatment is performed to complete silicidation to obtain a structure as shown in FIG. 3(I) having a titanium silicide film 240 which is a complete metal silicide film.

In this case, the second heat treatment is performed at an appropriate temperature within the range of 800 to 900°C, which is higher than the first heat treatment. By this second heat treatment, titanium is completely silicided to obtain a titanium silicide film 2408. In this embodiment, the composition ratio of titanium to silicon in the titanium silicide film 240 is approximately 1.2. The titanium silicide film 240 on the polysilicon base 208 forms a gate electrode, and the titanium silicide film 240 on the high concentration diffusion layer 228 serves as a source or drain.
Alternatively, mutual wiring between the diffusion layer 228 and the first wiring layer 210 is formed.

After forming this titanium silicide film 240, CVD is applied to the entire surface of the structure on the titanium silicide film 240 side.
A suitable insulating film 242, for example, a SiO2 film, is deposited by an appropriate method such as the following, and then polysilicon films 208 and 21 are deposited.
0 or 0 on the titanium silicide film 240 that is not formed? A contact hole 244 is opened in a part of the RIM 242, and then a second wiring layer 246 is formed by patterning a suitable wiring layer 246 made of aluminum or the like.

The structure thus obtained is shown in FIG. 3(J).

In this way, the required components of the MOSFET are completed.

The invention is not limited only to the embodiments described above, but many modifications and changes can be made without departing from the scope of the invention.

For example, numerical conditions other than Si ion implantation concentration and heat treatment temperature for silicidation and other conditions such as shape, material, arrangement 1fEffi, etc. may be determined using conditions other than those described in the above embodiments. Even in that case, the same effects as in the above-mentioned embodiment can be expected.

(Effects of the Invention) As is clear from the above explanation, according to the method for forming a metal silicide film of the present invention, a single crystal or amorphous film is formed by contacting the lower or upper side of the metal film to be silicided. Alternatively, even if a polycrystalline silicon layer is not provided, silicide can be obtained by implanting Si ions into this metal film and then heat-treating the metal film into which Si ions have been implanted at an appropriate temperature.

Therefore, according to this method, a metal silicide film can be easily formed even if it is a lower layer of a metal film or an insulating film. Furthermore, the formation method of the present invention does not require the formation of a special film such as an amorphous silicon film for silicidation, and does not require a troublesome process such as etching away such a special film. According to this method, a metal silicide film can be formed more easily than before and without contaminating the surrounding area.

Further, according to the method of manufacturing a semiconductor device of the present invention, the metal to be silicided is formed on the polysilicon film pattern for the gate electrode and/or the polysilicon film pattern for the first wiring, and on the underlying field oxide film and active region. A film is provided, Si ions are implanted into a region of the metal film that will become a wiring, and then heat treatment is performed at a temperature suitable for silicidation.

By this heating, not only the metal film region into which Si ions have been implanted but also the region where this metal film is in contact with silicon and polysilicon becomes a metal silicide film. Therefore,
Not only the gate electrode but also the wiring for interconnecting the source and drain diffusion layers between elements can be easily formed using a metal silicide film, and in some cases, it is possible to form these gate electrodes and wiring at the same time. Therefore, the manufacturing method of the present invention is more convenient than conventional manufacturing methods.

Further, according to the manufacturing method of the present invention, after the metal silicide film is formed, the non-silicide region of the metal film remaining unreacted is removed by etching, so that the thickness of the formed metal silicide film is reduced and the metal There is no risk of damage to the underlying active region (a) through the silicide film.Therefore, compared to semiconductor devices manufactured using conventional manufacturing methods, the operating characteristics of semiconductor devices manufactured according to the present invention are superior to semiconductor devices manufactured using conventional manufacturing methods. fluctuation is small.

This invention can be expected to have effects superior to those of the prior art as described above, and is therefore suitable for application to the manufacture of 0MO3LSI.

[Brief explanation of the drawing]

FIGS. 1(A) to (C) are process diagrams for explaining an embodiment of the method for forming a metal silicide film of the present invention. FIGS. 3 (A) to (J') are manufacturing process diagrams for explaining the method of manufacturing a semiconductor device M% using the method of forming a semiconductor device of the present invention using the method of forming a metal silicide film of the present invention. It is a manufacturing process diagram for explaining the manufacturing method of the device. ]00...base, 102...insulating film]0
4... Metal film 106... S1 ion implanted metal film 108... Metal silicide film 200... Silicon substrate (base) 202... Field oxide film 204... Gate oxide film, 206...・Polysilicon film 208...Polysilicon film pattern 2 for gate electrode layer]○...Polysilicon film pattern 22 for first wiring layer
2...Low concentration diffusion layer 224, 226...Side wall 228...High concentration diffusion layer, 230...Titanium metal film 232...Mask pattern 234...Si ion implanted metal film region 236・・・
- Incomplete titanium silicide film 238...Non-silicide region 240...Titanium silicide film 242...Insulating film, 244...Contact hole 246...Second wiring layer. Patent Applicant Oki Electric Industry Co., Ltd. + -1 2nd heating 242 Insulating shoes 244 Contact 246 2nd wiring layer Manufacturing process diagram of semiconductor device Figure 3 Procedural amendment] Indication of case 1990 patent Application No. 99687 2 Name of the invention 1 Method for forming a metal silicide film and method for manufacturing a semiconductor device using this method 3 Relationship with the person making the amendment Patent applicant address 1-chome Toranomon, Minato-ku, Tokyo, Japan 1-105 No. 7 No. 12 Name (029) Oki Electric Industry Co., Ltd. Representative Komura Polarization 4 Agent 170 ffi (98B) 5563 Address Higashi''g, 905 (1) Ikebukuro White House Building, 1-20-5 Higashiikebukuro, Toshima-ku, Miyako , in the specification, page 20, line 6, "injection concentration" is corrected to "injection amount". (2), "Poron (B) which is a p-type impurity" on page 23, lines 7 to 8! Phosphorus (P), an Fn-type impurity
,,! Correct it as l. (3), same, page 26, line 15, "concentration" is corrected to "amount J". (4), same, page 29, line 4, "nitrogen gas, etc." is corrected to li'
I am correcting myself to say, ``rich gas, etc.''. that's all

Claims (10)

[Claims] (1) A step of forming a metal film that can be silicided on the upper side of a base, a step of implanting silicon (Si) ions into the metal film, and a step of siliciding the metal film into which the silicon ions have been implanted. 1. A method for forming a metal silicide film, the method comprising: performing a heat treatment. (2) In the method for forming a metal silicide film according to claim 1, the implantation amount of the silicon ions is at least 1×10^1^.
7/cm^2 or more. A method for forming a metal silicide film. (3) In the method for forming a metal silicide film according to claim 1, the silicidizable metal film is made of titanium (Ti).
), zirconium (Zr), cobalt (Co), molybdenum (Mo), tungsten (W), nickel (Ni)
A method for forming a metal silicide film, characterized in that the film is made of a metal selected from the metal group of , platinum (Pt) and palladium (Pd). (4) The method for forming a metal silicide film according to claim 1, wherein the temperature of the heat treatment is set to an appropriate temperature within a temperature range of 600 to 900°C. (5) A polysilicon film pattern for a gate electrode layer, which is provided on a part of the underlying active region via a gate oxide film and has insulating sidewalls, and a field oxide film underlying the silicon. A first step of forming a polysilicon film pattern for a first wiring layer with sidewalls on a portion thereof, and/or forming a polysilicon film pattern for a first wiring layer on a portion thereof, and siliciding the entire upper surface of the structure obtained in the first step. a second step of depositing a possible metal film; a third step of implanting silicon ions into a selected region of the metal film; a region of the metal film where the silicon ions have been implanted; , a fourth step of performing a heat treatment to silicide the contact region with the underlying silicon and the polysilicon film pattern to form a metal silicide film; and removing the non-silicide region of the metal film and forming the metal silicide film. A method for manufacturing a semiconductor device, comprising a fifth step of leaving a film. (6) In the method for manufacturing a semiconductor device according to claim 5, the heat treatment in the fourth step includes: a first heat treatment between the third step and the fifth step; and a heat treatment after the fifth step. A method for manufacturing a semiconductor device, characterized in that the process is performed in two steps, including a second heat treatment. (7) In the method for manufacturing a semiconductor device according to claim 6, the first heat treatment is performed at an appropriate temperature within a temperature range of 600 to 700°C, and the second heat treatment is performed at a temperature of 80°C to 700°C.
A method for manufacturing a semiconductor device, characterized in that the manufacturing method is carried out at an appropriate temperature within a temperature range of 0 to 900°C. (8) In the method of manufacturing a semiconductor device according to claim 5, the first step includes: forming a field oxide film in a field region of a silicon base and a gate oxide film in an active region, and forming these field oxide films. and forming a polysilicon film on the gate oxide film, selectively etching the polysilicon film to form a polysilicon film pattern for a gate electrode layer on a portion of the gate oxide film and a first polysilicon film pattern on the field oxide film. a step of forming both or one of polysilicon film patterns for wiring layers; a step of forming insulating sidewalls on each sidewall of the formed polysilicon film pattern; 1. A method of manufacturing a semiconductor device, comprising the step of etching away a film portion. (9) The method of manufacturing a semiconductor device according to claim 5, wherein diffusion layers for source and drain regions are formed in the active region before the second step. (10) In the method for manufacturing a semiconductor device according to claim 5, polysilicon film patterns for both the gate electrode and the first wiring layer are provided in the first step, and the polysilicon film patterns obtained in the fifth step are provided. an insulating film is provided on the entire upper surface of the structure, a contact hole is formed in a portion of the insulating film on the metal silicide film where the polysilicon film pattern is not formed, and a second wiring layer is provided in the contact hole. A method for manufacturing a semiconductor device, characterized by: