JPH0335678A - digital signal processing equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital signal processing device, and particularly to a digital signal processing device suitable for encoding and decoding digital image signals.

[Prior Art] Conventionally, encoding and decoding of digital image signals have been described, for example, in the document ``Multidimensional Signal Processing of TV Images'' (written by Takahiko Fukinuki, Nikkan Kogyo Shimbun Sha Series, published November 15, 1986). An encoding method using offset sampling and a decoding method using data interpolation are known. Fourth
The figure shows a block diagram of such a conventional digital signal processing device. In the figure, (1) is a data input for inputting a digital video signal obtained by digitizing an analog image signal such as a television signal. Terminal, (2
1) is a prefilter for band-limiting the human input signal from the data input terminal (1), and (27) is a prefilter (2).
(1) is a resampling circuit that resamples the band-limited signal based on a predetermined rule; and (12) is a resampling circuit that resamples the band-limited signal based on a predetermined rule. This is a data output terminal for sending data to the recording system (30). The above data input terminal (1), pre-filter (
21), resampling circuit (27), data output terminal (1
2) encodes the encoded block of the digital signal processing device (
51). Data from the transmission/recording system (30) is sent to the decoding block (52), where (14) is the data input terminal of the decoding block (52), and (24) is the resampling terminal of the encoding block (51). A data interpolation circuit (2) interpolates missing portions of data sampled by the conversion circuit (27).
4), (25) is a selector that switches data in order to interpolate and insert the data interpolated by the data interpolation circuit (24) into the manually inputted sampling data from the data input terminal (14), and (19) is the decoding block. This is a data output terminal that outputs the digital video signal decoded and reproduced in (52).

Next, the operation of the above-described configuration will be explained based on the explanatory diagram of FIG. 5. Incidentally, FIG. 5 shows the sampling points of the video signal two-dimensionally represented by O marks and X marks.

When the digital video signal inputted from the data input terminal (1) is digitized from the analog video signal, it is sampled at the points indicated by O marks and X marks in FIG. This human input data is band-limited by a prefilter (21) and resampled by a resampling circuit (27), but this resampling is performed in continuous video data as shown in the explanatory diagram of FIG. This is done by so-called subsampling (data thinning) in which the data marked with an X is discarded and the data marked with an O is made valid. In this case, offset sampling is performed in which the sampling point is shifted for each scanning line of the image. By subsampling as described above, the data rate sent from the data output terminal (12) of the encoding block (51) to the transmission/recording system (30) is half the data rate input from the data input terminal (1). 1
become.

Through the above encoding, the transmission/recording system (3) interposed between the encoding block (51) and the decoding block (52) is
0), the system only needs half the bandwidth for transmission,
If the system band is the same, the transmission speed will be doubled. On the other hand, when recording, the number of recorded images can be doubled.

A decoding block (52) is used to return the data from the transmission/recording system (30) to the original video signal, but the data from the transmission/recording system (30) is sent to the data input terminal (14).
) is entered. Since this data only includes the part indicated by the circle in Figure 5, the encoded block (51)
It is necessary to reproduce the data of the X mark thinned out by the resampling circuit (27). The method used to reproduce this data is interpolation, and this interpolation operation is performed, for example, at yII in FIG.
l+1. . Point data D(y) is calculated by m before and after it.
+l,ny data D(y) of point y and data n+ of point y
, n m, n m+2. The first-order interpolation interval D(y)-m+l,n (D(y)+D(y))/2m,n as shown in formula (1), which is predicted from n-day D(y)
m+2. n ◆ ◆ ・(1) is performed. This interpolation calculation is performed by the data interpolation circuit (24)
The data marked with an X in FIG. 5 is reproduced. Since the data marked 0 in Fig. 5 is input manually from the data input terminal (14), the data marked O from the data input terminal (14) and the data
By alternately selecting the X-marked data from 4) and sending it to the data output terminal (19), the data input terminal (1
) can obtain a decoded digital video signal that approximates the input digital video signal.

[Problems to be Solved by the Invention] Since the conventional digital signal processing device is configured as described above, the data of the X-print pixels that have not actually passed through the transmission/recording system (30) is transmitted to the O-print pixels on both sides. Pre-11FI interpolation is performed using the average value of the data. For this reason, there is a problem in that interpolation errors, that is, prediction errors, become large in portions where the video signal has a wide band, such as edge portions of the image, resulting in deterioration of the image based on the decoded video signal.

This invention was made to solve the above-mentioned problems. It is an object of the present invention to provide a digital signal processing device that can reduce II errors and reduce image deterioration based on decoded video signals.

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a sampling means that thins out n-1 pieces of digital video data out of n pieces of digital video data and samples and transmits only one piece of data. and the thinned out n-
A plurality of sub-measurement means predictively encodes one piece of data using a plurality of different prediction methods, and a prediction error of each is detected by comparing the prediction signal of each of the prediction means with the thinned out n-1 data. a prediction error detection means for comparing each detection error of the prediction error detection means, a means for selecting a prediction method that minimizes the prediction error and a minimum prediction error signal, and transmitting the signal together with the sampled data; n-1 based on the predicted data, prediction method, and minimum prediction error signal.
The present invention provides a digital signal processing device comprising an interpolation means for generating n pieces of interpolated data, and a means for decoding n pieces of digital image data based on the transmitted sampling data and the interpolated data from the interpolation means. .

[Operation] In the above means, the digital signal processing device of the present invention thins out n-1 pieces of digital video data out of n pieces of digital video data in the sampling means, samples only one piece of data, and transmits the sampled data. n-1 thinned out in the measurement means
The data is predictively encoded using a plurality of different prediction methods, and the prediction error detection means compares the pre-full+ signal in each prediction method with the thinned out n-1 data to calculate the pre-7111 error in each prediction method. The prediction method and the minimum prediction error signal that result in the minimum prediction error are selected by comparing each detection error and transmitted together with the sampled data, and the sampled data transmitted by the interpolation means and the prediction n-1 pieces of interpolated data are generated based on the method and the minimum prediction error signal, and n pieces of digital image data are decoded based on the transmitted sampled data and the interpolated data from the interpolation means.

[Example code] Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of a digital signal processing device according to an embodiment of the present invention. In the figure, (2) is a memory that holds the necessary amount of digital video signals input manually from the data input terminal (1), and (3) is a memory that stores the necessary digital video signals from the memory (2) based on commands from the control circuit (13). data sending circuit that selects and sends out data, (10)
is a first quantizer that quantizes data sent from the data sending circuit (3), and (4) is a first quantizer (10).
a first predictor that predicts interpolated data from output data of;
(5) is a first prediction error detector that calculates a prediction error by calculating the difference between the output data from the first quantizer (10) and the prediction data from the first predictor (4); predictor (6
) is a second predictor that predicts interpolated data from the output data of the first quantizer (10) using a method different from the first predictor (4), and (7) is the first quantizer A second prediction error detector calculates a prediction error by calculating the difference between the output data from (10) and the prediction data from the second predictor (6), and (8) is a first prediction error detector ( A comparator that compares the prediction error from 5) with the pre-i'llll error from the second prediction error detector (7), and (9) quantizes the prediction error signal A sent from the comparator (8). a second quantizer (11) that combines the data from the first quantizer (10) and a second quantizer (9)
This is a selector that selects either the data sent from the comparator or the predictor discrimination signal B sent from the comparator based on a command from the control circuit (13) and sends it to the data output terminal (12). Data input terminal (1)
A coding block (51) is constructed by a system extending from the data output terminal (12) to the data output terminal (12).

The data at the data output terminal (12) of the encoding block (51) is sent to the transmission/recording system (which transmits or records data).
The data from this transmission/recording system (30) is then sent to a decoding block (52).

In the decoding block (52), (15) is a memory that holds the data necessary for decoding from among the data input manually from the data input terminal (14), and (16) is a memory that holds the data necessary for decoding from among the data input manually from the data input terminal (14). Memory by command (15)
A data sending circuit that selects and sends the necessary data from the
(38) is a third predictor that predicts interpolated data based on the data from the data sending circuit (16), and (39) is a third predictor that predicts interpolated data based on the data from the data sending circuit (16). 4 predictor, (17) is an adder that adds the outputs of the data sending circuit (16), the third predictor (38), and the fourth predictor (39), and (18) is the data sending circuit ( 16) and the output of the adder (17) to reproduce a digital video signal and send it to the data output terminal (19). A decoding block (52) is constituted by the system from the data input terminal (14) to the data output terminal (19).

Incidentally, the third predictor (3) of the decoding block (52)
8), the fourth predictor (39) is the encoded block (51)
The first predictor (4) and the second predictor (6) are configured to perform exactly the same data prediction.

Next, the operation of the above-described configuration will be explained with reference to the explanatory diagrams of FIGS. 2 and 3.

In this embodiment, for example, encoding as shown in FIG. 3 is performed. In other words, assuming the data compression rate is 1/2,
Considering the data for each pixel as one set, one of the four data is sampled and simply requantized to 6 bits, and the remaining three are
The data carries a 3-bit prediction error. Here, since digital video data is expressed in 8 bits, if the 4 data expressed in 32 bits can be encoded and expressed in 16 bits, the compression ratio can be reduced to 1/2. In this embodiment, since the digital video signal can be encoded with 15 bits, the remaining 1 bit is used as a predictive encoding method determination signal.

Further, FIG. 2 shows a conceptual diagram when the digital image signal during encoding is sent out on the screen. In the figure, the ◯ marks are data expressed in 6 bits, and the X marks are prediction error data expressed in 3 bits, representing a part of one frame image.

Now, the digital video signal input from the data input terminal (1) is held in the memory (2) in an amount necessary for preprocessing 1. The data sending circuit (3) is a control circuit (
13) Controlled by the memory (2)
Take it out and send it out.

The data sent from the data sending circuit (3) is quantized into, for example, 6-bit data by a first quantizer (10). Here, the data currently being handled is shown in Figures 2 and 3.
If the data corresponds to the circle mark in the figure, the data is sent to the selector (11) and output from the data output terminal (12). Furthermore, if the data currently being handled corresponds to the (5), second prediction error detector (
7) calculates the prediction error, and the comparator (8) selects the prediction method with the least error. A predictor discrimination signal B and a prediction error signal A for discriminating the optimal predictor are sent out.

Here, since the comparison in the comparator (8) considers the four data as one group, the prediction method with the least prediction error is determined after comprehensively considering the prediction errors of the three data, and the predictor discrimination signal is Send as B. with this,
The prediction error signal A is input to the second quantizer (9) as a set of 3 data, and is requantized into data expressed in 3 bits. The selector (11) is connected to the control circuit (13
), the signal from the first quantizer (10) selects the signal from the second quantizer (9) or the signal from the comparator (8), and divides the 16-bit data into one segment. An encoded signal is outputted from the data output terminal (12). Note that in this embodiment, the first pre-ipJ device (4) and the second
In the predictor (6), for example, Xs in FIG.
The pixel data of the X marks of n+1' Xg, n+2, ts, and n+3 are predicted as follows. First, the first predictor (4) predicts the X direction as follows: (1) - m, n+1 l X+l/4 (XII, n+4 1n - /2(x-x)i
,n m,n+4 111
．． n・・・・(3) (9) −m, n+3 1 X +3/4(x −x)m,
n LII, n+4 11
．． n・ ◆ ◆ (4), and in the second 1,400 pj device (6), the pre-p in the y direction is
+ is (X) − i, n+1 It Xm+I, n+1 +1/3 (xm-2, n+1 ”n+1.n+1)・・
◆ (5) (X) − m, n+2 II X+n+4. n+2+415(Xm-1, n+2-xI
6+4. n+2)・・・・(6) (X) − m, n+3 ll Xl11+2. n+3 +”15(xm-3, n+3
"m+2.n+3)◆ ・ ・ (7) The prediction method with the smallest prediction error is determined as follows, for example. The absolute value of the prediction error caused by the first predictor (4) is as follows. It is expressed as

(Ei,n+1)1-I(x)-xl...
・ (8) Ill, n+1 I m, n+1
(E) ..., n+2 1 -1(x) -x l ・
... (9) m, n+2 1 Il, n+2 (
E) m, n+3 1 −1(x) −X l”
(10) m, n+3 1 m, n+3 The one with the largest absolute value of these prediction errors is Maxi(E), n, n+1 I (E), self, n+2 1 (E))... (11) m, n+3
1. Similarly, the absolute value of the prediction error produced by the second predictor (6) is expressed as follows.

(E) i, n+1 lt -1(x) -x l...
(12) m, n+1 II m, n+1 (E) play, n+2 II = l(x) −x l ・・
(13) m, n+2 II Il, n+2 (E
) m, n+3 1 = l(x) −x l
...(14) m, n+3 If m, n+3
The one with the largest absolute value of these pre-δp1 errors is Max((E), m, n+1 II (E), m, n+2 II (E))... (15) n+, n+
3 II. Therefore, Max((E), n+, n+1 1 (E), m, n+2 1 (E)) m, n+3 1 -Maxi(E), m, n+1 If (E), n+, n+2 II (E)) ... (16) If the calculation result of a+, n+3 II is a negative value, the prediction method by the first predictor (4) is the prediction method with the least prediction error, and if it takes a value of zero or more, the prediction method by the first predictor (4) is the prediction method with the least prediction error. The prediction δ1 method using the No. 2 predictor (6) is determined to be the prediction API square with the least prediction DI error.

On the other hand, the data input terminal (14) of the decoding block (52)
) The digital signal to be decoded manually is stored in the memory (15) as much data as is necessary for decoding.

The data exit circuit (16) is controlled by the control circuit (13) and stores the data necessary for decoding into the memory (15).
) and sends the data to the block specified by the control circuit (13). In other words, Figure 2, Figure 3
In the figure, data corresponding to the O mark is sent to the selector (18), and data corresponding to Xm is sent to the third predictor (38) or fourth predictor (38) based on the predictor discrimination signal B.
9). When data is predicted by the third IPI unit (38) or the fourth predictor (39), this child all data is sent to the adder (17) from the prediction error sent from the data sending circuit (16). It is added to signal A and sent to the selector (18). Here, as mentioned above, the data is considered as one set of four data, so as shown in Figure 2 or Figure 3, the data of the pixel of The data are combined into one set, and according to the predictor discrimination signal B, the third predictor, 'lPJ device (38) or the fourth predictor (38) is activated.
9), each X-marked data is not sent to a separate predictor.

The selector (18) is controlled by the control circuit (13), and the data transmission circuit (16
) or the signal from the adder (17) are selected alternately. As a result, the decoded digital video signal is output from the data output terminal (19).

In the above embodiment, data prediction is captured using vertical linear prediction and horizontal linear prediction as data prediction methods, but other prediction methods, such as polynomial ap
j, etc. may be used, and a diagonal condition may also be included as the direction of prediction. Furthermore, in addition to the -dimensional prediction 14 pI, a method such as two-dimensional prediction using a plane plate 7111 or the like, or three-dimensional prediction based on data between several fields or between several frames may be used.

Furthermore, in the above embodiment, four data are combined into one as shown in FIG.
Although the example is given in which data is considered as a group, any number of data may be considered as a group, and the number of bits expressing the digital video signal and the number of bits expressing the prediction error signal can be freely set.

Furthermore, in the above embodiment, in determining the prediction method that minimizes the prediction error, the configuration is illustrated in which the magnitude of the absolute value of the pre-7p1 error is compared, but it is also possible to compare the magnitude of the variation range of the pre-7p1 error. It may be determined by a method such as comparing the magnitude of the root mean square error of the prediction error.

[Effects of the Invention] As described above, according to the present invention, data is predicted using a plurality of encoding methods, and the T-aFJ error when the data is predicted using the prediction method that minimizes the prediction error. Since the digital signal processing apparatus is configured to transmit the following information, it is possible to obtain a digital signal processing apparatus that can minimize the prediction error and minimize the deterioration in image quality due to the decoded digital video signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a digital signal processing device according to an embodiment of the present invention, FIGS. 2 and 3 are explanatory diagrams for explaining the operation of the configuration shown in FIG. FIG. 5, a block diagram of the signal processing device, is an explanatory diagram for explaining the operation of the configuration of FIG. 4. (1) is a data input terminal, (2) is a memory, (3) is a data sending circuit, (4) is a first predictor, (5) is a first prediction error detector, (6) is a first 2 predictor, (7) is the second
δl1lffl difference detector, (8) is a comparator, (9)
is the second quantizer, (10) is the first quantizer, (11
) is the selector, (12) is the data output terminal, (13) is the control circuit, (14) is the data input terminal, (15)
) is the memory, (16) is the data sending circuit, (17) is the adder, (18) is the selector, (19) is the data output terminal, (30) is the transmission/recording system, (38) is the third prediction vessel,
(39) is the fourth predictor, (51) is the coding block,
(52) is a decoding block. In the drawings, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] a sampling means for thinning out n-1 pieces of digital video data and transmitting the same; a plurality of prediction means for predictively encoding the thinned out n-1 pieces of data using different prediction methods; A prediction error detection means detects each prediction error in each prediction means, and each detection error of the prediction error detection means is compared to select a prediction method and a minimum prediction error signal that minimize the prediction error, and combine it with the sampled data. means for transmitting; interpolation means for generating n-1 interpolation data based on the transmitted sampling data, the prediction method, and the minimum prediction error signal; 1. A digital signal processing device comprising means for decoding n pieces of digital image data based on the data.