JPH0350887A - Manufacture of printed wiring board - Google Patents
Manufacture of printed wiring boardInfo
- Publication number
- JPH0350887A JPH0350887A JP18624089A JP18624089A JPH0350887A JP H0350887 A JPH0350887 A JP H0350887A JP 18624089 A JP18624089 A JP 18624089A JP 18624089 A JP18624089 A JP 18624089A JP H0350887 A JPH0350887 A JP H0350887A
- Authority
- JP
- Japan
- Prior art keywords
- vacuum
- laminated
- exposure
- executed
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明はフォト法によるプリント配線板の製造方法に関
する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a printed wiring board using a photo method.
（従来の技術）
フォト法によりプリント配線板を製造する場合、例えば
、絶縁基板に保護フィルムと感光性ドライフィルムとの
積層フィルムを真空中でラミネートしている。感光性ド
ライフィルムは、真空中でラミネートすると、絶縁基板
にキズや打こんなとによる凹凸があっても、絶縁基板と
の密着性が大気中よりも良くなる。ラミネート後、大気
中に所定時間放置する。大気中に放置すると、大気中の
酸素が保護フィルムから浸透する。感光性ドライフィル
ムは、通常、アクリルモノマ又はメタアクリル七ツマで
あり、浸透したＭｌによりその重合反応が抑制される。(Prior Art) When manufacturing a printed wiring board by a photo method, for example, a laminated film of a protective film and a photosensitive dry film is laminated on an insulating substrate in vacuum. When a photosensitive dry film is laminated in a vacuum, its adhesion to the insulating substrate is better than in the air, even if the insulating substrate has irregularities due to scratches or punctures. After laminating, leave it in the atmosphere for a predetermined period of time. If left in the atmosphere, atmospheric oxygen will penetrate through the protective film. The photosensitive dry film is usually an acrylic monomer or a methacrylic monomer, and its polymerization reaction is suppressed by the permeated Ml.
そのため、露光の際に余分な反応が生じるのを防止でき
、回路を高い寸法精度で形成できる。Therefore, unnecessary reactions can be prevented from occurring during exposure, and circuits can be formed with high dimensional accuracy.
（発明が解決しようとする課題）
しかし、十分な酸素を保護フィルムから浸透させるため
には５〜６時間程、放置する必要があり製造時間が長く
なる欠点がある。また、酸素により重合反応が抑制され
るために露光量を多く必要とする欠点もある。(Problems to be Solved by the Invention) However, in order to allow sufficient oxygen to permeate through the protective film, it is necessary to leave the protective film for about 5 to 6 hours, resulting in a disadvantage that the production time becomes longer. Further, since the polymerization reaction is suppressed by oxygen, there is also a drawback that a large amount of exposure is required.
本発明は、以上の欠点を改良し、製造時間を短縮でき、
露光量を減少しうるプリント配線板の製造方法を提供す
ることを目的とするものである。The present invention can improve the above-mentioned drawbacks, shorten manufacturing time,
It is an object of the present invention to provide a method for manufacturing a printed wiring board that can reduce the amount of exposure.
（課題を解決するための手段）
本発明は、上記の目的を達成するために、絶縁基板に感
光性ドライフィルムを真空中でラミネートした後、所定
時間放置し、その後露光処理を行なうプリント配線板の
製造方法において、ラミネート後、絶縁基板を真空中に
放置することを特徴とするプリント配線板の製造方法を
提供するものである。(Means for Solving the Problems) In order to achieve the above object, the present invention provides a printed wiring board in which a photosensitive dry film is laminated on an insulating substrate in vacuum, left for a predetermined period of time, and then exposed to light. The present invention provides a method for manufacturing a printed wiring board, characterized in that the insulating substrate is left in a vacuum after lamination.
（作用）
ラミネート後、絶縁基板を真空中に放置し、その後露光
処理をすることにより、酸素の浸透がほとんどなく、感
光性ドライフィルムの重合反応はほとんど抑制されない
ですむ。従って露光量が少なくてもよく、かつ露光量を
少なくすることにより回路の寸法精度も高くできる。ま
た、酸素の浸透が必要ないので、放置時間を著しく短縮
できる。(Function) After lamination, by leaving the insulating substrate in a vacuum and then exposing it to light, there is almost no penetration of oxygen and the polymerization reaction of the photosensitive dry film is hardly suppressed. Therefore, the amount of exposure may be small, and by reducing the amount of exposure, the dimensional accuracy of the circuit can be increased. Furthermore, since oxygen permeation is not required, the standing time can be significantly shortened.
（実施例） 以下、本発明を実施例に基づいて説明する。(Example) Hereinafter, the present invention will be explained based on examples.
先ず、めっき触媒入り接着剤層が両面に積層された絶縁
基板に、保護フィルムと感光性ドライフィルムとからな
るａｌｌフィルムを真空中でラミネートする。次に、ラ
ミネートの際の真空条件と同じ条件下に所定時間放置す
る。放置後、感光性ドライフィルムの表面にフォトマス
クを重ね、紫外線を照射し露光処理を行なう。露光処理
後、現像を行ない、洗浄・乾燥する。乾燥後、無電解め
っき処理により回路を形成する。First, an all film consisting of a protective film and a photosensitive dry film is laminated in vacuum onto an insulating substrate on which adhesive layers containing plating catalysts are laminated on both sides. Next, it is left for a predetermined period of time under the same vacuum conditions as those used during lamination. After standing, a photomask is placed on the surface of the photosensitive dry film, and an exposure process is performed by irradiating it with ultraviolet rays. After exposure processing, development is performed, followed by washing and drying. After drying, a circuit is formed by electroless plating.
次に、上記実施例について、放置時間を変えて、回路の
寸法精度を測定した。製造条件は次の通りとする。Next, regarding the above examples, the dimensional accuracy of the circuit was measured while changing the standing time. The manufacturing conditions are as follows.
絶縁基板ニガラスエポキシ樹脂基板（日立化成工業株式
会社製ＡＣＬ−Ｅ
１６８）
感光性ドライフィルム：日立化成工業株式会社製５Ｒ−
３０００−２２
ラミネートの真空度：６０１１１Ｈ（＋放置条件：真空
度６０ｙｔ１ｇの真空雰囲気中または０．５Ｋｙ／ｃｄ
の窒素を封
入した真空雰囲気中に、放置時
間を２０分、２時間、２日間の
３１Ｉ類とし、計６種類に分けて
放置する。Insulating substrate Niglass epoxy resin substrate (ACL-E 168 manufactured by Hitachi Chemical Co., Ltd.) Photosensitive dry film: 5R- manufactured by Hitachi Chemical Co., Ltd.
3000-22 Vacuum degree of laminate: 60111H (+ Standing condition: vacuum atmosphere of vacuum degree 60yt1g or 0.5Ky/cd
Type 31I was left in a vacuum atmosphere filled with nitrogen for 20 minutes, 2 hours, and 2 days, and was divided into 6 types in total.
露 光 １ ： １ ００ｎＪ／ｃｊ！その結果
、回路は、顕微鏡で３０倍に拡大して調べたところ、従
来と同じ寸法精度で形成されていることが認められた。Exposure 1: 100nJ/cj! As a result, when the circuit was examined under a microscope at a magnification of 30 times, it was found that it was formed with the same dimensional accuracy as the conventional circuit.
また、露光時間を短縮でき、露光に用いられるランプの
消費量も少なくできた。Furthermore, the exposure time could be shortened, and the consumption of the lamp used for exposure could also be reduced.
（発明の効果）
以上の通り、本発明の製造方法によれば、ラミネート後
の放置を真空中で行なっているために、放置時間や露光
時間を短縮でき、全体として製造時間を短縮でき、安価
なプリント配線板が得られる。(Effects of the Invention) As described above, according to the manufacturing method of the present invention, since the leaving after lamination is performed in a vacuum, the leaving time and exposure time can be shortened, and the overall manufacturing time can be shortened and the cost can be reduced. A printed wiring board can be obtained.
Claims (1)
ネートした後、所定時間放置し、その後露光処理を行な
うプリント配線板の製造方法において、ラミネート後、
絶縁基板を真空中に放置することを特徴とするプリント
配線板の製造方法。(1) In a printed wiring board manufacturing method in which a photosensitive dry film is laminated on an insulating substrate in a vacuum, left for a predetermined period of time, and then exposed to light, after lamination,
A method for manufacturing a printed wiring board, characterized by leaving an insulating substrate in a vacuum.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18624089A JPH0350887A (en) | 1989-07-19 | 1989-07-19 | Manufacture of printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18624089A JPH0350887A (en) | 1989-07-19 | 1989-07-19 | Manufacture of printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0350887A true JPH0350887A (en) | 1991-03-05 |
Family
ID=16184806
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18624089A Pending JPH0350887A (en) | 1989-07-19 | 1989-07-19 | Manufacture of printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0350887A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6427325B1 (en) * | 1998-09-01 | 2002-08-06 | International Business Machines Corporation | Flowable compositions and use in filling vias and plated through-holes |
| US11140768B2 (en) | 2019-04-10 | 2021-10-05 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Component carrier with high passive intermodulation performance |
| US12381138B2 (en) | 2018-09-10 | 2025-08-05 | AT&SAustria Technologie &Systemtechnik Aktiengesellschaft | Component carrier with a photoimageable dielectric layer and a structured conductive layer being used as a mask for selectively exposing the photoimageable dielectric layer with electromagnetic radiation |
-
1989
- 1989-07-19 JP JP18624089A patent/JPH0350887A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6427325B1 (en) * | 1998-09-01 | 2002-08-06 | International Business Machines Corporation | Flowable compositions and use in filling vias and plated through-holes |
| US6794040B2 (en) | 1998-09-01 | 2004-09-21 | International Business Machines Corporation | Flowable compositions and use in filling vias and plated through-holes |
| US12381138B2 (en) | 2018-09-10 | 2025-08-05 | AT&SAustria Technologie &Systemtechnik Aktiengesellschaft | Component carrier with a photoimageable dielectric layer and a structured conductive layer being used as a mask for selectively exposing the photoimageable dielectric layer with electromagnetic radiation |
| US11140768B2 (en) | 2019-04-10 | 2021-10-05 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Component carrier with high passive intermodulation performance |
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