JPH036053A - Trimmed resistor and adjustment of its resistance value - Google Patents
Trimmed resistor and adjustment of its resistance valueInfo
- Publication number
- JPH036053A JPH036053A JP1141441A JP14144189A JPH036053A JP H036053 A JPH036053 A JP H036053A JP 1141441 A JP1141441 A JP 1141441A JP 14144189 A JP14144189 A JP 14144189A JP H036053 A JPH036053 A JP H036053A
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- resistance
- resistance value
- trimming
- layer
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Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明は、半導体集積回路内に設けられるトリミング抵
抗およびその抵抗値の調整(以下、トリミングという)
方法に関する。[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a trimming resistor provided in a semiconductor integrated circuit and adjustment of its resistance value (hereinafter referred to as trimming).
Regarding the method.
〈従来技術〉
従来の半導体集積回路の回路特性が回路中の抵抗値によ
って決まる場合(例えば、アナログ・デジタル変換器の
場合)、高精度の抵抗が必要であるため、抵抗値のトリ
ミングが必要とされている。<Prior art> When the circuit characteristics of a conventional semiconductor integrated circuit are determined by the resistance value in the circuit (for example, in the case of an analog-to-digital converter), a high-precision resistor is required, so trimming the resistance value is necessary. has been done.
従来のトリミング抵抗において、トリミングを行なう抵
抗部は第5図のように構成されている。In a conventional trimming resistor, a resistor section for trimming is constructed as shown in FIG.
第5図において、1,2.3は夫々抵抗値RIR2,R
3の抵抗層、4.5は抵抗層1,2.3の一側接続点6
,7.8と接続する第一電極、9.10は抵抗層1,2
.3の他側接続点11.12.13と接続する第二電極
、14はツェナーダイオード15のP+型層16に接続
する第一電極4のパッド、17はツェナーダイオード1
5のN+型層18およびツェナーダイオード19のP4
型層20に接続する第二電極10のパッド、21はツェ
ナーダイオード19のN+型層22に接続する第一電極
5のパッド、23.24はツェナーダイオード15.1
9のP1型層16.20の接続点、25.26はツェナ
ーダイオード+ 5.19のN+型層1822の接続点
を示している。In Fig. 5, 1 and 2.3 are resistance values RIR2 and R, respectively.
3 is the resistance layer, 4.5 is the connection point 6 on one side of the resistance layer 1, 2.3
, 7.8, and 9.10 are the resistance layers 1 and 2.
.. 14 is the pad of the first electrode 4 connected to the P+ type layer 16 of the Zener diode 15; 17 is the Zener diode 1;
5 N+ type layer 18 and Zener diode 19 P4
The pad of the second electrode 10 connected to the type layer 20, 21 the pad of the first electrode 5 connected to the N+ type layer 22 of the Zener diode 19, 23.24 the Zener diode 15.1
25.26 shows the connection point of the Zener diode +5.19 and the N+ type layer 1822.
そして、トリミングを行なう際は、例えば、〜抵抗層1
.2.3の直列抵抗の値が回路特性から要求される抵抗
値よりR2分だけ大きい場合、パッド14.17に過大
の電流を流し、ツェナーダイオード15の接合を破壊し
短絡することによりR2をOにして所望の抵抗値を得る
。When trimming, for example, ~resistance layer 1
.. If the value of the series resistor 2.3 is larger by R2 than the resistance value required from the circuit characteristics, an excessive current is passed through the pad 14.17, destroying the junction of the Zener diode 15 and shorting it, thereby reducing R2 to O. to obtain the desired resistance value.
〈 発明が解決しようとする課題 〉
しかし、上記従来技術では、ツェナーダイオードの接合
の破壊の際、完全な接合破壊にならず、トリミング後に
パッドとツェナーダイオードとの接合の耐圧が回復した
り、ツェナーダイオードとの接合破壊時のサージ電流に
より半導体集積回路に損傷を与えたりする場合がある。<Problems to be Solved by the Invention> However, in the above-mentioned conventional technology, when the Zener diode junction breaks down, the junction breakdown does not occur completely, and the withstand voltage of the junction between the pad and the Zener diode recovers after trimming, or the Zener diode junction breaks down. Surge current when the junction with the diode breaks down may damage the semiconductor integrated circuit.
そこで、本発明は、上記課題に鑑み、半導体集積回路に
おける抵抗値のトリミングを精度良く、かつ半導体集積
回路への損傷を少なくできるトリミング抵抗およびその
抵抗値のトリミング方法の提供を目的とする。SUMMARY OF THE INVENTION In view of the above-mentioned problems, it is an object of the present invention to provide a trimming resistor and a method for trimming its resistance value, which can trim the resistance value of a semiconductor integrated circuit with high accuracy and reduce damage to the semiconductor integrated circuit.
く 課題を解決ずろた島の手段 〉
本発明請求項1による課題解決手段は、第2図(aXb
)の如く、低抗層30.31.32の一側接続点33,
34.35に接続される短絡用第一電極36.37と、
抵抗層30.31.32の他側接続点38.39.40
に接続される短絡用第二電極41゜42とを電気的に絶
縁可能な範囲まで近接して配し、第一電極36.37と
第二電極41.4−2とを導電体47により接続して抵
抗層30.31.32を短絡させ抵抗値の調整を行なう
ものである。A unique means for solving the problem > The means for solving the problem according to claim 1 of the present invention is shown in Fig. 2 (aXb
), one side connection point 33 of the low resistance layer 30, 31, 32,
a first electrode 36.37 for shorting connected to 34.35;
Resistance layer 30.31.32 other side connection point 38.39.40
The second short-circuiting electrodes 41 and 42 connected to the electrodes are placed close together to the extent that they can be electrically insulated, and the first electrode 36.37 and the second electrode 41.4-2 are connected by a conductor 47. This short-circuits the resistance layers 30, 31, and 32 to adjust the resistance value.
また、本発明請求項2による課題解決手段は、第1.3
.4図の如く、半導体集積回路内に設けられ抵抗層30
.31.32および電極36,37,41.42とから
成るトリミング抵抗であって、抵抗層30.31.32
の一側接続点33,34.35を接続する短絡用第一電
極36.37と、抵抗層30.31.32の他側接続点
38,39,4 Qを接続する短絡用第二電極41.4
2とを備え、該第一電極36.37および第二電極41
.42が電気的に絶縁可能な範囲まで接近して配された
ものである。Further, the problem solving means according to claim 2 of the present invention is as follows.
.. 4 As shown in Figure 4, a resistive layer 30 provided within the semiconductor integrated circuit
.. 31.32 and electrodes 36, 37, 41.42, the resistor layer 30.31.32
A first short-circuiting electrode 36.37 connects the connection points 33, 34.35 on one side and a second electrode 41 for short-circuiting connects the connection points 38, 39, 4Q on the other side of the resistance layer 30.31.32. .4
2, the first electrode 36,37 and the second electrode 41
.. 42 are arranged close enough to each other to be electrically insulated.
〈作用〉
上記課題解決手段において、例えば、抵抗層30.31
.32の直列抵抗の値が回路特性から要求される抵抗値
上りR2だけ大きい場合、第一電極36および第二電極
42の両方にわたって導電体47を接続する。<Function> In the above problem solving means, for example, the resistance layer 30, 31
.. When the value of the series resistance 32 is larger by the resistance value rise R2 required from the circuit characteristics, the conductor 47 is connected across both the first electrode 36 and the second electrode 42.
そうすると、抵抗層31を短絡することになり、抵抗値
R2分だけ小さくなりトリミング調整が完了する。In this case, the resistance layer 31 is short-circuited, the resistance value R2 is reduced, and the trimming adjustment is completed.
また、抵抗層30,31.32の直列抵抗の値が回路特
性から要求される抵抗値上りR2,R3だけ大きい場合
、第一電極36、第二電極42の他に第一電極37およ
び第二電極42も導電体47を接続すれば、抵抗層31
.32が短絡し抵抗値R2,R3分だけ小さくなりトリ
ミング調整か完了する。Further, if the value of the series resistance of the resistance layers 30, 31, 32 is larger by the resistance value increase R2, R3 required from the circuit characteristics, in addition to the first electrode 36 and the second electrode 42, the first electrode 37 and the second electrode 42 also connects the conductor 47, the resistance layer 31
.. 32 is short-circuited, the resistance values R2 and R3 are reduced, and the trimming adjustment is completed.
このように、第一電極36.37と第二電極42との両
方にわたって導電体47を接続してトリミング調整を要
する抵抗層31.32を短絡させることにより、抵抗値
のトリミング時に従来のように半導体集積回路に過大の
電流を流す必要がなくなり、半導体集積回路に損傷を与
えないで済む。In this way, by connecting the conductor 47 across both the first electrode 36, 37 and the second electrode 42 to short-circuit the resistance layer 31, 32 that requires trimming adjustment, it is possible to trim the resistance value in a conventional manner. It is no longer necessary to flow an excessive current through the semiconductor integrated circuit, and the semiconductor integrated circuit is not damaged.
さらに、短絡すべき抵抗層を完全に短絡させることがで
きるため、抵抗値のトリミングを精度良く行なうことが
できる。Furthermore, since the resistance layers to be shorted can be completely shorted, the resistance value can be trimmed with high precision.
〈実施例〉 以下、本発明の実施例について図面により説明する。<Example> Embodiments of the present invention will be described below with reference to the drawings.
[第一実施例]
まず、本発明の第一実施例を第1図ないし第2図(a)
(b)に基づいて説明する。[First Embodiment] First, the first embodiment of the present invention is shown in FIGS. 1 and 2(a).
The explanation will be based on (b).
第1図は本発明第一実施例のトリミング抵抗の平面図、
第2図(a)はトリミングを施した状態を示す要部拡大
平面図、第2図(b)は第2図(a)のA−A断面図で
ある。FIG. 1 is a plan view of a trimming resistor according to the first embodiment of the present invention;
FIG. 2(a) is an enlarged plan view of the main part showing a trimmed state, and FIG. 2(b) is a sectional view taken along the line AA in FIG. 2(a).
第1図の如く、本実施例のトリミング抵抗は、半導体集
積回路内に設けられ抵抗層30,31.32および電極
36.37.42とから成り、抵抗層30 31.32
の一側接続点33,34.35を互いに接続する短絡用
第一電極36.37と、抵抗層31.32の他側接続点
38,39.40を互いに接続する短絡用第二電極42
とを備え、該第一電極36.37および第二電極42か
電気的に絶縁可能な範囲(例えば、5μm)まで接近し
て配されたものである。As shown in FIG. 1, the trimming resistor of this embodiment is provided in a semiconductor integrated circuit and consists of resistive layers 30, 31, 32 and electrodes 36, 37, 42.
A first shorting electrode 36.37 that connects the connection points 33, 34.35 on one side to each other, and a second electrode 42 for shorting that connects the connection points 38, 39.40 on the other side of the resistance layer 31.32 to each other.
The first electrode 36, 37 and the second electrode 42 are arranged close to each other within an electrically insulating range (for example, 5 μm).
前記電極36.37.42は、金属製であり、前記抵抗
層30.31.32を夫々直列に接続する配線43.4
4.46と、該配線43,44.46から延設され抵抗
層31.32の短絡時に導電体47により接続される略
り字形のポンディングパッド48 49 50 51と
から構成されている。The electrodes 36, 37, 42 are made of metal, and the wirings 43, 4 connect the resistance layers 30, 31, 32 in series, respectively.
4.46, and abbreviated bonding pads 48, 49, 50, and 51 extending from the wirings 43, 44, and 46 and connected by a conductor 47 when the resistance layer 31.32 is short-circuited.
そして、該パッド4.8.50およびパッド49゜51
間の距離は、電気的に絶縁可能な範囲で近接して配置さ
れている。And said pad 4.8.50 and pad 49°51
The distance between them is such that they are placed close to each other within a range that allows electrical insulation.
なお、第1図中、45は抵抗層30の他側接続点38と
接続する金属配線である。In addition, in FIG. 1, 45 is a metal wiring connected to the other side connection point 38 of the resistance layer 30.
次に、上記トリミング抵抗の抵抗値のトリミング方法を
第2図(a)(b)に基づいて説明する。Next, a method for trimming the resistance value of the trimming resistor will be explained based on FIGS. 2(a) and 2(b).
例えば、抵抗層30.31.32の直列抵抗の値が回路
特性から要求される抵抗値上りR2だけ大きい場合、第
2図(aXb)の如く、パッド48,50の両方にわた
って導電体(ワイヤーボンディングの金ボール)47を
接続する。ただし、パッド49.51には導電体47を
接続せず絶縁状態を保つ。For example, if the value of the series resistance of the resistance layer 30, 31, 32 is greater by the resistance value rise R2 required from the circuit characteristics, as shown in FIG. Gold ball) 47 is connected. However, the conductor 47 is not connected to the pads 49 and 51 to maintain an insulated state.
そうすると、抵抗層3Iを短絡ずことになり、抵抗値R
2分だけ小さくなりトリミング調整が完了する。In this case, the resistance layer 3I will not be short-circuited, and the resistance value R
It becomes smaller by 2 minutes and the trimming adjustment is completed.
また、抵抗層30,31.32の直列抵抗の値が回路特
性から要求される抵抗値よりIt、 2 、R3だけ大
きい場合、バット48.50の他にパッド49.51も
導電体47を接続すれば、抵抗層3132が短絡し抵抗
値R2,R3分だけ小さくなりトリミング調整が完了す
る。Further, if the value of the series resistance of the resistance layers 30, 31.32 is larger than the resistance value required from the circuit characteristics by It, 2, R3, the conductor 47 is connected to the pad 49.51 in addition to the bat 48.50. Then, the resistance layer 3132 is short-circuited and the resistance values R2 and R3 are reduced to complete the trimming adjustment.
このように、第一電極36.37と第二電極42との両
方にわたって導電体47を接続してトリミング調整を要
する抵抗層31.32を短絡させることにより、抵抗値
のトリミング時に従来のように半導体集積回路に過大の
電流を流す必要がなくなり、半導体集積回路に損傷を与
えないで済む。In this way, by connecting the conductor 47 across both the first electrode 36, 37 and the second electrode 42 to short-circuit the resistance layer 31, 32 that requires trimming adjustment, it is possible to trim the resistance value in a conventional manner. It is no longer necessary to flow an excessive current through the semiconductor integrated circuit, and the semiconductor integrated circuit is not damaged.
さらに、短絡すべき抵抗層を完全に短絡させることがで
きるため、抵抗値のトリミングを精度良く行なうことか
できる。Furthermore, since the resistance layers to be shorted can be completely shorted, the resistance value can be trimmed with high precision.
[第二実施例]
次に、本発明の第二実施例を第3図に基づいて説明する
。[Second Embodiment] Next, a second embodiment of the present invention will be described based on FIG. 3.
第3図は本発明第二実施例のトリミング抵抗のパッドの
拡大平面図である。FIG. 3 is an enlarged plan view of a pad of a trimming resistor according to a second embodiment of the present invention.
図示の如く、本実施例のトリミング抵抗は、第一電極3
6.37のパッド48.49に凹部52か形成され、該
凹部52に組み合う凸部53が第二電極42のパッド5
0.51に形成され、該第一電極36.37および第二
電極42が櫛形に設けられたものである。As shown in the figure, the trimming resistor of this example has the first electrode 3
A concave portion 52 is formed in the pad 48 and 49 of 6.37, and a convex portion 53 that engages with the concave portion 52 is the pad 5 of the second electrode 42.
0.51, and the first electrode 36, 37 and the second electrode 42 are provided in a comb shape.
上記構成において、例えば、パッド48.50の両方に
わたって導電体47を接続する際に導電体47の位置合
わせ精度が問題となる場合には、パッド48の凹部52
とパッド50の凸部53とを電気的に絶縁可能な範囲ま
で近接して配して組み合わせることにより、導電体47
の位置合わせが精度良く行なイつれる。In the above configuration, for example, if the alignment accuracy of the conductor 47 is a problem when connecting the conductor 47 across both pads 48 and 50, the concave portion 52 of the pad 48
By arranging and combining the convex portion 53 of the pad 50 and the convex portion 53 of the pad 50 as close as possible to the extent that electrical insulation is possible, the conductor 47
Positioning can be performed with high precision.
このとき、パッド48.50の櫛形の歯に相当する部分
の幅は、導電体(金ボール)47の直径よりも小さくす
る必要がある。At this time, the width of the portions of the pads 48 and 50 corresponding to the comb-shaped teeth needs to be smaller than the diameter of the conductor (gold ball) 47.
その他の構成および作用、効果は、第一実施例と同様で
ある。Other configurations, functions, and effects are the same as in the first embodiment.
また、パッド48.49.50.51を第4図に示す形
状にしても、同様な効果を得ることができる。Further, the same effect can be obtained even if the pads 48, 49, 50, 51 are shaped as shown in FIG.
なお、本発明は、上記実施例に限定されるものではなく
、本発明の範囲内で上記実施例に多くの修正および変更
を加え得ることは勿論である。It should be noted that the present invention is not limited to the above embodiments, and it goes without saying that many modifications and changes can be made to the above embodiments within the scope of the present invention.
例えば、上記実施例では、抵抗層の数を三個、パッドの
数を四個としているが、この組み合わせを所望の抵抗値
精度や回路特性に合わせて増減させても良い。For example, in the above embodiment, the number of resistance layers is three and the number of pads is four, but this combination may be increased or decreased according to desired resistance value accuracy or circuit characteristics.
まな、パッドに用いられる導電体47には、金ボール以
外の導電性の物質なら何でも良く、さらに導電体47の
成形方法についてもワイヤーボンディングに限らずイオ
ンビーム法、光CVD法等を用いても良い。The conductor 47 used for the pad may be made of any conductive material other than gold balls, and the method of forming the conductor 47 is not limited to wire bonding, but may also include ion beam method, photo-CVD method, etc. good.
〈発明の効果〉
以」二の説明から明らかな通り、本発明によると、抵抗
層の一側接続点を接続する第一電極と、抵抗層の他側接
続点を接続する第二電極とを電気的に絶縁可能な範囲ま
で近接して配しているので、抵抗値のトリミング時には
、第一電極と第二電極との両方にわたって導電体を接続
してトリミング調整を要する抵抗、留を短絡させること
ができる。<Effects of the Invention> As is clear from the explanation in section 2 below, according to the present invention, the first electrode that connects the connection point on one side of the resistance layer and the second electrode that connects the connection point on the other side of the resistance layer are connected. Since they are placed close together to the extent that they can be electrically insulated, when trimming the resistance value, connect a conductor across both the first and second electrodes to short-circuit the resistor and clasp that require trimming adjustment. be able to.
したがって、抵抗値のトリミング時に従来のように半導
体集積回路に過大の電流を流す必要がなくなり、半導体
集積回路に損傷を与えないで済む。Therefore, when trimming the resistance value, it is no longer necessary to flow an excessive current through the semiconductor integrated circuit as in the conventional case, and the semiconductor integrated circuit can be prevented from being damaged.
さらに、短絡すべき抵抗層を完全に短絡させることがで
きるため、抵抗値のトリミングを精度良く行なうことが
できる。Furthermore, since the resistance layers to be shorted can be completely shorted, the resistance value can be trimmed with high precision.
平面図、第2図(a)はトリミングを施した状態を示す
要部拡大平面図、第2図(b)は第2図(a)のAA断
面図、第3図は本発明第二実施例のトリミング抵抗のパ
ッドの拡大平面図、第4図は第3図に示した第二実施例
の変形例を示す図、第5図は従来のトリミング抵抗の平
面図である。
30.31,32:抵抗層、33,34,35ニ一側接
続点、36.37 第一電極、39,40:他側接続点
、42:第二電極、47:導電体、52・凹部、53:
凸部。
出 願 人 シャープ株式会社Plan view, FIG. 2(a) is an enlarged plan view of essential parts showing a trimmed state, FIG. 2(b) is a sectional view taken along line AA of FIG. 2(a), and FIG. 3 is a second embodiment of the present invention. FIG. 4 is a diagram showing a modification of the second embodiment shown in FIG. 3, and FIG. 5 is a plan view of a conventional trimming resistor. 30. 31, 32: Resistance layer, 33, 34, 35 connection point on one side, 36. 37 first electrode, 39, 40: connection point on other side, 42: second electrode, 47: conductor, 52/recess , 53:
Convex part. Applicant Sharp Corporation
Claims (2)
と、抵抗層の他側接続点に接続される短絡用第二電極と
を電気的に絶縁可能な範囲まで近接して配し、第一電極
と第二電極とを導電体により接続して抵抗層を短絡させ
ることを特徴とするトリミング抵抗の抵抗値の調整方法
。1. A first electrode for shorting connected to a connection point on one side of the resistance layer and a second electrode for shorting connected to a connection point on the other side of the resistance layer are arranged close to each other to the extent that they can be electrically insulated, A method for adjusting the resistance value of a trimming resistor, comprising connecting a first electrode and a second electrode with a conductor to short-circuit a resistive layer.
ら成るトリミング抵抗であつて、抵抗層の一側接続点を
接続する短絡用第一電極と、抵抗層の他側接続点を接続
する短絡用第二電極とを備え、該第一電極および第二電
極が電気的に絶縁可能な範囲まで接近して配されたこと
を特徴とするトリミング抵抗。2. A trimming resistor is provided in a semiconductor integrated circuit and is composed of a resistive layer and an electrode, and includes a first short-circuiting electrode that connects a connection point on one side of the resistive layer, and a second short-circuiting electrode that connects a connecting point on the other side of the resistive layer. What is claimed is: 1. A trimming resistor comprising: a first electrode and a second electrode disposed close to each other to the extent that they can be electrically insulated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1141441A JPH036053A (en) | 1989-06-02 | 1989-06-02 | Trimmed resistor and adjustment of its resistance value |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1141441A JPH036053A (en) | 1989-06-02 | 1989-06-02 | Trimmed resistor and adjustment of its resistance value |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH036053A true JPH036053A (en) | 1991-01-11 |
Family
ID=15292019
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1141441A Pending JPH036053A (en) | 1989-06-02 | 1989-06-02 | Trimmed resistor and adjustment of its resistance value |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH036053A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9665752B2 (en) | 2008-12-23 | 2017-05-30 | Palodex Group Oy | Image plate readout device |
| US9770522B2 (en) | 2008-12-23 | 2017-09-26 | Palodex Group Oy | Cleaning system for an image plate readout device |
-
1989
- 1989-06-02 JP JP1141441A patent/JPH036053A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9665752B2 (en) | 2008-12-23 | 2017-05-30 | Palodex Group Oy | Image plate readout device |
| US9770522B2 (en) | 2008-12-23 | 2017-09-26 | Palodex Group Oy | Cleaning system for an image plate readout device |
| US10080535B2 (en) | 2008-12-23 | 2018-09-25 | Palodex Group Oy | Image plate readout device |
| US10688205B2 (en) | 2008-12-23 | 2020-06-23 | Palodex Group Oy | Cleaning system for an image plate readout device |
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