JPH10303699A - Gm-c filter circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the Gm-C filter circuit of which a circuit scale is reduced by a required value and the accuracy of the filter is improved. SOLUTION: A signal with a center frequency of an ideal band pass filter is given to a reference signal input terminal 21 to adjust the Gm-C filter (BPF) 10. A phase comparator 11 consisting of a multiplier 32, an LPF 33 and a comparator 34 provides an output of a phase lag (lead) signal to an output terminal. Then an up-down counter 12 increases (decreaces) a count of the counter 12 based on the phase lag (lead) signal by one. A fine-adjustment bias current generating circuit 13 decides its output current by a count output 27 of the up-down counter 12. Since a Gm of each Gm amplifier is controlled by a bias current fed to each bias terminal, the center frequency of the Gm-C filter 10 is controlled.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Gm-C filter circuit having excellent filter accuracy.

[0002]

2. Description of the Related Art A Gm-C filter is a time-continuous filter, unlike a sampling filter such as a switched-capacitor filter.

FIG. 11 shows an example of a conventionally known Gm-C filter. 11, 50 is a Gm-C filter composed of a Gm amplifier and a capacitance, 51 is a Gm-C low-pass filter composed of a Gm amplifier and a capacitance, 52 is a phase comparator, 53 is a low-pass filter, 54
And 55 are comparators. And
These elements 51 to 55 constitute a PLL circuit 56.

FIG. 12 shows a PLL circuit 56 shown in FIG.
Is shown below. In FIG. 12, 61 to 64
Is a Gm amplifier, and 65 and 66 are capacitors. The Gm-C filter 51 having these elements 61 to 66 has a low-pass filter characteristic when the input terminal is 67 and the output terminal is 68, and at the same time, has a phase shift in the low band as shown in FIG. Is 0 °, and the phase shift is 180 at high frequencies.
°, the phase shift at the cut-off frequency f _c is 9
It has a phase characteristic of 0 °. That is, when the frequency of the input signal matches the cut-off frequency f _c is
The filter input signal and the filter output signal pass through comparators 55 and 54, respectively,
Through the exclusive OR circuit (EXOR) functioning as an output signal, the output signal has a frequency twice as high as that of the input signal, and the respective periods of the high-level logic and the low-level logic are equal, that is, an output signal having a duty ratio of 50%. . At this time, even if the signal output from the phase comparator 52 passes through the integrator 53 (LPF) which also functions as a low-pass filter, the DC output level of the integrator 53 does not change, and the phase locked state can be realized.

[0005] If, when the cutoff frequency f _c 'of filter formed by the elements 61 to 66 shown in FIG. 12 smaller than the design value f _c, as can be seen from FIG. 14, the phase delay is the design value ( = 90 °). As a result, in the output signal of the phase comparator 52, the period of the high-level logic is shorter than the period of the low-level logic.
3 operates in the direction of lowering the output level. The bias voltage generated when the output level of the integrator 53 drops increases the Gm values of all the Gm amplifiers 61 to 64. In particular, Gm amplifiers 62 and 63
Since the Gm value determines the cutoff frequency of the Gm-C filter 51, the cutoff frequency increases as the Gm value increases. Thus, the output level of the integrator 53 shifts in the direction where the cutoff frequency of the filter 51 becomes equal to the design value, and finally the phase comparator 52
When the duty ratio of the output signal becomes 50%, that is, when the cutoff frequency of the filter 51 becomes equal to the design value _{(f c '= f c)} , the integrator output settles to a constant level. Also, when the cutoff frequency of the filter 51 is higher than the design value, the same operation is performed, and finally, the cutoff frequency of the filter 51 becomes equal to the design value, and the output of the integrator falls to a certain level.

On the other hand, the Gm-C filter 50 shown in FIG.
If the configuration is exactly the same as that of the filter 51 and the Gm value and the capacitance value of the Gm amplifier used therein are also the same, the characteristics of the filter 50 and the filter 51 become the same. However, since the Gm value of the actually configured Gm amplifier cannot be realized as the design value due to the variation between the elements of the MOSFET, an error occurs between the filters.

Here, the circuit configuration of the filter 50 is shown in FIG.
Shown in The circuit configuration shown in FIG.
This is exactly the same as the filter 51. The cutoff frequency of the filter 50 is proportional to the geometric mean of the Gm values of the Gm amplifiers 92 and 93. Similarly, the cutoff frequency of the filter 51 (see FIG. 12) is
It is proportional to the geometric mean of the values. Assuming that the filter 51 (FIG. 12)
The Gm amplifiers 92, 9 of the filter 50 (see FIG. 15)
If it is about 1% larger than the geometric mean of the Gm values of 3,
The cutoff frequency of the filter 51 is about 1% higher than that of the filter 50.

Even if the Gm amplifiers are designed in exactly the same manner, an error occurs between the Gm values due to a process problem, so that the characteristics of the filter 50 (see FIG. 15) are changed to those of the filter 51 (see FIG. 12). Does not exactly match. Moreover, this error is caused by S which is frequently used in LSI.
Since it is larger than a CF (switched capacitor filter), it has been difficult to put it to practical use.

[0009]

As a method of solving such a problem, there is known a method of adjusting the characteristics required for a filter by using a correction method using an adaptive filter. As a correction method using this adaptive filter, for example, KARAN A. IEEE, CI by KOZMA et al.
RCUITS AND SYSTEMS 1991/1
A method of publishing the January issue on page 1241 is known.

FIG. 16 shows a configuration of a Gm-C filter circuit using the above adaptive filter technique. In this figure, 121 is an ideal input signal source, 122 is a Gm-C filter, 123 to 126 are gradient filters, 127 is an ideal output signal source, 128 to 131 are multipliers, and 132 to 135 function as accumulators. The integrator 136 is a subtractor.

Here, the gradient filters 123 to 126 are used for generating gradient coefficients (described in each block) necessary for correcting each coefficient of the filter. Is a predetermined output of the Gm-C filter 122. The circuit configuration of each gradient filter is basically the same as that of the Gm-C filter.

In order to update the variables of the Gm-C filter 122, a signal is input to the Gm-C filter 122,
The output is compared with an ideal output signal to operate so that the error signal ε becomes zero.

However, when a circuit for performing such an operation is configured, there is a problem that the circuit scale becomes extremely large.

Accordingly, an object of the present invention is to provide
An object of the present invention is to provide a Gm-C filter circuit in which a required circuit scale is reduced and the accuracy of the filter is improved.

[0015]

In order to achieve the above object, a Gm-C filter circuit according to the present invention comprises a band-pass type Gm amplifier having a control terminal for controlling a Gm value and a capacitor. In order to compare a phase relationship between a Gm-C filter, a reference signal input to the Gm-C filter, and a signal output from the Gm-C filter,
A phase comparing means comprising a multiplier and an averaging means for averaging the output of the multiplier; and a control signal for controlling the Gm value based on a comparison signal output from the phase comparing means. Control signal generating means for supplying the control signal to the terminal.

Here, it is also possible to adopt a configuration in which after adjusting the characteristics of the Gm-C filter, a bias signal for correction is added to the control signal generating means (see FIG. 7).
That is, in order to correct an error in the frequency of the reference signal, it is preferable to add or subtract a constant correction value corresponding to the error and supply the result to the control terminal of the Gm-C filter.

Prior to adjusting the characteristics of the Gm-C filter, it is also possible to perform a coarse adjustment of the filter (see FIG. 9).

In addition, the reference signal input to the Gm-C filter is switched to an input signal for processing, and an output signal from the Gm-C filter is switched to a predetermined signal without being input to the phase comparison means. A configuration including switching means for guiding to the output end can be provided.

According to the present invention described above, the center frequency is adjusted and controlled so that the phase characteristic of the Gm-C filter becomes equal to that of the ideal filter at its ideal center frequency, thereby improving the accuracy of the frequency characteristic of the filter. Can be done.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIGS.
An embodiment of the present invention will be described.

Embodiment 1 FIG. 1 shows a block diagram of a Gm-C filter circuit to which the present invention is applied. In FIG. 1, reference numeral 10 denotes a Gm-C filter including a Gm amplifier and a capacitor, and 11 denotes a phase comparator for comparing the phase of an input signal 21 of the Gm-C filter 10 with the phase of an output signal 24 of the Gm-C filter 10. . In the phase comparator 11, reference numeral 32 denotes a Gm-C filter 10.
, A multiplier for multiplying the output signal of the Gm-C filter 10 by an input signal of the Gm-C filter 10, a low-pass filter (LPF) 33 for generating an average value of an output of the multiplier 32, and a LPF 34.
This is a comparator for comparing the output of F33 with the reference signal level Vref, and operates as a phase comparator as a whole. That is, Gm-C
The average value of the phase of the input signal and the output signal of the filter 10;
Information for comparison with the reference phase can be obtained. Reference numeral 12 denotes an up / down counter that counts up or down according to the polarity of the output of the phase comparator 11. That is, the phase comparator 11 operates to count up if the output is positive, and count down if the output is negative.

Reference numeral 13 denotes a fine adjustment bias current generating circuit in which an output current value (bias current value) 30 is determined in accordance with an output signal 27 of the up / down counter 12. Reference numeral 14 denotes a self-adjustment (feedback) of the frequency characteristic of the Gm-C filter 10. A bias current generating circuit (PLL circuit) 15 for generating a reference bias current I _PLL necessary for the control) and a bias current generating circuit 14 and a fine adjustment bias current generating circuit 13
_Is an adder for adding each of the output currents 29 (I _PLL ) and 30 (I _TUNE ). Then, the output current 31 (I _FIL ) of the adder 15 is supplied to a bias terminal for adjusting the frequency characteristics of the Gm-C filter 10.

Reference numeral 20 denotes an input terminal for introducing an input signal of the filter 10, reference numeral 21 denotes a reference signal input terminal for introducing a reference signal for self-adjusting the frequency characteristic of the filter 10, and 16
And 17 are switches for switching a signal input to the Gm-C filter 10, 22 is an output terminal for outputting an output signal of the filter 10, and 18 and 19 are filters 10
Is a switch for switching between outputting the output signal to the output terminal and outputting the output signal to the phase comparator 11, and a terminal 28 for applying a reference clock signal to be input to the bias current generating circuit 14.

Next, the operation of the Gm-C filter shown in FIG. 1 will be described.

Bandpass filter (Gm-C filter) 1
FIG. 2 shows the frequency characteristics of 0. Here, FIG. 2A shows frequency-gain characteristics. FIG. 2 (B) is a frequency-phase characteristic, as shown in FIG., The phase has a property that becomes zero at the center frequency f _o. That is, the input signal frequency band pass filters equal to the center frequency f _o (hereinafter referred to as BPF), the output signal of the phase is consistent with the input signal.

First, as a training signal to be supplied to the reference signal input terminal 21 for adjusting the Gm-C filter (BPF) 10, the phase of the training signal is 90 degrees with respect to the center frequency of the ideal band-pass filter as shown in FIG. ° choosing the signal having the frequency f ₁ or f ₂ as shifted. In this embodiment, the frequency f _{2 is} such that the phase is delayed by 90 ° from that of the center frequency.
Select At this time, the switches 17 and 19 are turned on,
16 and 18 are turned off. If the center frequency of the BPF 10 is smaller than the ideal value, the output phase will lag behind the ideal value. That is, the phase becomes larger than 90 °.

FIG. 3 shows the phase delay and the L of the phase comparator 11.
The relationship with the output state of the PF 33 will be described. That is,
The output maximum value V _max of the multiplier 32 when two signals of phase equal completely to be inputted LPF 33, the minimum value V _min output when the phase is reversed i.e. 180 °, when the phase is 90 ° shows an intermediate value V _m. When the intermediate value _Vm is selected as the reference signal level _Vref of the comparator 34, the phase becomes -9.
The range from 0 ° to 90 ° indicates the “H” level, and the phase from 90 ° to 270 ° indicates the “L” level. In this example, since the phase is delayed, the output becomes “L”.

The up / down counter 12 includes a comparator 34
The count of the counter is increased or decreased by one based on the output “L” or “H”. For example, if the initial value of the counter 12 is “0”, the output of the counter 12 becomes “1” in this case.

The output current of the fine adjustment bias current generating circuit 13 is determined by the output of the counter 12. For example, if the output of the counter is “N”, the output current I _TUNE is given by the following equation.

[0030]

I _TUNE = N × I _ref (1) where I _ref is a minute reference current proportional to the current generated by the bias current generating circuit 14, and N is a count value of the counter 12. That is, N ranges from the minimum value N _min to the maximum value N
the N _min = -N _max as an integer value in the range of _max. The output current 31 of the adder 15 (I _FIL), since by adding the output current I _TUNE output current I _PLL and a fine adjustment bias current generating circuit 13 of the bias current generating circuit 14, the output bias current I _FIL following Given by the formula.

[0031]

I _FIL = I _PLL + I _TUNE (2) In this case, since I _TUNE increases due to the phase delay, the output bias current I _FIL also increases. Thus, the frequency characteristics of the Gm-C filter 10 are controlled by the output bias current I _FIL .

Now, it is assumed that the Gm-C filter 10 is designed so that the center frequency increases with an increase in the bias current I _FIL . Then, the phase lag of the Gm-C filter 10 is reduced by such an operation.
By repeating such a counter operation, the phase of the Gm-C filter 10 finally becomes 90 ° at the reference input signal frequency, and as a result, the center frequency finally matches the ideal filter.

It is assumed that a Gm-C filter (BPF) 1
If the center frequency of 0 is larger than the ideal value, the output phase will advance beyond the ideal value of 90 °. Therefore, the output of the comparator 34 becomes "H". The up / down counter 12 decreases by 1 because the output of the comparator 34 is at the “H” level. For example, if the initial value of the counter 12 is “0”, the output of the counter 12 becomes “−”.
1 ".

As a result, the output of the counter 12 decreases, the output current I _{TUNE of the} fine adjustment bias current generating circuit 13 determined based on the output of the counter 12 decreases, and the output current I _FIL of the adder 15 also decreases. .

Due to the decrease of the output current I _FIL , Gm-
The center frequency of the C filter 10 will decrease.

When the up / down counter 12 repeats the same operation, the input / output phase difference of the Gm-C filter 10 becomes zero at the reference input signal frequency.
As a result, the center frequency will eventually match that of the ideal filter.

FIG. 4 shows the Gm-C filter 1 shown in FIG.
0 shows a circuit configuration. Here, 37 to 40 are Gm amplifiers,
Reference numerals 41 and 42 denote capacitances, and the Gm-C filter 10 is constituted by these elements 37 to 42. And
The output bias current I _FIL from the adder 15 is supplied to each Gm value control bias terminal of the Gm amplifier.
Each G is controlled by a bias current supplied to each bias terminal.
By controlling the Gm value of the m amplifier, the cutoff frequency of the Gm-C filter 10 is controlled. Incidentally, MOSFET 43 is one element of the current mirror circuit, and converts the current value I ₁ to a voltage value (current I ₂ proportional to I ₁ flows to MOSFET 44: see FIG. 5).

FIG. 5 shows a detailed circuit configuration of each Gm amplifier shown in FIG. Here, 44 is the MOSFET of FIG.
MOS forming a current mirror circuit in pair with 43
A FET, acts as a current source formed by the bias current control circuit, Gm value of each Gm amplifier is determined by the current value I _2. Specifically, the Gm value is given by the following equation.

[0039]

Gm = 2 (I ₂ K) ^0.5 (3) Accordingly, when the current I _1, that is, the bias current I _FIL from the adder 15 increases, the Gm value increases, and as a result, the center frequency increases.

Reference numerals 45 and 46 denote input MOSFETs which receive positive and negative signals at their gates, and reference numerals 47 and 48 denote load MOSFETs, to each gate terminal of which an in-phase signal adjustment signal is applied.

The present invention is not limited to the configuration of the Gm amplifier shown in FIG. 5, but can be applied to other general Gm amplifiers.

Although a current (bias current) is used as a signal input to the adder 15 in FIG. 1, the addition of voltages can be performed by providing a current-voltage conversion circuit.

FIG. 6 shows another circuit configuration of the comparator 34 shown in FIG. That is, two comparators 70 and 71 can be used as the comparator 34 as shown in FIG.
6, 70 and 71 comparators, 72 the logic circuit, 73 is an input signal terminal, a reference signal input terminal for inputting a reference signal V _mH 74, 75 a reference signal input for inputting the other reference signal V _mL Terminals 76 and 77 are output terminals. In the illustrated comparator 34, when the output of the LPF 33 is higher than V _{mH, the} output 1 is “H”, and the output of the LPF 33 is V _mL
When it is smaller, the output 2 is “H” and the output of the LPF 33 is V
_In the case between _mL and V _mH , both outputs 1 and 2 are set to “L”. As a result, the up / down counter 12 counts down when the output 1 of the comparator is "H", counts up when the output 2 is "H", and does not operate when both outputs 1 and 2 are "L". You can do so. Thus, when the Gm-C filter 10 has been adjusted to some extent and the frequency accuracy is within a certain range, the counter 12 does not operate, so that unnecessary operation of the circuit can be suppressed, and the adjustment can be performed by using this signal. The operation can also be terminated.

Embodiment 2 The reference signal frequency for the above adjustment is a frequency f ₁ or f ₂ whose phase is shifted by 90 ° with respect to the center frequency of the ideal band-pass filter as shown in FIG. You should choose. However, it is easy to generate any frequency as a measurement device, it is difficult to generally generate an accurate frequency f ₂ from the clock present in the system. Assuming that the frequency used for adjustment is f ₃ , the center frequency of the adjusted filter is f ₃ with respect to the ideal value.
It will be shifted by ₃ -f _2. In this case, the use of the circuit shown in FIG. 7, it is possible even without accurate reference frequency signal f ₂ to obtain a filter accurate characterization.

The circuit configuration shown in FIG. 7 is different from that shown in FIG. 1 in that a bias current source 78 for correction and a switch 79 for adding or subtracting the current of the bias current source 78 after adjusting the Gm-C filter are provided. Is the same as The operation for correction in FIG. 7 is exactly the same as that in FIG.
After adjusting the frequency of the filter, switch
6 or 18 or slightly earlier in consideration of the switching time constant of the Gm-C filter.
By turning on 9, an error in the reference frequency can be corrected.

Embodiment 3 In order for the filter circuit shown in FIG. 1 to operate normally,
The phase error of the frequency before correction is ± 180 ° from FIG.
Is required. Beyond this range, comparator 3
The sign of 4 changes, and it cannot be adjusted to a normal value. For example, in FIG. 8, the phase before adjustment is 90 ° + 18.
If it is larger than 0 °, the phase after adjustment is point A (90
°) instead of point B (450 °), which is another stable point, and there is a problem that the frequency after correction is significantly different from the ideal value. Therefore, in order for the filter circuit of FIG. 1 to operate normally, the frequency accuracy needs to be within a certain range before adjustment.

A method for avoiding this problem will be described with reference to the filter circuit shown in FIG.

FIG. 9 is the same as the circuit of FIG. 1 except that the coarse correction circuit 80 generates the current I _PLL1 . That is, before the main adjustment, the filter characteristics are roughly corrected (coarse adjustment) by the coarse correction circuit 80 so that the phase is surely included in 90 ° ± 180 °, and the correction is performed by the method described with reference to FIG. I do.

FIG. 10 shows a specific circuit example of the coarse correction circuit 80.
Shown in In FIG. 10, 29 is an input current terminal, and 81 is an output current terminal. Each of the transistors 82 to 86 constitutes a current mirror circuit, and 87 to 89 are switches for selecting the output of the current generated by the current mirror. The switches 87 to 89 are controlled by an external adjustment signal, and are also controlled by a metal fuse method at the time of wafer shipping inspection.

As described above, by performing the coarse correction in advance to suppress the phase error to a certain set range, and then correcting the phase error by the method of FIG. 1, the adjustment can be performed without malfunction.

When the phase comparator 11 of FIG. 1 does not include the comparator 34, the analog signal is processed instead of the up / down counter 12 because the phase information is included in the output signal level of the LPF 33. A fine adjustment bias signal can also be generated according to the output signal level of the LPF 33 using an arithmetic unit that performs the operation.

[0052]

As described above, in the present invention, the frequency characteristic of the Gm-C filter is self-adjusted by controlling the Gm value of the Gm amplifier, so that a filter having excellent frequency characteristic accuracy can be realized. Can be. That is, in order to realize a filter with excellent frequency characteristic accuracy, conventionally, a MOSFET has been used to improve the relative accuracy.
Channel length and channel width were required to be large, resulting in a large chip size.
By implementing the present invention, a chip size can be reduced as a whole and a filter with high accuracy can be obtained.

Further, since the operating frequency of the counter circuit and the like can be reduced, digital noise which is likely to cause a malfunction in the analog circuit can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a Gm-C filter to which the present invention is applied.

FIG. 2 is a diagram showing gain and phase characteristics of the Gm-C filter shown in FIG.

FIG. 3 is a diagram illustrating output characteristics of a phase comparator.

FIG. 4 is a diagram illustrating a specific circuit example of the Gm-C filter illustrated in FIG. 1;

FIG. 5 is a circuit diagram of each Gm amplifier shown in FIG.

FIG. 6 is a diagram illustrating a circuit example of a phase comparator.

FIG. 7 is a diagram showing another Gm-C filter to which the present invention is applied.

FIG. 8 is a diagram illustrating output characteristics of a phase comparator.

FIG. 9 is a circuit diagram showing another Gm-C filter to which the present invention is applied.

FIG. 10 is a diagram illustrating an example of a coarse correction circuit illustrated in FIG. 9;

FIG. 11 is a block diagram showing an example of a conventionally known Gm-C filter.

12 is a diagram more specifically showing the PLL circuit 56 shown in FIG. 11;

13 is a diagram illustrating a phase characteristic of the Gm-C filter 51 illustrated in FIG.

14 is a diagram illustrating a phase characteristic of the Gm-C filter 51 illustrated in FIG.

15 is a detailed circuit diagram of the Gm-C filter 50 shown in FIG.

FIG. 16 is a diagram illustrating an example of a Gm-C filter using a conventional adaptive filter.

[Explanation of symbols]

 Reference Signs List 10 Gm-C filter 11 Phase comparator 12 Up / down counter 13 Fine adjustment bias current generation circuit 14 Bias current generation circuit 15 Adder 32 Multiplier 33 LPF 34 Comparator

Claims (4)

[Claims] 1. A band-pass Gm-C filter having a Gm amplifier having a control terminal for controlling a Gm value and a capacitor; a reference signal input to the Gm-C filter;
A phase comparing means comprising a multiplier and an averaging means for averaging the output of the multiplier to compare a phase relationship between the signal outputted from the -C filter; and an output from the phase comparing means. A control signal generating means for supplying a control signal for controlling the Gm value to the control terminal based on the comparison signal. 2. The Gm-C according to claim 1, wherein after adjusting the characteristics of the Gm-C filter, a bias signal for correction is added to the control signal generating means.
Filter circuit. 3. The Gm-C filter circuit according to claim 1, wherein a coarse adjustment of the Gm-C filter is performed prior to a characteristic adjustment of the Gm-C filter. 4. The phase comparison means according to claim 1, further comprising: switching the reference signal input to the Gm-C filter to an input signal for processing, and comparing an output signal from the Gm-C filter with the phase comparison means. A Gm-C filter circuit comprising switching means for guiding a signal to a predetermined output terminal without input to the filter.