JPH1070368A - Multilayer printed-wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain the excellent adhesive strength of a conductor layer to an insulating layer and the reliability of the connection of a via hole by a method wherein the surface of the precedently formed conductor layer of an internal layer circuit is roughened and the surface of a part, which is electrically connected with the following conductor layer via the via hole, of the precedently formed conductor layer is formed into a glossy surface by a smoothing treatment. SOLUTION: First, if the surface of a conductor layer 1 is roughened 3, an anchoring effect is generated. As a result, as the adhesiveness of the layer 1 to a heat-resistant resin insulating layer 4, which is formed on the upper part of the layer 1, is improved, a crack, which is generated at the time of a laser processing or the like, can be prevented from being generated in the layer 1. However, on one hand, as seen a part, which is electrically connected with the following conductor layer 7 which is formed after the formation of the layer 1 through a via hole, of the layer 1 in the relation between the layer 1 and the layer 7, the connection performance of the part is electrically deteriorated. Thereby, by performing a smoothing treatment 6 on at least one part of this part, the connection surface, which has the shape changed by a roughening treatment, of the layer 1 with the layer 7 and the surface, which is generated a chemical change, of the layer 1 are removed. As a result, if the layer 7 is electrically connected with the smooth surface of the layer 1, a reduction in the reliability of the connection of the via hole can be prevented from being generated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board and a method for manufacturing the same, and more particularly to a multilayer printed wiring board in which a conductor layer of an inner circuit is connected via a via hole (Interstitial Via Hole), and has excellent connection reliability. It is a proposal for a method of manufacturing a multilayer printed wiring board.

[0002]

2. Description of the Related Art It is important that a conductor layer and an insulating layer of a multilayer printed wiring board are firmly adhered to each other. For this reason, conventionally, various techniques for firmly bonding the conductor layer and the insulating layer have been proposed. For example, (1) a method in which the surface of copper forming a conductor layer is oxidized and roughened with an aqueous solution of alkaline sodium chlorite or permanganic acid, thereby firmly bonding the conductor layer and the insulating layer. (2) The surface of the copper forming the conductor layer is oxidized to cupric oxide using an aqueous solution of alkaline sodium chlorite, an aqueous solution of alkaline potassium persulfate, or an aqueous solution of potassium sulfide-ammonium chloride, and then reduced. A method disclosed in Japanese Patent Publication No. Sho 64-8479, in which the surface of the conductor layer is roughened, thereby firmly bonding the conductor layer and the insulating layer. (3) On the surface of the conductor layer, by forming a composite plating layer containing fine particles of a thermosetting resin cured in advance,
There is a method disclosed in JP-A-59-106918 for firmly bonding a conductor layer and an insulating layer.

[0003]

SUMMARY OF THE INVENTION
The method (1) has a disadvantage that the via hole connection reliability is low when the upper and lower conductor layers are joined via via holes because the surface of the conductor layer is covered with copper oxide. Was. According to the method (2), although the copper oxide on the surface of the conductor layer is reduced and removed, since the surface of the conductor layer is still roughened, the upper conductor layer is plated or sputtered in the via hole. In the case of forming, there is a problem that a void is likely to remain at the bonding interface, and the conduction resistance is likely to increase. The method (3) is a method in which the conductor layer and the insulating layer are firmly bonded to each other through the composite plating layer on the conductor layer surface, but the composite plating layer formed on the surface of the conductor layer becomes conductive resistance. Therefore, when a multilayer printed wiring board is to be manufactured using via holes, there is a disadvantage that the connection reliability of the via holes is low.

For this reason, each of the prior arts is an effective method for a multilayer printed wiring board having no via hole or manufactured by a non-build-up method.
However, when a multilayer printed wiring board having via holes is manufactured by a build-up method, there are many disadvantages as described above, and it has been difficult to apply the method.

As can be seen from the above description, when a multilayer printed wiring board having via holes is manufactured by the build-up method, excellent adhesive strength between the conductor layer and the insulating layer and via hole connection reliability are simultaneously obtained. No method has been proposed so far. However,
The multilayer printed wiring board built up by the via hole can be formed at an arbitrary position with the interlayer connection by the via hole, so that the density can be increased, and its practical use has been strongly desired.

[0006]

The inventors of the present invention have conducted intensive studies, and as a result, have come to develop a multilayer printed wiring board having the following gist structure which can sufficiently satisfy the above-mentioned requirements. In other words, the present invention relates to a method of manufacturing a semiconductor device, comprising:
In a multilayer printed wiring board of a type in which an inner layer circuit composed of a plurality of conductor layers or more is mainly electrically connected via via holes, the surface of the conductor layer formed earlier of the inner layer circuit has a roughening treatment. A multilayer printed wiring board characterized in that at least a part of a portion electrically connected to a subsequent conductor layer via a via hole has a glossy surface by a smoothing process. The via hole is provided with an opening by laser processing in the heat-resistant resin layer,
It is desirable that the second conductive layer be formed and provided.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The multilayer printed wiring board of the present invention
The one having at least two conductive layers electrically insulated by a heat-resistant resin insulating layer and each conductive layer being electrically connected by a via hole is configured as follows. . That is, in order to improve the adhesion with the insulating layer, the surface of the preceding conductor layer formed first is roughened on the entire surface. In the via hole, at least a part of a portion electrically connected to a subsequent conductor layer to be formed later is subjected to a smoothing process for eliminating a roughened surface, and a glossy surface is formed. It is to be presented.

The reason why the surface of the preceding conductor layer is provided with a glossy surface on a part thereof based on the roughened surface is as follows. That is, first, if the surface of the conductor layer is roughened, an anchoring effect basically occurs, and as a result, the adhesion between the conductor layer and the heat-resistant resin insulating layer formed on the conductor layer is improved. You. In particular, since the side surface of the inner conductor layer is roughened, it is possible to prevent cracks that occur at the interface between the side surface of the conductor layer and the heat-resistant resin layer that occur during laser processing or heat cycling. However, on the other hand, the connection performance is electrically degraded due to the via hole in relation to the subsequent conductor layer formed later. Therefore, at least a part of this portion is subjected to a smoothing process to remove a connection surface whose shape has been changed by the roughening process or a surface where a chemical change has occurred. As a result, if the subsequent conductor layer formed later is electrically connected to the surface smoothed in this way, the connection reliability of the via hole, which is observed only in the case of the roughened surface alone, is reduced. Can be minimized.

The above-described roughening treatment of the surface of the conductor layer can be exemplified by an oxidation treatment and an electrolytic treatment. Among them, a method of performing a reduction treatment after oxidizing the surface of the conductor layer is preferable. Incidentally, the oxidation, reduction treatment, when performing electroless plating, a phenomenon in which copper oxide is dissolved in an aqueous solution of palladium-tin hydrochloride for the purpose of imparting catalytic properties, that is,
Halo phenomenon can be prevented, and in the present invention,
This is a preferred roughening method.

[0010] The area of the glossy surface subjected to the smoothing treatment is not limited to the area of the via hole, and may be larger or smaller than the area of the via hole. Also, the size of the via hole does not need to be restricted by the line width of the conductor pattern. On the other hand, it is desirable that most of the portion where the via hole is not formed be roughened.

In the present invention, the heat-resistant resin forming the insulating layer is selected from an epoxy resin, a polyimide resin, an epoxy acrylate resin, a urethane acrylate resin, a polyester resin, a bismaleimide / triazine resin, a phenol resin, and an epoxy-modified polyimide resin. It is desirable that it is at least one kind.

In the case of performing electroless plating, a resin containing a filler capable of forming a concave portion that can serve as an anchor for electroless plating, that is, a heat-resistant resin that is hardly soluble in an oxidizing agent, is used. Mixture of heat-resistant resin particles having a mean particle size of 2 μm or less ”or a mixture of heat-resistant resin particles having a mean particle size of 2 μm or less” or “heat-resistant resin particles having a mean particle size of 2 μm or less” At least one of fine powder or inorganic fine powder having an average particle size of 2 μm or less.
Pseudo-particles with seeds attached ”or“ average particle size 2μ
m or less heat-resistant resin fine powder is aggregated to give an average particle size of 2 to 10
agglomerated particles having a size of μm ”, and desirably containing heat-resistant particles soluble in an oxidizing agent. It is preferable to use a photosensitive resin as the heat-resistant hardly-soluble resin and an epoxy resin as the heat-resistant resin particles. By treating the resin containing the filler with an oxidizing agent such as chromate, chromate, permanganate, or ozone, a concave portion can be formed due to a difference in solubility in the oxidant.

Next, an example of a method for manufacturing a multilayer printed wiring board according to the present invention will be described. In the present invention, the surface of the preceding conductor layer forming the inner layer circuit is first roughened, and then at least a part of the preceding conductor layer electrically connected to the subsequent conductor layer formed later through the via hole. Needs to be smoothed.

The roughening treatment includes an oxidation treatment and an electrolytic treatment, and a method of performing a reduction treatment after performing the oxidation treatment is preferable. In the method of performing the reduction treatment after the oxidation treatment, the oxidation treatment is performed using at least one solution selected from an aqueous solution of alkaline sodium chlorite, an aqueous solution of alkaline potassium persulfate, and an aqueous solution of potassium sulfide-ammonium chloride. Is preferred.

The reduction treatment is selected from formalin, hypophosphorous acid, sodium hypophosphite, hydrazine hydrate, hydrazine hydrochloride, hydrazine sulfate, sodium borohydride, N, N'-trimethylborazane and the like. It is desirable to use at least one kind of solution.

In the method of performing the reduction treatment after the oxidation, the oxidation treatment or the reduction treatment can be performed by applying, dipping, or spraying the oxidizing agent or the reducing agent on the portion to be treated.

The smoothing process in the present invention is desirably soft etching or sandblasting. The soft etching is performed by using “cupric chloride / hydrochloric acid /
Mixed solution of cuprous chloride ”,“ ferrous chloride / ferric chloride /
Use at least one solution selected from a mixed solution of cupric chloride / cuprous chloride, an aqueous solution of persulfates, a mixed solution of hydrogen peroxide / sulfuric acid, and an alkaline solution of a copper ammonium complex salt. The soft etching solution is applied to a portion to be smoothed, the wiring board is immersed in the soft etching solution, or the soft etching solution is sprayed to smooth the surface.

Sandblasting is carried out by spraying an inorganic fine powder containing at least one selected from silicon carbide, alumina, silicon dioxide and the like as a main component together with a dispersion medium such as water. It is desirable that the diameter of the inorganic fine powder be 20 μm or less.

The smoothing may be performed before the formation of the insulating layer, or may be performed after the formation of the insulating layer and the opening of the via hole. In the case where the smoothing is performed before forming the insulating layer, a mask may be applied to a non-smoothed portion, and then the smoothing process may be performed, or the soft etching solution may be applied to a portion to be smoothed. . In addition,
When the opening is formed by laser processing as in the fourth embodiment, the opening can be melted and smoothed by laser light.

The method for forming the heat-resistant resin insulating layer includes applying an uncured solution of the heat-resistant resin or bringing a semi-cured film of the heat-resistant resin into close contact, and then performing a curing treatment. It is preferable that the surface of the heat-resistant resin insulating layer is further roughened or coated with a coupling agent in order to improve adhesion with a conductor layer to be formed later. Is also good. As the coating method, a method such as a roller coating method, a dip coating method, a spray coating method, a spinner coating method, a curtain coating method, and a screen printing method can be applied.

The opening for providing the via hole is
It may be formed by exposing and developing a photosensitive resin, a resin film having an opening formed at a position where a via hole is to be provided in advance, or may be formed by laser processing. In particular, in the case of laser processing, cracks are likely to occur in the heat-resistant resin layer starting from the interface between the side surface of the conductor layer and the heat-resistant resin layer when the inner conductor layer is subjected to thermal shock, but in the present invention, Since the roughened layer is also formed on the side surface of the conductor layer, the adhesion between the heat-resistant resin layer and the side portion of the inner conductor layer is improved, and the occurrence of such cracks can be prevented.

The subsequent conductor layer which is electrically connected to the conductor layer previously formed through the via hole can be formed by electrolytic plating, electroless plating, vapor deposition, or sputtering.
Electroless plating is particularly preferred. This electroless plating
At least one of electroless copper plating, electroless gold plating, electroless silver plating, electroless tin plating, and electroless nickel plating can be used. In order to improve the adhesion between the conductor layer and the heat-resistant resin insulation layer, a coupling agent may be applied to the surface of the conductor layer.

As the substrate used in the present invention, a plastic substrate, a glass epoxy substrate, a glass polyimide substrate, an alumina substrate, an aluminum nitride substrate, an aluminum substrate, an iron substrate, a polyimide film substrate and the like can be used.

In the present invention, a conductor circuit can be formed by a known method performed on a printed wiring board. For example, a method of performing electroless plating on a substrate and then etching the circuit, or a method of performing electroless plating. At the time of application, a method of directly forming a circuit or the like may be applied.

[0025]

【Example】

(Example 1) (1) A photosensitive dry film (manufactured by DuPont, trade name: Liston 1051) is laminated on a glass epoxy copper-clad laminate (manufactured by Toshiba Chemical, trade name: Toshiba Tecolite MEL-4), and a desired conductor is formed. An image was printed by exposing to ultraviolet light through a mask film on which a circuit pattern was drawn. Then, development was performed with 1-1-1-trichloroethane, and copper in the non-conductor portion was removed using a cupric chloride etching solution, and then the dry film was peeled off with methylene chloride. As a result, a wiring board having the first-layer conductor circuit 1 composed of a plurality of conductor patterns was formed on the substrate 2 (FIG. 1A).

(2) A Henschel mixer (Mitsui Miike Chemical Co., Ltd.) was used to add 200 g of epoxy resin particles (Toray's Trepal EP-B, average particle size: 3.9 μm) to a suspension of epoxy resin particles dispersed in 5 l of acetone. Epoxy resin powder (manufactured by Toray Industries, Inc., trade name: TA-1800, manufactured by Mitsui Petrochemicals Co., Ltd., TA-1800) in an acetone solution obtained by dissolving 30 g per liter while stirring in a machine (FM10B type). A suspension in which 300 g of EP-B (average particle size: 0.5 μm) was dispersed was dropped to attach the epoxy resin powder to the surface of the epoxy resin particles, and then the acetone was removed. Upon heating, pseudo particles were created.
The pseudo particles had an average particle size of about 4.3 μm, and about 75% by weight was in a range of ± 2 μm around the average particle size.

(3) 60 parts by weight of a 50% acrylate of a cresol novolak type epoxy resin (manufactured by Yuka Shell, trade name: Epikote 180S), a bisphenol A type epoxy resin (manufactured by Yuka Shell, trade name: Epikote 180S) ) 50%
60 parts by weight of an acrylate, 40 parts by weight of a bisphenol A type epoxy resin (trade name: Epicoat 1001 manufactured by Yuka Shell), 15 parts by weight of diallyl terephthalate, 2-methyl-1- [4- (methylthio) phenyl] 4 parts by weight of 2-morpholinopropanone-1 (manufactured by Ciba Geigy, trade name: Irgacure 907), 4 parts by weight of imidazole (manufactured by Shikoku Chemicals, trade name: 2P4MHZ), pseudo particles prepared in the above (2) After mixing 50 parts by weight, while adding butyl cellosolve, the viscosity was adjusted to 250 c with a homodisper stirrer.
The mixture was adjusted to p, and then kneaded with three rollers to prepare a solution of the photosensitive resin composition.

(4) An alkaline sodium chlorite solution was prepared by dissolving 60 g of sodium chlorite, 18 g of sodium hydroxide, 5 g of sodium phosphate and 5 g of sodium carbonate in water to make 1 liter. (5) An aqueous solution of an alkaline reducing agent was prepared by dissolving 30 ml of a 30% by weight aqueous solution of formalin and 38 g of KOH in 1 liter of water. (6) The wiring board prepared in (1) and having the conductor pattern 1 having a line width of 100 μm was immersed in the alkaline sodium chlorite solution obtained in the step (4) for 2-3 minutes. Then, it was immersed in the aqueous solution of the alkaline reducing agent prepared in the above step (5) at 70 ° C. for 15 minutes to form a roughened surface 3 on the surface of the conductor pattern (FIG. 1 (b)).

(7) The solution of the photosensitive resin composition prepared in the above step (3) is applied using a knife coater, left in a horizontal state for 20 minutes, and dried at 70 ° C. 50 μm
Was formed. (8) The wiring board having been subjected to the treatment of the step (7) is
Closely contact the photomask film with the black circle printed on it,
Exposure was performed at 500 mJ / cm ² using an ultra-high pressure mercury lamp. This was subjected to ultrasonic development with a chlorocene solution to form an opening 10 serving as a 100 μmφ via hole on the wiring board. Approximately 3,000 mJ / cm ^{2 of the} wiring board using an ultra-high pressure mercury lamp
And heat-treated at 100 ° C. for 1 hour and then at 150 ° C. for 10 hours to form a heat-resistant resin insulating layer 4 having openings with excellent dimensional accuracy equivalent to a photomask film.
Was formed.

(9) Next, the wiring board is immersed in an oxidizing agent composed of a 500 g / l aqueous solution of chromic acid at 70 ° C. for 15 minutes to form a roughened surface 5 on the surface of the heat-resistant resin insulating layer 4. It was immersed in a Japanese solution (PN-950, manufactured by Shipley) and washed with water (FIG. 1 (c)). (10) The printed circuit board subjected to the process (9) is immersed in an aqueous solution containing 6% sulfuric acid and 10% hydrogen peroxide for 3 minutes to perform soft etching, and a smooth surface is formed on the conductor pattern. Was formed (FIG. 1 (d)). (11) The surface of the resin insulating layer 4 was activated by applying a palladium catalyst (Cataposit 44, manufactured by Shipley Co., Ltd.) to the substrate 2 having the heat-resistant resin insulating layer 4 roughened. Immerse in an electroless copper plating solution for 11 hours
A μm electroless copper plating film 7 was applied (FIG. 1 (e)).

[0031]

[Table 1]

(12) After repeating the above steps (1) to (11) twice, and further performing the above step (1), a four-layer build-up multilayer wiring board (FIG. 1 (f))
It was created.

Example 2 (1) Epoxy Resin Particles (Toray Pearl EP-B, manufactured by Toray)
(Average particle size: 0.5 μm) was placed in a hot-air drier and subjected to heat treatment at 180 ° C. for 3 hours for cohesive bonding. The cohesively bonded epoxy resin particles were dispersed in acetone, crushed in a ball mill for 5 hours, and then classified using an air classifier to prepare coagulated particles. The agglomerated particles have an average particle size of about
3.5 μm, and about 68% by weight ±
It was in the range of 2 μm.

(2) 50 parts by weight of a 75% acrylate of a cresol novolak type epoxy resin (manufactured by Nippon Kayaku, trade name: EOCN-103S), bisphenol A type epoxy resin (Dow
50 parts by weight of chemical, trade name: DER661), 25 parts by weight of dipentaerythritol hexaacrylate, 5 parts by weight of benzylalkyl ketal (product name: Irgacure 651), imidazole (trade name: 2P4MHZ) After mixing 6 parts by weight and 50 parts by weight of the aggregated particles prepared in the step (1), while adding butyl cellosolve, the mixture was mixed with a homodisper stirrer to give a viscosity of 250 c.
p and then kneaded with three rollers to prepare a solution of the photosensitive resin composition.

(3) The substrate 2 having the conductor pattern 1 having a line width of 100 μm obtained in the step (1) of the first embodiment.
(FIG. 2 (a)) is subjected to the processes (4) to (6) of the first embodiment to form a roughened surface 3 on the conductor pattern 1 (FIG. 2 (b)). The solution of the photosensitive resin composition prepared in the step (2) was applied using a knife coater, left standing in a horizontal state for 20 minutes, and dried at 70 ° C. to a thickness of about 50 μm.
(FIG. 2 (c)).

(4) On the wiring board obtained in the step (3), the same operation as in the step (8) of the first embodiment is performed to form the heat-resistant resin insulating layer 4 having the via hole 10 with a diameter of 50 μm. Then, after performing the treatment of the step (9) in Example 1 to form a roughened surface 5 on the surface of the heat-resistant resin insulating layer 4, inorganic particles having a diameter of 10 to 20 μm (Snowtex ST- manufactured by Nissan Chemical Industries, Ltd.) 30, particle size 10
(About 20 μm) was dispersed in water and sprayed from a nozzle 14 onto a wiring board, whereby the surface exposed by the opening 10 was polished to form a smooth surface 6 (FIG. 2 (d)).

(5) The electroless copper plating film 7 was formed by performing the step (11) of the first embodiment (FIG. 2E). (6) The above steps (1) to (5) are further repeated twice, and then the step (1) of the first embodiment is carried out, whereby a build-up multilayer wiring board having four wiring layers (FIG. 2 (f) )made.

Example 3 (1) 100 parts by weight of 50% acrylate of phenol aralkyl type epoxy resin, 15 parts by weight of diallyl terephthalate,
2-methyl-1- [4- (methylthio) phenyl] -2
4 parts by weight of morpholinoppanone-1 (manufactured by Ciba Geigy, trade name: 2P4MHZ), epoxy resin powder having a large particle size (manufactured by Toray, Trepearl EP-B, average particle size: 3.9 μm)
m) 10 parts by weight, and an epoxy resin powder having a small particle size (Toray, Trepal EP-B, average particle size 0.5 μm) 25
Butyl carbitol was added to the mixture consisting of parts by weight, and the viscosity was adjusted to 250 cp with a homodisper disperser.
The mixture was kneaded with this roller to prepare a solution of the photosensitive resin composition.

(2) Obtained in the step (1) of Example 1
A wiring board having a conductor pattern 1 having a line width of 100 μm (FIG. 3
(a)), the roughened surface 3 is formed by performing the processes of (4) to (6) of the above-mentioned Example 1, and a photosensitive dry film (manufactured by DuPont, trade name) is formed on the obtained wiring board. : Liston 1051) was laminated, and a mask film on which a black circle was printed was adhered to a position where a via hole was to be formed, and was exposed to ultraviolet light. Subsequently, development was performed using chlorocene to form a resist 10 for soft etching (FIG. 3B), and then the operation of (10) of Example 1 was performed to form a smooth surface 6 by etching (FIG. 3). (c)). Table 2 shows the conditions of this example with respect to the line width, the diameter of the via hole, and the diameter of the black circle of the mask film.

[0040]

[Table 2]

The solution of the photosensitive resin composition prepared in the above (1) was applied using a knife coater, left in a horizontal state for 20 minutes, dried at 70 ° C., and dried to a thickness of about 50 μm. An insulating layer was formed. (3) The wiring board obtained in the step (2) is added to the step of the first embodiment.
(8) By performing the step (9), a roughened surface 5 is formed on the surface of the heat-resistant resin insulating layer 4.
By performing the process (11) (FIG. 3 (d)), the electroless copper plating film 7 was formed (FIG. 3 (e)). (4) The above steps (1) to (3) are repeated two more times, and then the step (1) of Example 1 is performed, whereby a build-up multilayer wiring board having four wiring layers (FIG. ) )made. Schematic diagrams of via holes obtained under the conditions of Nos. 2 to 7 described in Table 2 are shown in FIGS.

Example 4 (1) Phenol novolak type epoxy resin (manufactured by Yuka Shell, trade name: 60 parts by weight, bisphenol A type epoxy resin (manufactured by Yuka Shell: E-1001) 40 parts by weight, imidazole cured 4 parts by weight of an agent (manufactured by Shikoku Chemicals, trade name: 2P4MHZ), epoxy resin powder having a large particle size (trade name, manufactured by Toray)
Tolepearl EP-B, average particle size 0.5 μm) 25 parts by weight of butyl carbitol was added, the viscosity was adjusted to 250 cp with a homodisper disperser, and then kneaded with three rollers to form an adhesive solution. did.

(2) Next, the surface copper foil of the ceramic double-sided copper-clad laminate was photoetched by a conventional method to obtain a wiring board having a conductor pattern 1 with a line width of 50 μm (FIG. 5 (a)). (3) Then, the wiring board was immersed in the solution obtained in step (4) of Example 1 for 2 to 3 minutes to form a roughened surface 3 on the surface of the conductor pattern 1 (FIG. 5 ( b)).

(4) After applying the adhesive solution obtained in the above step (1) to the front surface by a roll coater, the adhesive solution was applied at 100 ° C. for 1 hour.
After drying and curing at 150 ° C. for 5 hours, a heat-resistant resin insulating layer 4 was formed. (5) The CO ₂ laser 11 was irradiated to the portion where the via hole was to be formed, and an opening 10 having a diameter of 100 μm was formed in the heat-resistant resin insulating layer 4. (6) Then, the substrate was immersed in chromic acid for 10 minutes to form a roughened surface 5 on the surface of the heat-resistant resin insulating layer 4 and washed after neutralization. (7) Then, by performing the operation described in step (10) of Example 1, soft etching was performed to
Thus, a smooth surface 6 was formed on the exposed conductor pattern (FIG. 5 (d)).

(8) Through-holes 16 were formed by a conventional method. (9) A palladium catalyst (Cataposit 44, manufactured by Shipley) was applied to the substrate 2 to activate the surface of the heat-resistant resin insulating layer 4. (10) Next, a photosensitive dry film (manufactured by San Nopco, trade name: DFR-40C) was laminated on the wiring board, and the conductor pattern was exposed to light and developed to form a plating resist 15. (11) A build-up multilayer printed wiring board having a 25 μm-thick electroless copper plating film 7 formed at a position other than the plating resist by immersing in an electroless copper plating solution shown in Table 1 for 11 hours (FIG. 5 ( e)) was manufactured.

(Example 5) (1) After performing the step (1) of Example 1, electrolytic copper plating is performed while changing the current density, and the surface of the conductor pattern is roughened by performing uneven copper plating. Surface 3 is formed, and then a portion having a diameter of 150 μm
Polyimide adhesive film 12 in which openings 10 were formed
And a polyimide film 13 were laminated in order from the side closer to the wiring board, and bonded by heating and pressing at 275 ° C. and 45 kg / cm ² for 30 minutes. (2) A smooth surface 6 was formed on the conductor pattern 1 exposed by the opening by performing the process of the step (10) of the first embodiment. (3) A copper film 7 was formed by sputtering. (4) After repeating the steps (1) to (3) two more times, the step (1) of Example 1 was performed once to produce a four-layer build-up multilayer printed wiring board. FIG. 6 is a schematic view of a via hole portion of the build-up multilayer printed wiring board.
Shown in

The adhesion strength between the heat-resistant resin insulating layer and the plating film of the multilayer printed wiring board manufactured as described above was measured according to JIS.
-C-6481, and the results are shown in Table 3.

[0048]

[Table 3]

[0049]

As described above, according to the multilayer printed wiring board and the method of manufacturing the same of the present invention, the adhesiveness of the side portion between the conductor layer and the heat resistant resin layer is improved, and the thermal shock during laser processing is improved. In a heat cycle, cracks generated in the heat-resistant resin layer can be prevented, and a build-up multilayer printed wiring board excellent in connection reliability of via holes can be provided.

[Brief description of the drawings]

FIGS. 1 (a) to 1 (f) are diagrams showing manufacturing steps of a build-up multilayer wiring board of Example 1, respectively.

FIGS. 2 (a) to 2 (f) are diagrams illustrating a manufacturing process of a build-up multilayer wiring board of Example 2, respectively.

FIGS. 3 (a) to 3 (f) are diagrams illustrating a manufacturing process of a build-up multilayer wiring board of Example 3, respectively.

FIGS. 4A to 4F are schematic views of via holes of the build-up multilayer wiring boards of Nos. 2 to 7 of the third embodiment.

FIGS. 5 (a) to 5 (e) are diagrams respectively showing the steps of manufacturing a build-up multilayer wiring board of Example 4. FIGS.

FIG. 6 is a schematic view of a via hole portion of a build-up multilayer wiring board according to a fifth embodiment.

FIG. 7 is a schematic diagram of a typical via hole.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Conductive pattern (1st layer) 2 Substrate 3 Roughened surface of conductive pattern 4 Interlayer insulating layer 5 Roughened surface of interlayer insulating layer 6 Smooth surface of conductive pattern 7 Copper plating film (2nd layer) 8 Conductor pattern (3rd layer) 9) Conductor pattern (4th layer) 10 Resist for soft etching 11 Carbon dioxide laser 12 Polyimide adhesive film 13 Polyimide film 14 Sandblast nozzle 15 Resist for electroless plating

Claims (2)

[Claims] 1. A multilayer printed wiring board of a type in which an inner layer circuit composed of two or more conductor layers insulated by a heat-resistant resin layer is electrically connected mainly through via holes, The surface of the conductor layer formed by the roughening process is subjected to a roughening process, and at least a part of a portion electrically connected to a subsequent conductor layer via a via hole has a glossy surface by the smoothing process. A multilayer printed wiring board, characterized in that: 2. The multilayer printed wiring board according to claim 1, wherein the via hole is provided by forming an opening in a heat resistant resin layer by laser processing and forming a subsequent conductor layer.