JPH11121574A - Test wiring pattern for semiconductor device, and its test method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a test wiring pattern which is capable of test to plural wiring patterns different in form, without connecting two pieces of terminals on power side and ground side at the same time, and moreover can make the time required for test shorter than in conventional cases, in a test for current application life time test. SOLUTION: This test wiring pattern for semiconductor device is equipped with first and second end electrodes 21A and 21E which are made in mutually separated positions on a substrate, and three middle electrodes 21B, 21C and 21D are made among these. One piece each of connecting wiring pattern is made between each electrode pad and the next. The first connecting wiring pattern 1A is thickest in line width (W1), and when that the line widths of the second, third, and fourth connecting wiring patterns 1B, 1C, and 1C are defined as W2, W3, and W4 respectively, they are set such that W1>W2>W3>W4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a test wiring pattern suitable for simulating the occurrence of electromigration in wiring in a semiconductor device, and a test method using the pattern.

[0002]

2. Description of the Related Art Electromigration is a phenomenon in which aluminum atoms in wiring are locally moved and the wiring is disconnected. In order to prevent the occurrence of electromigration in a wiring pattern in a semiconductor device, resistance to various types of wiring patterns is tested in advance using a test wiring pattern, and the wiring size and current in the semiconductor device are determined based on the test results. A method for determining the density is effective.

A wiring pattern for a resistance test such as an electromigration check is described in, for example, “Proc. Symp.
liab.Semicond. Devices Interconnection Multilaeve
lMetallization Interconnection Contact Technol. 19
88, pages 436-445 `` EFFECTS OF LINELENGTH AND BEN
D STRUCTURE ON ELECTROMIGRATION LIFETIMEIN Al-Cu S
UBMICRON INTERCONNECTS ". In this document, as shown in FIG. 7A, a linear pattern in which the current supply electrode pads 2A and 2B are connected in a straight line by a wiring pattern 1 having a constant line width, and FIG. As shown in the figure, a bent pattern in which the current supply electrode pads 2A 'and 2B' are connected in a broken line by a wiring pattern 1 'having a constant line width is disclosed.

During the test, one of the electrode pads 2A, 2A
A 'is connected to a power supply, the other electrode pads 2B, 2B' are grounded, and a current flows through the wiring patterns 1, 1 'between the electrodes.
A pair of voltage measuring pads is connected to the inside of both electrode pads of the wiring patterns 1 and 1 ', and the voltage is measured by this to monitor a change in the resistance value of the wiring pattern. The resistance value of the wiring pattern increases due to electromigration that occurs with the passage of current. The current-carrying life of the wiring pattern is measured as the time until the increase in the resistance value of the wiring pattern reaches a certain ratio.

[0005]

However, in the above-described test using the conventional wiring pattern, in order to examine the change in the current-carrying life depending on the form (for example, line width) of the wiring pattern, a pattern having a different form is required in advance. Independently, a plurality of terminals must be prepared, and each time the pattern is changed, the terminals on the power supply side and the ground side must be reconnected to other electrode pads, which causes a problem that the test is complicated. Further, there is a problem that the time required for the test is at least equal to the total time of the wiring life of each wiring pattern, and the time required for the test is relatively long.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and allows a plurality of wiring patterns having different configurations to be tested without reconnecting the two terminals on the power supply side and the ground side at the same time. An object of the present invention is to provide a test wiring pattern for a semiconductor device that is possible and that can reduce the required test time in the test of the current-carrying life as compared with the conventional case.

[0007]

A test wiring pattern for a semiconductor device according to the present invention comprises first and second end electrode pads formed at positions separated from each other on a substrate, and first and second end electrode pads. At least one intermediate electrode pad formed between the external electrode pads, between the first end electrode pad and the intermediate electrode pad, between the intermediate pads when there are a plurality of intermediate electrode pads, and One each is formed between the second end electrode pad and the intermediate electrode pad to form the first,
A plurality of connection wiring patterns forming an electric circuit between the second end electrode pads, wherein each connection wiring pattern is formed in a different form so as to have a difference in the current-carrying life. .

According to the above configuration, when a current is first applied between the first end electrode pad and the second end electrode pad,
The portion of the connection wiring pattern having the shortest current-carrying life reaches the life first and the current flow is hindered. This time is the energization life of the pattern whose life has been reached. Next, the terminal connected to the second end electrode pad is removed, and the terminal removed to one of the intermediate electrode pads is connected so that a circuit is formed without including the connection wiring pattern which has reached the end of its life. A current is passed for a predetermined time. Then, the connection wiring pattern in the portion having the second shortest energization life reaches the end of its life, and the flow of current is hindered.
The time obtained by adding the time from the switching of the terminal to the end of the life and the energization life of the wiring pattern whose life has reached the previous stage is the energization life of the wiring pattern that has reached the life this time. When there are a plurality of intermediate electrode pads, the terminals can be reconnected, and the above measurement can be repeated to measure the conduction life of each connection wiring pattern.

Note that "between the first and second end electrode pads".
In the case where the electrode pads are arranged linearly as in the above-described embodiment, they coincide with the geometrical intermediate point, but are not limited to this, and are formed when each electrode pad is connected with a wiring pattern. It may be any electrical intermediate point in the circuit performed.

Each connection wiring pattern can be provided by connecting two electrode pads in a straight line or a broken line. The difference in the form of each connection wiring pattern
The width of the wiring, the length of the wiring, the number of steps over which the connection wiring pattern can cross, and the like can be considered.

When at least two intermediate electrode pads are provided, that is, when three or more connection wiring patterns are formed, the conduction life of each connection wiring pattern is shortened in order from the first end electrode pad side. It is desirable to configure. Specifically, when the widths of the wirings are made different, the width of the connection wiring pattern connecting the first end electrode pad and the intermediate electrode pad is the largest, and the width of the connection wiring pattern is increased toward the second end electrode pad. It is desirable that the thickness be sequentially reduced every time the electrode pad is exceeded. Similarly, when the lengths of the wirings are different, the connection wiring pattern connecting the first end electrode pad and the intermediate electrode pad is made the shortest, and the intermediate electrode pad is turned toward the second end electrode pad. When the number of steps is made different, the number of steps over which the connection wiring pattern connecting the first end electrode pad and the intermediate electrode pad goes over is minimized, and the second step is made second. It is desirable that the number be increased sequentially each time the intermediate electrode pad is passed toward the end electrode pad.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a test wiring pattern for a semiconductor device according to the present invention will be described below. Here, the contents of the invention will be described based on six embodiments. In order to make the conduction life of each connection wiring pattern different, the line width of the connection wiring pattern in the first and second embodiments, the length of the connection wiring pattern in the third and fourth embodiments, and the step over which the connection wiring pattern goes over in the fifth and sixth embodiments. Have different numbers. In addition,
In the first, third, and fifth embodiments, the connection wiring pattern is formed in a straight line, whereas in the second, fourth, and sixth embodiments, the connection wiring pattern is formed to meander in a broken line.

[0013]

FIG. 1 is an explanatory view showing a test wiring pattern for a semiconductor device according to a first embodiment. In the first embodiment, each connection wiring pattern is formed by connecting each electrode pad linearly, and each connection wiring pattern is set to have a different line width from each other so that there is a difference in the conduction life. The test wiring pattern of the first embodiment includes a first end electrode pad 21A and a second end electrode pad 21E formed at positions separated from each other on the substrate, and three intermediate electrodes formed therebetween. Pads 21B, 21C and 21D are provided. One connection wiring pattern is formed between each electrode pad, and an electric circuit is formed between the first and second end electrode pads 21A and 21E. A lead portion 211 is formed on each electrode pad toward the upper side in the figure, and each electrode pad is electrically connected to each other by a connection wiring pattern via each lead portion 211.

A first connection wiring pattern 1A is provided between the first end electrode pad 21A and the intermediate electrode pad 21B, and a second connection wiring pattern 1B and the intermediate electrode pad 21C are provided between the intermediate electrode pads 21B and 21C. 21D, a third connection wiring pattern 1C and a second end electrode pad 2
Fourth connection wiring patterns 1D are respectively formed between 1E and the intermediate electrode pad 21D.

Each of the connection wiring patterns is configured such that the current-carrying life becomes shorter in order from the first end electrode pad 21A side. Since electromigration occurs faster when the current density is higher, the energization life is longer when the line width is larger. Therefore, in the first embodiment, the line width of the first connection wiring pattern 1A connected to the first end electrode pad 21A is set.
(W1) is set to be the thickest, and the line width is sequentially reduced in the order of the second, third, and fourth connection wiring patterns each time the intermediate electrode pad is passed toward the second end electrode pad 21E. I have. That is, when the line widths of the second, third, and fourth connection wiring patterns 1B, 1C, and 1D are W2, W3, and W4, respectively, W1>W2>W3> W4.

The length of each connection wiring pattern is common to L. Also, the line width W0 of the drawer 211
Is set to be larger than the maximum line width W1 of the connection wiring pattern (W0> W1). This is drawer 2
By setting the current density of 11 to be smaller than that of any of the connection wiring patterns, it is possible to prevent electromigration from occurring in the lead portion 211 at an earlier stage in the connection wiring pattern.

Next, a method for measuring the current-carrying life of the connection wiring pattern using the test wiring pattern of the first embodiment will be described. The energization life is the time from the start of energization until the resistance value of the target connection wiring pattern increases beyond a certain ratio due to the occurrence of electromigration, that is, until the rate of increase in the resistance value exceeds a certain value. Time. First, a power terminal (one terminal of a current source) is connected to the first end electrode pad 21A, and a ground terminal (the other terminal of the current source) is connected to the second end electrode pad 21E to apply a predetermined voltage. Apply. Thereby, the first, second, third, fourth
A constant current flows between the first and second end electrode pads 21A and 21E through the connection wiring patterns 1A, 1B, 1C and 1D. At this time, at least the electrode pad 21
The change in the resistance value of the fourth connection wiring pattern 1D is checked by monitoring the voltage between D and 21E. Since the fourth connection wiring pattern 1D has the narrowest line width, it has the highest current density and the shortest energization life. Assuming that the time from when the voltage starts to be applied to when the fourth connection wiring pattern 1D reaches the end of its life and the flow of current is hindered is t1, this time t1 is the conduction life of the fourth connection wiring pattern 1D.

Next, the ground terminal connected to the second end electrode pad 21E is removed, and the intermediate electrode pad 21D is formed so that a circuit is formed without including the fourth connection wiring pattern 1D which has reached the end of its life. Connect the ground terminal to the electrode pad 2
A predetermined voltage is applied between 1A and 21D. This allows
First, second, and third connection wiring patterns 1A, 1B, 1C
, A constant current flows between the first end electrode pad 21A and the intermediate electrode pad 21D. At this time, at least the voltage between the electrode pads 21C and 21D is monitored to check the change in the resistance value of the third connection wiring pattern 1C. The third connection wiring pattern 1C has the narrowest line width among the connection wiring patterns 1A, 1B, and 1C through which a current flows, and therefore has the highest current density and the shortest conduction life. Assuming that the time from when the ground terminal is connected to the intermediate electrode pad 21D to start applying the voltage to when the third connection wiring pattern 1C reaches the end of its life and the current flow is hindered is t2, this time t2 and the fourth Energization life t1 of connection wiring pattern 1D
The sum t1 + t2 of the third connection wiring pattern 1C is the conduction life of the third connection wiring pattern 1C.

In the next stage, the ground terminal connected to the intermediate electrode pad 21D is removed and connected to the intermediate electrode pad 21C in the same manner as described above.
A predetermined voltage is applied between 1C. As a result, a constant current flows between the first end electrode pad 21A and the intermediate electrode pad 21C through the first and second connection wiring patterns 1A and 1B. At this time, at least the electrode pad 21
The change in the resistance value of the second connection wiring pattern 1B is checked by monitoring the voltage between B and 21C. Since the second connection wiring pattern 1B has a smaller line width than the first connection wiring pattern 1A, the current density is high and the conduction life is shorter.
Assuming that the time from when the ground terminal is connected to the intermediate electrode pad 21C and voltage is applied to when the second connection wiring pattern 1B reaches the end of its life and the current flow is hindered is t3.
This time t3 and the conduction life of the third connection wiring pattern 1C
The sum of (t1 + t2) and (t1 + t2 + t3) is the conduction life of the second connection wiring pattern 1B.

Finally, the ground terminal connected to the intermediate electrode pad 21C is removed and connected to the intermediate electrode pad 21B, and a predetermined voltage is applied between the electrode pads 21A and 21B. Thereby, the first end electrode pad 21A and the intermediate electrode pad 21B are passed through the first connection wiring pattern 1A.
A constant current flows between. At this time, the electrode pad 2
The change in the resistance value of the first connection wiring pattern 1A is checked by monitoring the voltage between 1A and 21B. Assuming that the time from when the ground terminal is connected to the intermediate electrode pad 21B and voltage is applied to when the first connection wiring pattern 1A reaches the end of its life and the current flow is hindered is t4, this time t4
And the conduction life of the second connection wiring pattern 1B (t1 + t2 +
The sum of t1 + t2 + t3 + t4 with t3) is the current-carrying life of the first connection wiring pattern 1A.

As described above, according to the configuration of the first embodiment, a plurality of mutually connected power terminals are connected to only the ground terminal while the power terminal remains connected to the first end electrode pad 21A. The current-carrying life of connection wiring patterns having different line widths can be measured. In addition, for the connection wiring pattern having a longer conduction life, the conduction life can be calculated by integrating the conduction time to the pattern with the shorter life, so that each connection wiring pattern is measured independently. The time required for the measurement can be reduced.
In the above description, the method of connecting the power supply terminal to the first end electrode pad and sequentially connecting the ground terminal to each electrode pad by connecting them is described. On the contrary, the ground terminal is fixed and the power supply terminal is connected. May be switched for connection.

[0022]

Second Embodiment FIG. 2 is an explanatory view showing a test wiring pattern for a semiconductor device according to a second embodiment. In the second embodiment, each connection wiring pattern is formed by connecting each electrode pad in a meandering manner in the form of a broken line. As in the first embodiment, each connection wiring pattern has a line width so that there is a difference in energization life. Are set to be different from each other.

The test wiring pattern according to the second embodiment includes first and second end electrode pads 22A and 22D, and two intermediate electrode pads 22B and 22C formed therebetween. One connection wiring pattern is formed between each electrode pad. Each electrode pad has
Each lead portion 221 is formed, and each electrode pad is electrically connected to each other by a connection wiring pattern via each lead portion 221.

A first connection wiring pattern 2A is provided between the first end electrode pad 22A and the intermediate electrode pad 22B, and a second connection wiring pattern 2B is provided between the intermediate electrode pads 22B and 22C. Third connection wiring patterns 2C are formed between the electrode pads 22D and the intermediate electrode pads 22C, respectively.

In the second embodiment, the first connection wiring pattern 2
A has the largest line width (W1), and the second end electrode pad 22
The line width is gradually reduced in the order of the second and third connection wiring patterns each time the intermediate electrode pad is passed toward D. That is,
When the line widths of the second and third connection wiring patterns 2B and 2C are W2 and W3, respectively, W1>W2> W3.

The form other than the line width of each connection wiring pattern is common to all the patterns. That is,
The number of times of bending is all 10 times, and the lengths when linearly developed are all the same. In addition, the line width W of the lead portion 221
0 is set to be larger than the maximum line width W1 of the connection wiring pattern (W0> W1).

The measuring method of the current-carrying life using the test wiring pattern of the second embodiment is the same as the measuring method of the first embodiment. That is, first, the power supply terminal is connected to the first end electrode pad 22A, and the ground terminal is connected to the second end electrode pad 2A.
Connect to 2D and energize. Third connection wiring pattern 2C
When the power supply life has elapsed, the ground terminal is connected to the intermediate electrode pad 22.
Switch to C and connect to energize. Then, when the second connection wiring pattern 2B reaches the current-carrying life, the ground terminal is switched to the intermediate electrode pad 22B for connection and current is supplied.

The energization life of the third connection wiring pattern 2C is a time t1 from the start of energization to the end of the life of this pattern. The energization life of the second connection wiring pattern 2B is a time t1 + t2 obtained by adding the time t1 to the time t2 from the start of energization by switching the ground terminal to the intermediate electrode pad 22C to the end of the life of the pattern. And
The energization life of the first connection wiring pattern 2A is calculated as time t1 + from time t3 when the current is started by switching the ground terminal to the intermediate electrode pad 22C to when the pattern reaches the end of life.
This is the time t1 + t2 + t3 obtained by adding t2.

[0029]

Third Embodiment FIG. 3 is an explanatory view showing a test wiring pattern for a semiconductor device according to a third embodiment. In the third embodiment, each connection wiring pattern is formed by connecting each electrode pad linearly, and the lengths of the connection wiring patterns are set to be different from each other so that the current-carrying life is different. Here, it is assumed that there is a relationship that the longer the length of the connection wiring pattern is, the shorter the conduction life is.

The test wiring pattern according to the third embodiment includes first and second end electrode pads 23A and 23D, and two intermediate electrode pads 23B and 23C formed therebetween. One connection wiring pattern is formed between each electrode pad. Each electrode pad has
Each lead portion 231 is formed, and each electrode pad is electrically connected to each other by a connection wiring pattern via each lead portion 231.

A first connection wiring pattern 3A is provided between the first end electrode pad 23A and the intermediate electrode pad 23B, a second connection wiring pattern 3B is provided between the intermediate electrode pads 23B and 23C, and a second end portion. Third connection wiring patterns 3C are formed between the electrode pads 23D and the intermediate electrode pads 23C, respectively.

In the third embodiment, the first connection wiring pattern 3
A length (L1) is the shortest and the second end electrode pad 23
Each time the intermediate electrode pad is passed toward D, the length is sequentially increased in the order of the second and third connection wiring patterns. That is,
When the lengths of the second and third connection wiring patterns 3B and 3C are L2 and L3, respectively, L1 <L2 <L3 is set.

The connection wiring patterns differ from each other only in length, and have a line width of W and are common to all patterns. The line width W0 of the lead portion 231 is set to be larger than the line width W of the connection wiring pattern (W0> W).

The measuring method of the conduction life using the test wiring pattern of the third embodiment is the same as the measuring method of the second embodiment. That is, the power terminal is connected to the first end electrode pad 23.
A, and the ground terminal is connected to the second end electrode pad 23D,
The intermediate electrode pad 23C and the intermediate electrode pad 23B are switched and connected in this order, and the time until the third, second, and first connection wiring patterns 3C, 3B, and 3A reach the current-carrying life is measured. 1 connection wiring pattern 3B, 3A
With regard to, the energization life is obtained by adding the energization life of the connection wiring pattern measured in the preceding stage to the energization time after the ground terminal is switched.

If the relationship between the conduction life of the connection wiring pattern and the length of the wiring is as assumed above, the conduction life of each connection wiring pattern can be measured in the above measurement order. If it is assumed that the longer the longer the longer the life, the above method makes measurement impossible. In such a case, the electrode terminal is fixed to the second end electrode pad 23D, and the ground terminal is connected to the first end electrode pad 23D.
A, by switching in the order of the intermediate electrode pads 23B and 23C and reconnecting, it is possible to measure the conduction life of all the connection wiring patterns while excluding the connection wiring patterns that have reached the conduction life from the measurement targets.

[0036]

Fourth Embodiment FIG. 4 is an explanatory view showing a test wiring pattern for a semiconductor device according to a fourth embodiment. In the fourth embodiment, each connection wiring pattern is formed by connecting each electrode pad in a meandering manner, and the length of each connection wiring pattern is set to be different from each other so as to have a difference in the current-carrying life. ing. Here, as in the third embodiment, it is assumed that the longer the length of the connection wiring pattern is, the shorter the conduction life is.

The test wiring pattern of the fourth embodiment includes first and second end electrode pads 24A and 24D, and two intermediate electrode pads 24B and 24C formed therebetween. One connection wiring pattern is formed between each electrode pad. Each electrode pad has
Each lead portion 241 is formed, and each electrode pad is connected by a connection wiring pattern via each lead portion 241.

A first connection wiring pattern 4A is provided between the first end electrode pad 24A and the intermediate electrode pad 24B, and a second connection wiring pattern 4B is provided between the intermediate electrode pads 24B and 24C. Third connection wiring patterns 4C are formed between the electrode pads 24D and the intermediate electrode pads 24C, respectively.

In the fourth embodiment, the first connection wiring pattern 4
A has the shortest length (L1 ') when linearly expanded,
The length of each of the second and third connection wiring patterns increases in order of the second and third connection wiring patterns each time the intermediate electrode pad is passed toward the end electrode pad 24D. That is, the second and third connection wiring patterns 4
When the lengths of B and 4C are L2 'and L3', respectively,
It is set so that 1 ′ <L2 ′ <L3 ′. Also, due to the difference in length, the number of times of bending of each connection wiring pattern is 6 for the first connection wiring pattern 4A, 8 for the second connection wiring pattern 4B, and 10 for the third connection wiring pattern 4C. Has become.

The line width of each connection wiring pattern is W and is common to all patterns. Drawer 241
Is set to be larger than the line width W of the connection wiring pattern (W0> W).

The measuring method of the current-carrying life using the test wiring pattern of the fourth embodiment is the same as the measuring method of the second embodiment. That is, the power supply terminal is connected to the first end electrode pad 24.
A, and the ground terminal is connected to the second end electrode pad 24D,
The intermediate electrode pads 24C and the intermediate electrode pads 24B are switched and connected in this order, and the time until the third, second, and first connection wiring patterns 4C, 4B, and 4A reach the current-carrying life is measured. 1 connection wiring pattern 4B, 4A
With regard to, the energization life is obtained by adding the energization life of the connection wiring pattern measured in the preceding stage to the energization time after the ground terminal is switched. In the case where the relationship between the length of the connection wiring pattern and the conduction life is opposite to the above assumption, the third embodiment
As described above, the measurement may be performed while sequentially switching the power supply terminal connected to the first end electrode pad 24A to the intermediate electrode pads 24B and 24C.

[0042]

Fifth Embodiment FIG. 5 is an explanatory view showing a test wiring pattern for a semiconductor device according to a fifth embodiment. In the fifth embodiment, each connection wiring pattern is formed by connecting each electrode pad in a straight line, and the number of steps over which each connection wiring pattern goes over is set to be different so that the current-carrying life is different. The fifth embodiment exemplifies a step formed at a position over a base wiring formed in a layer closer to the substrate than the connection wiring pattern. Here, it is assumed that there is a relationship in which the energization life becomes shorter as the number of steps over each ride increases.

The test wiring pattern of the fifth embodiment is shown in FIG.
As shown in FIG. 1, the first and second end electrode pads 25
A, 25E, and three intermediate electrode pads 25B, 25C, 25D formed therebetween. One connection wiring pattern is formed between each electrode pad. A lead portion 251 is formed on each electrode pad, and each electrode pad is electrically connected to the electrode pad by a connection wiring pattern via each lead portion 251.

The first connection wiring pattern 5A is provided between the first end electrode pad 25A and the intermediate electrode pad 25B, and the second connection wiring pattern 5B, the intermediate electrode pad 25C is provided between the intermediate electrode pads 25B and 25C. A third connection wiring pattern 5C is provided between the second end electrode pads 25E and the intermediate electrode pad 25D.
D are formed respectively.

In the fifth embodiment, the first connection wiring pattern 5
A crosses the underlying wiring 10 in one place, and the second, third, and fourth connection wiring patterns 5B, 5C, and 5D cross the underlying wiring 10 in two places, three places, and four places, respectively.
Location. The number of steps over which the connection wiring pattern crosses is equal to the number of places where the connection wiring patterns cross over the underlying wiring 10, and the first, second, third, and fourth connection wiring patterns 5A, 5B, 5C, and 5D cross over. The number of steps is “1”, “2”, “3”, and “4”, respectively.

FIG. 5B shows the first connection wiring pattern 5A.
Is a cross-sectional view taken along the line AA 'of a portion over the underlying wiring 10, and FIG. 5C is a cross-sectional view taken along the line BB' of the same portion. The base wiring 10 is formed on a substrate S, and an insulating film 11 made of SiN, SiO2, or the like is formed so as to cover the base wiring 10. The connection wiring pattern 5 </ b> A is formed on the insulating film 11, and in a portion where the underlying wiring 10 is formed, the connection wiring pattern 5 </ b> A is formed over a step formed in the insulating film 11 by raising the bottom by the underlying wiring 10. Similarly to the first connection wiring pattern 5A, the second, third, and fourth connection wiring patterns 5B, 5C, and 5D are also formed on the insulating film so as to go over a plurality of steps.

Each connection wiring pattern is different from each other only in the number of steps over which it goes over, and has a length L and a line width W which are common to all patterns. The line width W0 of the lead portion 251 is set to be larger than the line width W of the connection wiring pattern (W0> W).

The measuring method of the conduction life using the test wiring pattern of the fifth embodiment is the same as the measuring method of the first embodiment. That is, the power supply terminal is connected to the first end electrode pad 25.
A, and the ground terminal is connected to the second end electrode pad 25E,
The intermediate electrode pads 25D, 252C, and 25B are switched and connected in this order, and the time until the fourth, third, second, and first connection wiring patterns 5D, 5C, 5B, and 5A each reach the current-carrying life is measured. For the third, second, and first connection wiring patterns 5C, 5B, and 5A, the conduction life is determined by adding the conduction life of the connection wiring pattern measured in the previous stage to the conduction time after switching the ground terminal.

If the relationship between the current-carrying life of each connection wiring pattern and the number of steps over which the wiring crosses is as assumed above, it is possible to measure the current-carrying life of each connection wiring pattern in the above measurement order. Although it is possible, if the number of steps to be climbed is large, the life will be prolonged, the measurement will not be possible with the above method. In such a case, the electrode terminal is fixed to the second end electrode pad 25E, and the ground terminal is connected to the first end electrode pad 25A and the intermediate electrode pad 25E.
By switching and reconnecting in the order of B, 25C, and 25D, it is possible to measure the energization life of all the connection wiring patterns while excluding the connection wiring patterns that have reached the energization life from measurement targets.

[0050]

Sixth Embodiment FIG. 6 is an explanatory view showing a test wiring pattern for a semiconductor device according to a sixth embodiment. In the sixth embodiment, each connection wiring pattern is formed by connecting each electrode pad in a meandering manner in the form of a polygonal line. Are set to be different from each other. Here, it is assumed that there is a relationship that the energization life becomes shorter as the number of steps over which the vehicle gets over is large.

The test wiring pattern according to the sixth embodiment includes first and second end electrode pads 26A and 26D, and two intermediate electrode pads 26B and 26C formed therebetween. One connection wiring pattern is formed between each electrode pad. Each electrode pad has
Each lead portion 261 is formed, and each electrode pad is electrically connected to each other by a connection wiring pattern via each lead portion 261.

A first connection wiring pattern 6A is provided between the first end electrode pad 26A and the intermediate electrode pad 26B, and a second connection wiring pattern 6B is provided between the intermediate electrode pads 26B and 26C. Third connection wiring patterns 6C are formed between the electrode pads 26D and the intermediate electrode pads 26C, respectively.

Each connection wiring pattern has the same line width W, the number of times of bending is 10 times, and the length when linearly expanded is the same. The first connection wiring pattern 6A is formed by repeatedly passing over one base wiring 10 at four places, and the number of steps that go over is “4”.
It is. The second connection wiring pattern 6B is formed by repeatedly stepping over each of the two base wirings 10 at four locations, and the number of steps that jump over is “8”. Further, the third connection wiring pattern 6C includes three base wirings 1
0 is repeatedly formed at four locations, and the number of steps that can be climbed over is “12”.

The line width W0 of the lead portion 261 is set to be larger than the maximum line width W1 of the connection wiring pattern (W
0> W1) is set.

The measuring method of the conduction life using the test wiring pattern of the sixth embodiment is the same as the measuring method of the second embodiment. That is, the power terminal is connected to the first end electrode pad 26.
A, and the ground terminal is connected to the second end electrode pad 26D,
The intermediate electrode pad 26C and the intermediate electrode pad 26B are switched and connected in this order, and the time until the third, second, and first connection wiring patterns 6C, 6B, and 6A each reach the current-carrying life is measured. 1 connection wiring pattern 6B, 6A
With regard to, the energization life is obtained by adding the energization life of the connection wiring pattern measured in the preceding stage to the energization time after the ground terminal is switched.

When the relationship between the number of steps over which the connection wiring pattern goes over and the current-carrying life is different from the above assumption, the connection to the first end electrode pad 26A is made as described in the fifth embodiment. Power supply terminals in sequence to the intermediate electrode pad 26
The measurement may be performed while switching to B and 26C and connecting.

[0057]

As described above, according to the present invention, by reconnecting only the ground terminal while keeping the power supply terminal connected to one end electrode pad, a plurality of different configurations are provided. It is possible to measure the current-carrying life of the connection wiring pattern (line width, length, number of steps over, etc.). Therefore, there is no need to reconnect the power supply terminal and the ground terminal as in the related art, and the switching operation is facilitated.

Further, for the connection wiring pattern having the longer conduction life, the conduction life can be obtained by integrating the conduction time to the pattern having the shorter life, so that each connection wiring pattern is measured independently. Rather, the time required for measurement can be reduced.

[Brief description of the drawings]

FIG. 1 is a plan view of a test wiring pattern for a semiconductor device according to a first embodiment.

FIG. 2 is a plan view of a test wiring pattern for a semiconductor device according to a second embodiment.

FIG. 3 is a plan view of a test wiring pattern for a semiconductor device according to a third embodiment;

FIG. 4 is a plan view of a test wiring pattern for a semiconductor device according to a fourth embodiment;

5A is a plan view of a test wiring pattern for a semiconductor device according to Example 5, FIG. 5B is a cross-sectional view taken along line AA ′ in FIG. 5A, and FIG. Sectional drawing which follows the BB 'line of FIG.

FIG. 6 is a plan view of a test wiring pattern for a semiconductor device according to a sixth embodiment.

7A is a plan view of a conventional linear test wiring pattern, and FIG. 7B is a plan view of a conventional polygonal test wiring pattern.

[Explanation of symbols]

 1A, 1B, 1C, 1D Connection wiring pattern 21A First end electrode pad 21B, 21C, 21D Intermediate electrode pad 21E Second end electrode pad 211 Leader

Claims (11)

[Claims] 1. A first and second end electrode pad formed at positions separated from each other on a substrate, and at least one intermediate electrode pad formed between the first and second end electrode pads. And between the first end electrode pad and the intermediate electrode pad,
When there are a plurality of the intermediate electrode pads, one each is formed between the intermediate pads and between the second end electrode pad and the intermediate electrode pad to form the first and second intermediate electrode pads. A plurality of connection wiring patterns forming an electric circuit between the end electrode pads, wherein each of the connection wiring patterns is formed in a different form so as to have a difference in the current-carrying life. Test wiring pattern. 2. The test wiring pattern for a semiconductor device according to claim 1, wherein each of the connection wiring patterns is provided by linearly connecting the two electrode pads. 3. The test wiring pattern for a semiconductor device according to claim 1, wherein each of the connection wiring patterns is provided by connecting the two electrode pads in a polygonal manner. 4. The test wiring pattern for a semiconductor device according to claim 1, wherein the connection wiring patterns have different wiring widths. 5. The test wiring pattern for a semiconductor device according to claim 1, wherein the connection wiring patterns have different wiring lengths. 6. The test wiring pattern for a semiconductor device according to claim 1, wherein each of the connection wiring patterns has a different number of steps over which the connection wiring patterns cross. 7. A semiconductor device comprising at least two intermediate electrode pads, wherein a connection wiring pattern connecting the first end electrode pad and the intermediate electrode pad has the longest current-carrying life, and is connected to the second end electrode pad. The test wiring pattern for a semiconductor device according to any one of claims 1 to 6, wherein the connection wiring pattern is configured so that the conduction life of the connection wiring pattern is gradually shortened each time the connection wiring pattern exceeds the intermediate electrode pad. 8. A semiconductor device comprising at least two intermediate electrode pads, wherein a connection wiring pattern connecting the first end electrode pad and the intermediate electrode pad has the largest width and is directed toward the second end electrode pad. 5. The test wiring pattern for a semiconductor device according to claim 4, wherein the width of the connection wiring pattern gradually decreases each time the width of the connection wiring pattern exceeds the intermediate electrode pad. 9. A semiconductor device comprising at least two intermediate electrode pads, wherein a connection wiring pattern connecting the first end electrode pad and the intermediate electrode pad is the shortest, and is connected to the second end electrode pad. 6. The test wiring pattern for a semiconductor device according to claim 5, wherein the length of the wiring pattern sequentially increases each time the wiring pattern exceeds the intermediate electrode pad. 10. The semiconductor device according to claim 1, wherein at least two intermediate electrode pads are provided, and the number of steps over which a connection wiring pattern connecting the first end electrode pad and the intermediate electrode pad goes over is smallest, and the second end electrode is provided. 7. The test wiring pattern for a semiconductor device according to claim 6, wherein the number of steps over which the connection wiring pattern crosses toward the pad sequentially increases as the number of steps exceeds the intermediate electrode pad. 11. The test method for a test wiring pattern for a semiconductor device according to claim 7, wherein one terminal of a current source is connected to the first end electrode pad, and The other terminal of the current source is connected to the end electrode pad of the second electrode pad and the connection wiring pattern between the second electrode pad and the intermediate electrode pad is measured for the time until the conductive life is reached, and the time is measured. Hereinafter, after the current-carrying life of the preceding connection wiring pattern has elapsed, the other terminal of the current source is sequentially switched to the intermediate electrode pad on the side closer to the first end electrode pad. The time required for the connection wiring pattern between the connected intermediate electrode pad and the electrode pad on the side of the first end electrode to reach the current-carrying life is measured. The current life A method for testing a test wiring pattern for a semiconductor device, wherein the connection wiring pattern has a current-carrying life.