JPH11122125A - Method for receiving fm multiplex broadcast data - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow the method to receive differential global positioning system DGPS information without vehicle information communication system VICS information (on road traffic). SOLUTION: This method is an FM multiplex broadcast data reception method that receives DGPS information and VICS information by one receiver. A frame synchronization timing of FM multiplex broadcast data from an FM multiplex broadcast station that broadcasts the DGPS information in advance is detected and set to a synchronization counter 24. A CPU 23 monitors whether or not the time comes a time before a prescribed time based on the frame synchronization timing of the DGPS information while receiving the FM multiplex broadcast data from the FM multiplex broadcast station that broadcasts the VICS information, and when the time before a prescribed time comes, the CPU 23 selects the reception station to be the FM multiplex broadcast station that broadcasts the DGPS information and also selects the reception station to be the FM multiplex broadcast station that broadcasts the VICS information after the end of reception of the DGPS information.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for receiving FM multiplex broadcast data, and more particularly to a method for receiving FM multiplex broadcast data in which DGPS information and VICS information are received by one receiver.

[0002]

2. Description of the Related Art In a navigation system for guiding a vehicle to a destination, it is important to accurately grasp the position of the vehicle and to correctly recognize road traffic information (traffic jam, accident, regulation, etc.). . At present, the position of a car can be determined by (1) self-contained navigation using a distance sensor (eg, a vehicle speed sensor) or a direction sensor (eg, a gyro),
GPS (Global Positionin) that receives position information from satellites
g System) navigation is also used. The position accuracy of GPS is bad and may reach 100 m or more. For this reason, GPS
It is required to improve the positional accuracy of GPS, and DGPS
(Differential Global Positioning System) has been proposed and put into practical use. DGPS is (1)
The position is determined by receiving GPS satellite radio waves at a location where the exact position is known, (2) determining the error between the known position and the positioning position, and (3) determining the same positioning system user in the same area. By transmitting an error or a correction coefficient, the position accuracy and reliability of the positioning system are improved and secured. (4) FM multiplex broadcast radio waves are used as means for transmitting the above information to the user.

[0003] Road traffic information (traffic jams, accidents, regulations, etc.)
Is provided by a road traffic information communication system (VICS), and an on-vehicle navigation system receives road traffic information (VICS information) and displays it on a map in real time. Levels 1 to 3 can be used as a display method of VICS information, and road traffic information can be displayed at a desired level according to a situation or purpose. Level 1 is a character information display mode in which section travel time information, trouble information, service information, general FM character information, and the like are displayed in characters in an upper area of the display screen. Level 2 is a simple figure display mode in which a simple figure of a congestion monitoring road is drawn and traffic congestion /
It displays trouble information and the like. Level 3 is a map information display mode that displays information such as traffic jams, accidents, and regulations.
It is displayed on a map in real time. VICS
By using the road traffic information, the driver can arrive at the destination in a short time while avoiding congested roads, traffic restricted roads, and accident roads. As a means for communicating such VICS information, an optical beacon, a radio beacon, and an FM multiplex broadcast radio wave are currently used. The communication area of each communication means is 10 to 50k per station for FM multiplex broadcasting.
m, 60 to 70 m per radio beacon, and 3.5 m per optical beacon. For this reason, FM multiplex broadcasting having a wide communication area flows high-frequency traffic information, and radio beacons and optical beacons flow traffic information in a limited area.

FIG. 10 is a diagram showing the structure of FM multiplexed data multiplexed in FM broadcasting. One frame consists of 272 blocks (packets), 190 blocks of 272 blocks transmit data blocks, and 82 blocks transmit only parity. In the parity block, the parity block is dispersedly arranged in the data block. One frame is 4.896 seconds, and one block is 18 msec. Each data block is a 16-bit block identification code BI
It is composed of C (Block Identify Code), 176-bit data, 14-bit CRC code, and 82-bit parity (horizontal code) for error detection and correction. The parity block is a 16-bit block identification code BI.
C, a 190-bit parity (vertical code), and an 82-bit parity for error detection and correction (horizontal code). The identification code of the data block in the first 13 blocks is BIC1, the identification code of the data block in the next 123 blocks is BIC3, the identification code of the data block in the next 13 blocks is BIC2, and the last Among the 123 blocks, the identification code of the data block is BIC3, and the identification code of the parity block is BIC4.

[0005] Block synchronization can be achieved by detecting the block identification code for each block.
Every two blocks (the block identification code BIC4 followed by BI
Frame synchronization can be achieved (by detecting C1). Further, since parity (vertical code, horizontal code) for error detection and correction is included, error detection and error correction processing (vertical correction, horizontal correction) can be performed using these parities. Further, since the data block contains a CRC code, a CRC check can be performed for each block. The VICS information is transmitted using all blocks of the frame, while the DGPS information is transmitted using the first two blocks of the frame.

FIG. 11A shows a block structure of DGPS data, which is a 176-bit data block (from a 190-bit data block in FIG. 10 to a 14-bit CRC).
(Without blocks).
16-bit prefix 51 and 160 bits or 144-bit DGPS segments 52, 53 and 16
It consists of a CRC 54 of bits. As shown in FIG. 11 (b), the prefix 51 indicates the identification of the program contents and the transmission mode, and specifies the data packet configuration. The service identification section 51a also specifies the decoding method of the error correction circuit. "1" is decoding only in the horizontal direction, "0" is decoding in horizontal, vertical and horizontal directions) 51
b, an information end flag 51c indicating the end of the data group transmitted by a certain data group number ("1" is ended) 51c, an update flag 51d indicating that the data group transmitted by a certain data group number has been updated, , A data group number part 51e for designating a data group number, and a data packet number part 51f.

The prefix 51 of the DGPS information is (1) service identification: 1011 (2) decoding identification flag: 1 (3) data group number: 1100. FIG. 12 shows a segment configuration of the DGPS information, and the DGPS segment has 160 + 144 bits of 30 bits.
It is composed of 4 bits, and the first 16 bits are as follows. (1) Segment identification: 1101 (D) (2) Segment length: 1111 (F) (3) Extended segment length: 00100100 From the above, the prefix 51 and the next 1
DGPS information can be identified by referring to 6 bits.

[0008]

At present, DGPS information is transmitted by a JFN sequence FM multiplex station, and VICS information is transmitted by NH.
The K-sequence FM multiplex station transmits. For this reason, a configuration using two receivers and a configuration using one receiver by switching are considered as FM multiplex broadcast receivers. However, using two receivers to receive VICS information and DGPS information is problematic in terms of cost and space. Therefore, one receiver is switched and used, but VICS is used for each frame.
In the method of switching between reception of information and DGPS information, one frame is about 5 seconds, so that there is a problem in that VICS information for 5 seconds (VICS information for one frame) is lost.

[0009] From the above, it is an object of the present invention to provide a FPS that can receive DGPS information without losing VICS information.
An object of the present invention is to provide a method for receiving M multiplex broadcasting. Another object of the present invention is to provide a decoder or memory with DGPS information and VIC information.
An object of the present invention is to provide a method of receiving FM multiplex broadcasting that can be shared by S information.

[0010]

SUMMARY OF THE INVENTION According to the present invention, the frame synchronization timing of FM multiplex broadcast data from an FM multiplex broadcast station that broadcasts DGPS information is detected in advance, and VICS information is broadcast. During reception of FM multiplex broadcast data from the FM multiplex broadcast station, when the predetermined time before the frame synchronization timing comes, the receiving station is set to D.
Switch to FM multiplex broadcasting station that broadcasts GPS information, DG
This is achieved by switching the receiving station to the FM multiplex broadcasting station that broadcasts the VICS information after the reception of the PS information is completed.
In this way, the reception of the DGPS information causes the VIC
The number of blocks (the number of missing blocks) during which reception of S information is interrupted is equal to or less than the number of missing blocks that can be restored by error correction (horizontal, vertical, and horizontal correction). Therefore, the block of the VICS information that has been lost due to the reception of the DGPS information can be restored, and the VICS information is not lost.

Further, according to the present invention, the present invention provides one decoder for decoding FM multiplex broadcast data in common for DGPS information and VICS information, and separate memories for DGPS information and VICS information. When VICS information is input, the decoder stores the VICS information in the VICS information memory, performs an error correction process on the VICS information according to the VICS information, and
When GPS information is input, DGPS information is
The GPS information is stored in a GPS storage memory, and the DGPS information
An error correction process is performed according to the PS information. In this way, the decoder can be shared and the configuration can be simplified.

Further, according to the present invention, the present invention provides a decoder for decoding FM multiplex broadcast data, which is provided in common for DGPS information and VICS information, and a common memory for DGPS information and VICS information. The decoder stores VICS information and DGPS information in the memory in a mixed manner, and applies horizontal and vertical DGPS information to the DGPS information before performing vertical error correction processing on the mixed information for one frame stored in the memory. An error correction process is performed and the error correction result is stored. In this case, the decoder and the memory can be shared, and the configuration can be simplified.

Further, according to the present invention, there is provided the following (1) FM
One decoder and one memory for decoding the multiplex broadcast data are provided in common for the DGPS information and the VICS information, respectively, and the frame synchronization timing of the FM multiplex broadcast data from the FM multiplex broadcast station broadcasting the DGPS information is set in advance. (2) While receiving information from an FM multiplex broadcasting station that broadcasts VICS information, when a predetermined time comes before the frame synchronization timing, the receiving station is switched to an FM multiplex broadcasting station that broadcasts DGPS information. (3) After that, the block identification code is detected from the received information, and the decoder stores the two blocks after the block identification code is detected in the memory as DGPS information. ) After the DGPS information is saved, switch the receiving station to the FM multiplex broadcasting station that broadcasts the VICS information, and Da is achieved by storing in the memory captures VICS information based on the block synchronization of VICS information held. By doing so, the configuration can be simplified, the VICS information lost during reception of the DGPS information can be reduced, and the lost VICS information can be reliably restored.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION

(A) First Embodiment (a) Configuration FIG. 1 is a configuration diagram of an FM multiplex broadcast receiver according to a first embodiment of the present invention. The FM multiplex broadcast receiver receives the FM broadcast signal, and multiplexes the FM broadcast signal and transmits the VICS signal.
It separates and demodulates FM multiplex broadcast data such as information, DGPS information, and textual information, passes it to a navigation system, or displays it on a display device. In the drawing, reference numeral 1 denotes an antenna, and 4 denotes a front end (F / E), which includes an antenna tuning circuit, a high-frequency amplifier circuit, a local oscillator, a mixer, etc., which are not shown. 5 is a PLL circuit, 6 is a low-pass filter, 7 is an intermediate frequency amplification / FM detector (IF / DET)
It is. The PLL circuit 5, the low-pass filter 6, and the local oscillator built in the front end 4 constitute an electronic tuning device.
The local oscillator is oscillated at a frequency corresponding to the reception frequency (the frequency of the FM broadcasting station selected by the tuning operation), and an intermediate frequency signal is output by a mixer in the front end 4. Reference numeral 8 denotes a noise canceller / stereo demodulation circuit (NC / MP) for performing noise cancellation and stereo demodulation.
X) and 9 are filter circuits for extracting L-MSK modulated signal components from the FM detection signal. Thus, a tuner is formed.

Reference numeral 10 denotes a switching circuit for switching the output direction depending on whether VICS information is being received or DGPS information is being received.
Is a multiplex decoder for VICS, 22 is a multiplex decoder for DGPS, and 23 is a processor (CPU) that performs reception control of VICS information / DGPS information, character information display control, channel selection control, etc., and 24 is a synchronous counter. The count value becomes 0 at the frame synchronization timing of DGPS, and thereafter, the clock is counted and repeated for one frame period (= 4.896 seconds)
Is counted. That is, the frame synchronization timing of the FM multiplex broadcast data from the FM multiplex station that broadcasts the DGPS information is detected in advance, the count value of the synchronization counter 24 is set to 0 at the timing, and the clock is counted thereafter. 25 is the received FM multiplexed data (VICS information, D
A memory for storing GPS information, teletext program information, etc.)
Reference numeral 26 denotes an operation unit for the user to perform a channel selection operation or select a desired teletext program, and 27 denotes text information (news,
It is a display device that displays a weather forecast or the like on a screen.

FIG. 2 (a) is a block diagram of a VICS multiplex decoder 21. Reference numeral 31 denotes an L-MSK demodulation circuit which performs delay detection on an L-MSK modulated signal to reproduce a bit clock and demodulate a bit data sequence. 32 is a synchronization circuit for detecting block synchronization and frame synchronization, 33 is a correction processing unit, 34
Is a one-frame RAM for storing VICS information. The correction processing unit 33 includes a CRC check unit 33a and an error detection and correction unit 33b that performs horizontal / vertical correction. The CRC check unit 33a performs a CRC check for each block, and the error detection and correction unit 33b performs PN decoding on the bit data sequence based on the block synchronization and frame synchronization detection signals input from the synchronization circuit, and then performs a predetermined operation. While the data is temporarily stored in the RAM 34 while being divided into formats, syndrome data is generated using a parity code, and horizontal correction and vertical correction errors are performed by majority decision on the syndrome. FIG. 2B is a configuration diagram of the DGPS multiplex decoder 22. In the figure, 41 is an L-MSK demodulation circuit, 42 is a synchronization circuit, 43 is a correction processing unit, and 44 is D
This is a RAM for storing GPS information, and has a configuration similar to that of FIG. However, the error detection and correction unit 43
Only horizontal correction is performed on GPS information, and the correction result is
Send to U23. Further, the synchronization circuit 42 sends a frame synchronization timing signal to the CPU 23.

(B) Setting of Synchronization Timing FIG. 3 is a flow chart of a synchronization timing setting process. In advance,
The tuner tunes to a JFN-series FM multiplex station that broadcasts DGPS information under the control of the CPU 23, and receives FM multiplex broadcast data from the FM multiplex station. With this, DGPS
The synchronization circuit 42 of the decoder 22 detects the frame synchronization timing of the FM multiplexed data and notifies the CPU 23 (step 101). FM multiplex data of one frame is 2
A block including 72 blocks and having the block identification code BIC1 next to the block identification code BIC4 is the head block of the frame. Block identification code BIC1
Since the BIC 4 has the pattern shown in FIG. 4, the synchronization circuit 42 outputs the BIC next to the block identification code BIC4.
By detecting 1, the frame synchronization timing is detected and notified to the CPU 23. When the CPU 23 receives the notification of the frame synchronization timing, it clears the content of the synchronization counter 24 and thereafter counts a clock (not shown) to 1
The frame period (= 4.896 seconds) is counted repeatedly (step 102). Note that the frame synchronization timing does not match between the JFN-series FM multiplex stations (the frame synchronization timing matches between the NHK-series FM multiplex stations).
Also, the receivable JFN-series FM stations change according to the running of the automobile. Therefore, the receivable JFN sequence FM
Measure and store the frame synchronization timing of the station,
When switching to another JFN sequence FM station according to the received electric field strength, the stored frame synchronization timing is set in a synchronization counter.

(C) Reception of DGPS Information and VICS Information FIG. 5 is a flowchart of a process for receiving DGPS information and VICS information. The frame synchronization timing of the FM multiplex broadcast data (DGPS) is set in the synchronization counter 24 by the synchronization timing setting process of FIG. In such a state,
The tuner receives VICS information from the NHK-series FM multiplex station under the control of the CPU 23, and receives the VICS information from the VICS multiplex decoder 21.
, And the VICS multiplex decoder 21 stores the received data of each block in the built-in RAM 34 (step 201). The CPU 23 monitors the count value of the synchronization counter 24 and checks whether the DGPS information reception time has come (step 202).
Of the VICS information is continued. In order to lock the PLL of the electronic tuning circuit by switching the receiving station from the NHK-sequence FM multiplex station to the JFN-sequence multiplex station, 10
msec is required, and then 3 blocks (= 3 × 18 msec = 54 msec) if the block synchronization protection stage is set to 2 blocks before the DGPS information can be received with synchronization acquisition.
Required, and then the DGPS information block can be read. Therefore, it is assumed that the DGPS information reception time has come when the count value of the synchronization counter 24 reaches a value corresponding to a time 64 msec before the synchronization timing.

When the DGPS information reception time comes, the CPU 2
3 controls the electronic tuning apparatus to switch the receiving station from the NHK sequence FM multiplex station to the JFN sequence multiplex station (step 20).
3). As a result, the tuner inputs the information received from the JFN sequence FM multiplex station to the DGPS multiplex decoder 22 (step 204). Thereafter, the CPU 23 waits for a DGPS information reception completion notification from the DGPS multiplex decoder 22 (step 205). DGPS multiplex decoder 22
Starts the reception of the DGPS information after synchronization acquisition, stores two blocks of the DGPS information in the built-in RAM 44, and then notifies the CPU 23 of the completion of the reception of the DGPS information. Upon completion of the reception of the DGPS information, the CPU 23 switches the receiving station from the JFN-series FM multiplex station to the NHK-series FM multiplex station (step 206). Thereby, NH
VICS information received from K-sequence FM multiplex station
And the VICS multiplex decoder 21 receives the data of each block and stores the data in the built-in RAM 34.
To be stored. Note that the VICS multiplex decoder 21 is
Before the S information can be received, ie, J
10msec to switch the receiving station from the FN series FM multiplex station to the NHK series multiplex station.
Until information can be received, three blocks (=
3 × 18msec = 54msec) is required.

As described above, if the VICS information for one frame is fetched, the VICS multiplex decoder 21 corrects the horizontal correction.
By performing vertical correction → horizontal correction, the VICS information of some blocks that could not be received during DGPS information reception is restored, and the VICS information is transmitted to the CPU 23. Also, DGP
The S decoder 22 applies only the horizontal correction to the DGPS information and sends the correction result to the CPU 23. The CPU stores the VICS information and the DGPS information received from the decoders 21 and 22 in the memory 25, and transmits these information to the navigation controller as appropriate.

By the way, when the VICS information lost due to the reception of the DGPS information is estimated, the following is obtained.
That is, the receiving station is switched from the NHK sequence FM multiplex station to the JFN sequence multiplex station to receive the DGPS information, and the DGP
After receiving the S information, the time required to switch the receiving station from the JFN-series FM multiplex station to the NHK-series multiplex station and to receive the VICS information is the total time of the following: The receiving station is switched from the NHK-sequence FM multiplex station to the JFN-sequence multiplex station, and the time until the DGPS information can be received with synchronization is 64 msec, the reception of two blocks of DGPS information is 36 msec. 164 msec, that is, 64 msec, until the receiving station is switched and the VICS information can be received in synchronization with the reception, is required. This time is about 3.35% of the time of 4896 msec for one frame. VIC lost due to reception of DGPS information due to parity correction
S information can be almost restored.

(B) Second Embodiment FIG. 6 is a block diagram of an FM multiplex broadcast receiver according to a second embodiment of the present invention. The same parts as those in the first embodiment in FIG. I have. The difference from the first embodiment is that a decoder for decoding FM multiplex broadcast data is commonly used for DGPS and VICS. In the figure, reference numeral 20 denotes DGPS information and V
A decoder 51 is provided in common to the ICS information.
An L-MSK demodulation circuit that performs delay detection on the MSK modulated signal to reproduce a bit clock and demodulate a bit data sequence;
52 is a synchronization circuit for detecting block synchronization and frame synchronization, 53 is a correction processing unit, 54 is a VICS RAM for one frame that stores VICS information, and 55 is a DGPS RAM for one frame that stores DGPS information. is there. The correction processing unit 53 includes a CRC check unit 53a and a VICS
An error detection and correction unit 53b that performs horizontal correction / vertical correction on information and performs horizontal correction on DGPS information is provided. The CRC check unit 53a performs CRC for each block.
The error correction circuit 53b checks the VICS information in the RAM 54 and the DGPS information in the RAM 54 based on the block synchronization and frame synchronization detection signals input from the synchronization circuit.
55, and then, using a parity code,
Perform horizontal correction → vertical correction → horizontal correction for ICS information and DGP
Lateral correction is performed on the S information.

Synchronous timing setting processing (see FIG. 3)
The FM multiplex broadcast data (DGP
The frame synchronization timing of S) is set. In this state, the tuner controls the NHK series F under the control of the CPU 23.
The VICS information is received from the M multiplex station and input to the decoder 20, and the decoder 20 stores the received VICS information of each block in the RAM. The CPU 23 monitors the count value of the synchronization counter 24 and checks whether the DGPS information reception time has come. If not, the VICS information reception processing continues. When the DGPS information reception time comes, the CPU
Reference numeral 23 controls the electronic tuning apparatus to switch the receiving station from the NHK sequence FM multiplex station to the JFN sequence multiplex station. As a result, the tuner inputs the information received from the JFN sequence FM multiplex station to the decoder 20. Thereafter, the CPU 23 waits for the DGPS information reception completion notification from the decoder 20. The decoder 20 starts receiving DGPS information after synchronization acquisition,
The DGPS information is stored in the RAM 55. When the reception of the two blocks of DGPS information is completed, the CPU 23 notifies the CPU 23 of the completion of the DGPS information reception.

When the reception of the DGPS information is completed, the CP
U23 switches the receiving station from the JFN sequence FM multiplex station to the NHK sequence multiplex station. As a result, the VICS information is received from the NHK-sequence FM multiplex station and input to the decoder 20, and the decoder 20 stores the data of each block of the received VICS information in the RAM 54. As described above, if the VICS information for one frame is fetched, the error detection and correction unit 53b of the decoder 20 performs horizontal correction → vertical correction → horizontal correction on the VICS information, and some of the signals that cannot be received during DGPS information reception. Restore VICS information of block, VICS
The information is transmitted to the CPU 23. The error detection and correction unit 53
b indicates that the DGPS information is only subjected to horizontal correction and the correction result is CP.
Send to U23. The CPU stores the VICS information and the DGPS information received from the decoder 20 in the memory 25,
The information is transmitted to the navigation controller as appropriate.

(C) Third Embodiment FIG. 7 is a block diagram of an FM multiplex broadcast receiver according to a third embodiment of the present invention. The difference from the first embodiment is that (1) FM multiplex broadcast data is decoded. Decoders for DGPS information and VI
(2) A memory (RAM) for storing VICS information and DGPS information is shared, and these information are mixed and stored in the memory. In FIG. 7, the same parts as those in the second embodiment in FIG. 6 are denoted by the same reference numerals. In the figure, reference numeral 20 denotes a decoder provided in common for DGPS information and VICS information, 51 denotes an L-MSK demodulation circuit that performs delay detection on an L-MSK modulated signal, reproduces a bit clock, and demodulates a bit data sequence; Reference numeral 52 denotes a synchronization circuit for detecting block synchronization and frame synchronization; 53, a correction processing unit; and 56, a RAM for one frame that stores VICS information and DGPS information in a mixed manner. Correction processing unit 53
Has a CRC check unit 53a and an error detection and correction unit 53b that performs horizontal correction / vertical correction on VICS information and performs horizontal correction on DGPS information. CRC
The check unit 53a performs a CRC check for each block, and the error detection and correction unit 53b performs VICS based on the block synchronization and frame synchronization detection signals input from the synchronization circuit.
The information is sequentially stored in the RAM 56, and the DGPS information is sequentially stored in the RAM 56. Thereafter, the DGPS information is horizontally corrected using the parity code, and the VICS information is horizontally corrected → vertically corrected → horizontal correction. .

Synchronization timing setting processing (see FIG. 3)
The FM multiplex broadcast data (DGP
The frame synchronization timing of S) is set. In such a state, the tuner controls the electronic tuning of the CPU 23 to set the NH.
The VICS information is received from the K-sequence FM multiplexing station and input to the decoder 20, and the decoder 20
The ICS information is sequentially stored in the RAM 56. The CPU 23 monitors the count value of the synchronous counter 24 and checks whether the time of receiving the DGPS information has been reached.
The information receiving process continues. When the DGPS information receiving time comes, the CPU 23 switches the receiving station from the NHK sequence FM multiplex station to the JFN sequence multiplex station. As a result, the tuner transmits the information received from the JFN sequence FM multiplex station to the decoder 2.
Enter 0. Thereafter, the CPU 23 outputs the D
Wait for GPS information reception completion notification. The decoder 20 starts receiving the DGPS information after the synchronization is captured, and stores the DGPS information in the RAM 56. And two blocks of DGP
When the reception of the S information is completed, the completion of the DGPS information reception is indicated by C.
Notify the PU23.

When the reception of the DGPS information is completed, the CP
U23 switches the receiving station from the JFN sequence FM multiplex station to the NHK sequence multiplex station. As a result, the VICS information is received from the NHK-sequence FM multiplex station and input to the decoder 20, and the decoder 20 stores the data of each block of the received VICS information in the RAM 56. As described above, when the VICS information for one frame is fetched, the error detection / correction unit 53b of the decoder 20 firstly stores the 2 bits stored in the RAM 56.
The horizontal correction is performed on the DGPS information for the block, and the correction result is transmitted to the CPU 23. Next, the error detection and correction unit 53b performs horizontal correction → vertical correction → horizontal correction on the VICS information for one frame stored in the RAM 56,
The VICS information of some blocks that could not be received during the DGPS information reception is restored, and the VICS information is
Send to 3. The CPU 23 stores the VICS information and the DGPS information received from the decoder 20 in the memory 25,
The information is transmitted to the navigation controller as appropriate.

(D) Fourth Embodiment FIG. 8 is a block diagram of an FM multiplex broadcast receiver according to a fourth embodiment of the present invention. The difference from the first embodiment is that (1) FM multiplex broadcast data is decoded. Decoders for DGPS information and VI
Common points for CS information, (2) VICS information and DGP
The point is that a memory (RAM) for storing S information is shared, and the information is mixed and stored in the memory. 8, the same parts as those in the third embodiment in FIG. 7 are denoted by the same reference numerals. In the figure, reference numeral 20 denotes a decoder provided in common for DGPS information and VICS information, 51 denotes an L-MSK demodulation circuit that performs delay detection on an L-MSK modulated signal, reproduces a bit clock, and demodulates a bit data sequence; Reference numeral 52 denotes a synchronization circuit for detecting block synchronization and frame synchronization; 53, a correction processing unit; and 57, a RAM for one frame that stores VICS information and DGPS information together. Correction processing unit 53
Has a CRC check unit 53a and an error detection and correction unit 53b that performs horizontal correction / vertical correction on VICS information and performs horizontal correction on DGPS information. CRC
The check unit 53a performs a CRC check for each block, and the error detection and correction unit 53b performs VICS based on the block synchronization and frame synchronization detection signals input from the synchronization circuit.
The information is sequentially stored in the RAM 57, and similarly, the DGPS information is sequentially stored in the RAM 57, and thereafter, the DGPS information is horizontally corrected using the parity code, and the VICS information is horizontally corrected → vertically corrected → horizontal correction. .

FIG. 9 is a processing flow of the fourth embodiment. The frame synchronization timing of the FM multiplex broadcast data (DGPS) is set in the synchronization counter 24 in advance by the synchronization timing setting process (see FIG. 3). In this state, the tuner controls the CPU 23 to control the V
The ICS information is received and input to the decoder 20, and the decoder 20 stores the received VICS information of each block in the RAM 57.
(Step 401). The CPU 23 monitors the count value of the synchronization counter 24 and checks whether the DGPS information reception time has come (step 402). DG
Before the PS information can be received, the receiving station is switched from the NHK-sequence FM multiplex station to the JFN-sequence multiplex station, and it takes about 10 msec until the PLL of the electronic tuning circuit is locked. 9mse for bit
c, a total of 29 msec is required. Therefore, it is assumed that the DGPS information reception time has come when the count value of the synchronization counter 24 reaches a value corresponding to a time 29 msec before the synchronization timing. If it is determined in step 402 that the DGPS information reception time has not come, the VICS information reception processing is continued. On the other hand, when the DGPS information reception time comes, the CPU
23 switches the receiving station from the NHK sequence FM multiplex station to the JFN sequence multiplex station (step 403). At the same time, CPU
23 instructs the synchronization circuit 52 to maintain synchronization. As a result, the synchronization circuit holds the block synchronization and the frame synchronization of the VICS information (step 404). Thereafter, the tuner transmits the information received from the JFN sequence FM multiplex station to the decoder 2.
0, and through the demodulation circuit 51, the CPU 23
To enter.

The CPU 23 detects the block identification code BIC from the output of the demodulation circuit 51 (step 40).
5) If BIC information is detected, the next block is DGPS
The information block is checked by referring to the prefix and the 16-bit head segment information. If it is a DGPS information block, it notifies the decoder 20 and thereby,
The decoder stores two blocks of DGPS information in the RAM 57 (step 406). When the storage of the DGPS information is completed, the decoder 20 notifies the completion of the DGPS information reception by the CPU.
Notify 23. Upon completion of receiving the DGPS information,
The CPU 23 switches the receiving station from the JFN sequence FM multiplex station to the NHK sequence multiplex station (step 407). Thereafter, the tuner receives the VICS information from the NHK-sequence FM multiplex station and inputs the VICS information to the decoder 20, and the decoder 20 writes the received VICS information to the RAM 57 based on the held block synchronization (without supplementing the synchronization) ( Step 40
8).

As described above, when the VICS information for one frame is fetched, the error correction unit 53b of the decoder 20 firstly outputs the DGP data for two blocks stored in the RAM 57.
The horizontal correction is performed on the S information, and the correction result is transmitted to the CPU 23. Next, the error correction unit 53b performs horizontal correction → vertical correction → horizontal correction on the VICS information for one frame stored in the RAM 57, and obtains VICS information of some blocks that could not be received during DGPS information reception. Is restored, and the VICS information is transmitted to the CPU 23. CPU2
3 is the VICS information and DGP received from the decoder 20.
The S information is stored in the memory 25, and the information is transmitted to the navigation controller as appropriate.

In the fourth embodiment, when the VICS information lost due to the reception of the DGPS information is estimated, the following is obtained. That is, the receiving station is switched from the NHK sequence FM multiplex station to the JFN sequence multiplex station to receive the DGPS information,
NHK from JFN sequence FM multiplex station after receiving DGPS information
The time required until the receiving station is switched to the sequence multiplex station and VICS information can be received is the total time of the following. That is, the receiving station is switched from the NHK-series FM multiplexing station to the JFN-series multiplexing station and about 10 msec until the PLL of the electronic tuning circuit is locked.
c, It takes 36 msec to receive two blocks of DGPS information, and about 10 msec to switch the receiving station from the JFN sequence FM multiplex station to the NHK sequence multiplex station and lock the PLL of the electronic tuning circuit, that is, 65 msec. This time is 1.3% of the time of one frame of 4896 msec. By parity correction, VICS information lost due to reception of DGPS information can be restored with a margin. As described above, the present invention has been described with reference to the embodiments. However, the present invention can be variously modified in accordance with the gist of the present invention described in the claims, and the present invention does not exclude these.

[0033]

As described above, according to the present invention, the frame synchronization timing of the FM multiplex broadcasting data from the FM multiplex broadcasting station that broadcasts the DGPS information is detected in advance, and the FM synchronization from the FM multiplex broadcasting station that broadcasts the VICS information is detected. During reception of the multiplex broadcast data, when a predetermined time comes before the frame synchronization timing, the receiving station is switched to the FM multiplex broadcast station that broadcasts the DGPS information, and after the reception of the DGPS information is completed,
Since the receiving station is switched to the FM multiplex broadcasting station that broadcasts the VICS information, the reception of the DGPS information causes
The number of blocks (the number of missing blocks) during which reception of ICS information is interrupted can be made equal to or less than the number of missing blocks that can be restored by error correction. Therefore, the block of the VICS information that has been lost due to the reception of the DGPS information can be restored.
No S information is lost.

According to the present invention, one decoder for decoding FM multiplex broadcast data is provided in common for DGPS information and VICS information, and a decoder for DGPS information and VICS information are provided.
A separate memory is provided for CS information, and the decoder
When S information is input, VICS information is
Stored in the S information memory, and the VICS information
Since error correction processing according to the information is performed, and when DGPS information is input, the DGPS information is stored in a DGPS storage memory, and error correction processing according to the DGPS information is performed on the DGPS information. The decoder can be shared, and the configuration can be simplified.

According to the present invention, one decoder for decoding FM multiplex broadcast data is provided in common for DGPS information and VICS information, and a decoder for DGPS information and VICS information are provided.
A common memory is provided for CS information, and the decoder stores VICS information and DGPS information in a mixed manner in the memory, and performs a vertical error correction process on the mixed information for one frame stored in the memory. Further, since the DGPS information is subjected to a horizontal error correction process and the error correction result is stored, the decoder and the memory can be shared, and the configuration can be simplified.

According to the present invention, (1) a decoder for decoding FM multiplex broadcast data and a memory for DGP
In addition to providing one in common for S information and VICS information,
In advance, the FM broadcast from the FM multiplex broadcasting station that broadcasts the DGPS information
The frame synchronization timing of the M multiplex broadcast data is set. (2) The DGPS information is broadcast when a predetermined time comes before the frame synchronization timing while receiving the information from the FM multiplex broadcast station that broadcasts the VICS information. (3) After that, the block identification code is detected from the received information, and the decoder detects the two blocks after the block identification code is detected. Is stored in the memory as DGPS information. (4) After the DGPS information is stored, VICS
The receiving station is switched to the FM multiplex broadcasting station that broadcasts the information, and the decoder fetches the VICS information based on the block synchronization of the held VICS information and stores it in the memory. Therefore, the decoder is lost while receiving the DGPS information. V
The ICS information can be reduced, and the VICS information lost by the error correction processing can be surely restored.

[Brief description of the drawings]

FIG. 1 is a configuration diagram (first embodiment) of an FM multiplex broadcast receiver of the present invention.

FIG. 2 is a configuration diagram of a multiplex decoder.

FIG. 3 is a flowchart of synchronization timing setting control.

FIG. 4 is a pattern of a block identification code.

FIG. 5 is a flowchart of control for receiving VICS information and DGPS information.

FIG. 6 is another configuration diagram (second embodiment) of the FM multiplex broadcast receiver of the present invention.

FIG. 7 is another configuration diagram (third embodiment) of the FM multiplex broadcast receiver of the present invention.

FIG. 8 is another configuration diagram (fourth embodiment) of the FM multiplex broadcast receiver of the present invention.

FIG. 9 is a processing flow of a fourth embodiment.

FIG. 10 is a diagram illustrating a frame configuration of FM multiplexed data.

FIG. 11 is a configuration diagram of DGPS data.

FIG. 12 is an explanatory diagram of DGPS segment contents.

[Explanation of symbols]

 4. Front end (F / E) 5. PLL circuit 7. Intermediate frequency amplification / FM detector (IF / DET) 9. Filter circuit 10. Switching circuit 21. Multiplex decoder for VICS 22 .. Multiplex decoder for DGPS 23..Processor (CPU) 24..Synchronous counter

Claims (4)

[Claims] 1. An FM multiplex broadcast data receiving method for receiving DGPS information and VICS information respectively broadcast by FM multiplex from different broadcast stations by one receiver, comprising: F
The frame synchronization timing of the M multiplex broadcast data is detected in advance, and when receiving the FM multiplex broadcast data from the FM multiplex broadcast station that broadcasts the VICS information, the receiving station is set to a predetermined time before the frame synchronization timing. Switch to FM multiplex broadcasting station that broadcasts DGPS information, and after receiving DGPS information, broadcast VICS information
F which switches a receiving station to an M multiplex broadcasting station.
An M multiplex broadcast data receiving method. 2. A decoder for decoding FM multiplex broadcast data is provided in common for DGPS information and VICS information, and separate memories are provided for DGPS information and VICS information, respectively. The decoder converts VICS information to VICS information. The DGPS information is stored in the DGPS information storage memory, and then the VICS information stored in the VICS information memory is subjected to an error correction process according to the VICS information. DGPS stored in
2. The FM multiplex broadcast data receiving method according to claim 1, wherein the information is subjected to an error correction process according to the DGPS information. 3. A decoder for decoding FM multiplex broadcast data is provided in common for DGPS information and VICS information, and a common memory is provided for DGPS information and VICS information. The decoder includes VICS information and DGPS information. The information is stored in the memory in the order of reception, and the DGPS information is subjected to the horizontal error correction before the vertical error correction is performed on the information stored in the memory. 2. The FM multiplex broadcast data receiving method according to claim 1, wherein the data is stored. 4. An FM multiplex broadcast data receiving method for receiving DGPS information and VICS information respectively broadcast by FM multiplex from separate broadcast stations in a single receiver, wherein a decoder for decoding the FM multiplex broadcast data and a memory are provided with DGPS. One is provided in common for the information and the VICS information, and the frame synchronization timing of the FM multiplex broadcast data from the FM multiplex broadcast station that broadcasts the DGPS information is set in advance, and the FM multiplex broadcast station that broadcasts the VICS information is set. When receiving a predetermined time before the frame synchronization timing while receiving the information from the receiving station, the receiving station is switched to the FM multiplex broadcasting station that broadcasts the DGPS information, and the block synchronization of the VICS information is maintained. The block identification code is detected, and the decoder detects two blocks after the block identification code is detected. Is stored in the memory as DGPS information. After the DGPS information is stored, the receiving station is switched to the FM multiplex broadcasting station that broadcasts the VICS information, and the decoder converts the VICS information based on the block synchronization of the stored VICS information. A method for receiving FM multiplex broadcast data, comprising taking in and storing in a memory.