JPH1117304A - Printed wiring board carrying inductance - Google Patents
Printed wiring board carrying inductanceInfo
- Publication number
- JPH1117304A JPH1117304A JP9165895A JP16589597A JPH1117304A JP H1117304 A JPH1117304 A JP H1117304A JP 9165895 A JP9165895 A JP 9165895A JP 16589597 A JP16589597 A JP 16589597A JP H1117304 A JPH1117304 A JP H1117304A
- Authority
- JP
- Japan
- Prior art keywords
- inductance
- pattern
- printed wiring
- grid
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、インダクタンスを
形成した印刷配線基板に関し、更に詳しくは、電源やア
ースパターンにノイズや不要輻射を阻止するインダクタ
ンスを形成した印刷配線基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board having an inductance, and more particularly, to a printed wiring board having a power supply or a ground pattern formed with an inductance for preventing noise and unnecessary radiation.
【0002】[0002]
【従来の技術】印刷配線基板には半導体や電子部品に電
力を供給するための電源ラインを構成する電源パターン
やアースラインを構成するアースパターンが含まれてい
る。これらの電源パターンやアースパターンを装置全体
の共通回路にして使うと、各回路の電子デバイスで発生
したノイズを他の回路ブロックまで伝達してしまうと、
いった問題が生じていた。2. Description of the Related Art A printed wiring board includes a power supply pattern for forming a power supply line for supplying power to semiconductors and electronic components and an earth pattern for forming an earth line. If these power supply patterns and ground patterns are used as a common circuit for the entire device, if the noise generated by the electronic device of each circuit is transmitted to other circuit blocks,
Such a problem had arisen.
【0003】そのため、信号に載ったノイズが直接聴覚
に伝わるオーディオ装置等では、電源回路の最終段にあ
る平滑用のコンデンサから独立して各回路毎に電源パタ
ーンやアースパターンを引いたり、電源回路そのものを
各回路毎に独立に設ける等の手段を採っている。しか
し、印刷配線基板の電源パターンやアースパターンは通
称ベタパターンと称される連続した幅広のパターンで形
成されているので、この幅広のパターンを各回路ごとに
引くことは、印刷配線基板自体を大きくする要因とな
り、装置の小型化に適しない。For this reason, in an audio device or the like in which noise on a signal is directly transmitted to the auditory sense, a power supply pattern or a ground pattern is applied to each circuit independently of a smoothing capacitor at the last stage of the power supply circuit, Means are provided independently for each circuit. However, since the power supply pattern and the earth pattern of the printed wiring board are formed by a continuous wide pattern commonly called a solid pattern, drawing this wide pattern for each circuit makes the printed wiring board itself large. This is not suitable for downsizing the device.
【0004】[0004]
【発明が解決しようとする課題】従って、本発明が解決
しようとする課題は、各回路毎に電源パターンやアース
パターンを電源回路を各回路毎に設けることなく効果的
にノイズを阻止できる印刷配線基板を提供することであ
る。SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a printed wiring which can effectively prevent noise without providing a power supply pattern or a ground pattern for each circuit without providing a power supply circuit for each circuit. To provide a substrate.
【0005】[0005]
【課題を解決するための手段】上記課題を解決するため
に請求項1に係るインダクタンスを形成した印刷配線基
板は、基板上の電源ライン又はアースラインの途中に格
子状のパターンを形成した構成とし、ノイズを阻止す
る。According to a first aspect of the present invention, there is provided a printed wiring board on which an inductance is formed, wherein a grid-like pattern is formed in the middle of a power supply line or an earth line on the substrate. Blocks noise.
【0006】[0006]
【発明の実施の形態】以下、本発明の実施の形態を図面
を参照して説明する。図1は本発明に係るインダクタン
スを形成した印刷配線基板の一部平面図であり、フェノ
ール樹脂、ガラスエポキシ樹脂等から成る基板1の表面
に電気メッキ等により、導体パターン2を形成した印刷
配線基板を示す。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a partial plan view of a printed wiring board on which an inductance according to the present invention is formed. The printed wiring board has a conductive pattern 2 formed on a surface of a substrate 1 made of phenol resin, glass epoxy resin, or the like by electroplating or the like. Is shown.
【0007】そして、本発明では導体パターン2は電源
ラインやアースラインの一部とし、入出力端子部3a,
3bの間にインダクタンス成分を形成するべく格子状の
パターン4を設けたものである。この格子状のパターン
4は等価回路としては、図2のごとく各格子を構成する
辺にインダクタンスLを持ち、格子状の回路網を形成す
る。この格子状の回路網の合成インダクタンス値は大き
い値となり、高周波成分に対して大きいインピーダンス
となり不要輻射阻止に有効に作用する。In the present invention, the conductor pattern 2 is a part of a power supply line or a ground line, and the input / output terminal portions 3a,
A grid-like pattern 4 is provided between 3b to form an inductance component. The lattice-shaped pattern 4 has an inductance L on each side constituting each lattice as shown in FIG. 2 as an equivalent circuit, and forms a lattice-like circuit network. The composite inductance value of this lattice-like circuit network becomes a large value, becomes a large impedance with respect to a high frequency component, and effectively acts to prevent unnecessary radiation.
【0008】図3はIC等のデバイス5a,5bの電源
ライン6に格子状のパターン4を接続した応用例を示
し、デバイス5aは電源端子7aとアース端子8a間に
接続され、電源ライン6とアース9間にはデカップリン
グコンデンサ10aが接続されている。そして、格子状
のパターン4が電源ライン6の途中に挿入されている。
格子状のパターン4の合成インダクタンス成分は大きい
インピーダンスとなり、よって、直流成分に対しては低
いインピーダンスで高周波ノイズ成分に対しては、相対
的に高いインピーダンスとなる。このことは、従来のベ
タパターンの電源ラインのパターンより、高周波ノイズ
が伝わりにくい。デカップリングコンデンサ10a,1
0bは高周波成分に対しては低いインピーダンスとなる
ので、高周波成分をアースに逃がすように作用する。FIG. 3 shows an application example in which a grid-like pattern 4 is connected to power supply lines 6 of devices 5a and 5b such as ICs. The device 5a is connected between a power supply terminal 7a and a ground terminal 8a. A decoupling capacitor 10 a is connected between the grounds 9. The lattice pattern 4 is inserted in the middle of the power supply line 6.
The composite inductance component of the lattice pattern 4 has a large impedance, and therefore has a low impedance for the DC component and a relatively high impedance for the high-frequency noise component. This makes it difficult for high-frequency noise to be transmitted as compared with the conventional solid power supply line pattern. Decoupling capacitors 10a, 1
Since 0b has a low impedance with respect to the high-frequency component, it acts to release the high-frequency component to the ground.
【0009】図4,図5は本発明のインダクタンスを形
成した印刷配線基板の変形例の平面図であり、図4は図
1の実施の形態例の印刷配線基板の入出力端子3a,3
bを格子状のパターン4の対角線位置としたものであ
る。合成インダクタンス値は図1の印刷配線基板より、
大きくなる利点がある。FIGS. 4 and 5 are plan views of a modified example of the printed wiring board on which the inductance according to the present invention is formed. FIG. 4 is a view showing the input / output terminals 3a and 3 of the printed wiring board of the embodiment shown in FIG.
b is the diagonal position of the lattice pattern 4. The composite inductance value is based on the printed wiring board shown in FIG.
It has the advantage of being larger.
【0010】図5は格子状パターン4の外形を円形とし
たものであり、合成インダクタンス値は図4のものと、
同等な値が得られる。FIG. 5 shows a grid-shaped pattern 4 having a circular outer shape.
Equivalent values are obtained.
【0011】[0011]
【発明の効果】本発明のインダクタンスを形成した印刷
配線基板によれば、不要輻射を防止するために特別な部
品を実装する必要がなくなる。According to the printed wiring board having the inductance of the present invention, it is not necessary to mount a special component in order to prevent unnecessary radiation.
【図1】 本発明のインダクタンスを形成した印刷配線
基板の平面図。FIG. 1 is a plan view of a printed wiring board on which an inductance according to the present invention is formed.
【図2】 本発明のインダクタンスを形成した印刷配線
基板の格子状パターンの等価回路図。FIG. 2 is an equivalent circuit diagram of a lattice pattern of a printed wiring board on which an inductance according to the present invention is formed.
【図3】 本発明のインダクタンスを形成した印刷配線
基板の適用例を示す回路ブロック図。FIG. 3 is a circuit block diagram showing an application example of a printed wiring board having an inductance according to the present invention.
【図4】 本発明のインダクタンスを形成した印刷配線
基板の変形例の平面図。FIG. 4 is a plan view of a modified example of the printed wiring board on which the inductance of the present invention is formed.
【図5】 本発明のインダクタンスを形成した印刷配線
基板の他の変形例の平面図。FIG. 5 is a plan view of another modification of the printed wiring board on which the inductance of the present invention is formed.
【符号の説明】 1…基板、2…導体パターン、3a,3b…入出力端
子、4…格子状パターン、5a,5b…デバイス、6…
電源ライン、7a,7b…電源端子、8a,8b…アー
ス端子、9…アース、10a,10b…デカップリング
コンデンサ[Description of Signs] 1 ... substrate, 2 ... conductor pattern, 3a, 3b ... input / output terminal, 4 ... lattice pattern, 5a, 5b ... device, 6 ...
Power supply lines, 7a, 7b: power supply terminals, 8a, 8b: ground terminals, 9: ground, 10a, 10b: decoupling capacitors
Claims (2)
途中に格子状のパターンを形成したインダクタンスを形
成した印刷配線基板。1. A printed wiring board having an inductance in which a grid-like pattern is formed in the middle of a power supply line or an earth line on a substrate.
又はアースラインに接続する入出力端子を設け、 該入出力端子にデカップリングコンデンサを接続したこ
とを特徴とする請求項1に記載のインダクタンスを形成
した印刷配線基板。2. The inductance according to claim 1, wherein an input / output terminal connected to the power supply line or the ground line is provided on the grid-like pattern, and a decoupling capacitor is connected to the input / output terminal. Printed wiring board formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9165895A JPH1117304A (en) | 1997-06-23 | 1997-06-23 | Printed wiring board carrying inductance |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9165895A JPH1117304A (en) | 1997-06-23 | 1997-06-23 | Printed wiring board carrying inductance |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH1117304A true JPH1117304A (en) | 1999-01-22 |
Family
ID=15821025
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9165895A Pending JPH1117304A (en) | 1997-06-23 | 1997-06-23 | Printed wiring board carrying inductance |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH1117304A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7768103B2 (en) | 2005-07-12 | 2010-08-03 | Samsung Electronics Co., Ltd. | Tape distribution substrate having pattern for reducing EMI |
| KR101530288B1 (en) * | 2014-01-28 | 2015-06-19 | 대덕지디에스 주식회사 | Transparent circuit substrate, and method for manufacturing the same |
-
1997
- 1997-06-23 JP JP9165895A patent/JPH1117304A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7768103B2 (en) | 2005-07-12 | 2010-08-03 | Samsung Electronics Co., Ltd. | Tape distribution substrate having pattern for reducing EMI |
| KR101530288B1 (en) * | 2014-01-28 | 2015-06-19 | 대덕지디에스 주식회사 | Transparent circuit substrate, and method for manufacturing the same |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20070905 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080905 Year of fee payment: 11 |
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| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090905 Year of fee payment: 12 |
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| LAPS | Cancellation because of no payment of annual fees |