JPS57102067A - Manufacture of complementary type metal oxide semiconductor - Google Patents
Manufacture of complementary type metal oxide semiconductorInfo
- Publication number
- JPS57102067A JPS57102067A JP55178417A JP17841780A JPS57102067A JP S57102067 A JPS57102067 A JP S57102067A JP 55178417 A JP55178417 A JP 55178417A JP 17841780 A JP17841780 A JP 17841780A JP S57102067 A JPS57102067 A JP S57102067A
- Authority
- JP
- Japan
- Prior art keywords
- region
- manufacture
- regions
- metal oxide
- oxide semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To prevent the decrease of effective channel length by forming a source region and a drain region so that they are shallow near a channel region and are deep at a section parting from the channel region. CONSTITUTION:The source and drain regions in an N-MOSFET and a P- MOSFET are shaped shallowly near the channel regions. On the other hand, contact regions 50, 51, 50', 51' having deep diffusion depth, which reach a sapphire substrate 41, are formed under source electrodes 52, 52' and a drain electrode 53. Accordingly, the decrease of the effective channel length is prevented while wiring resistance is minimized and the operating property at high speed of an element is maintained, and leakage currents through a P<-> type substrate region are prevented.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55178417A JPS57102067A (en) | 1980-12-17 | 1980-12-17 | Manufacture of complementary type metal oxide semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55178417A JPS57102067A (en) | 1980-12-17 | 1980-12-17 | Manufacture of complementary type metal oxide semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57102067A true JPS57102067A (en) | 1982-06-24 |
Family
ID=16048126
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55178417A Pending JPS57102067A (en) | 1980-12-17 | 1980-12-17 | Manufacture of complementary type metal oxide semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57102067A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5463238A (en) * | 1992-02-25 | 1995-10-31 | Seiko Instruments Inc. | CMOS structure with parasitic channel prevention |
| FR2788883A1 (en) * | 1998-12-24 | 2000-07-28 | Mitsubishi Electric Corp | SEMICONDUCTOR DEVICE WITH A SILICON STRUCTURE ON INSULATION |
| US6337231B1 (en) | 1993-05-26 | 2002-01-08 | Semiconductor Energy Laboratory Co., Ltd. | Method for producing semiconductor device |
| US7087962B1 (en) * | 1991-12-24 | 2006-08-08 | Semiconductor Energy Laboratory Co., Ltd. | Method for forming a MOS transistor having lightly dopped drain regions and structure thereof |
| US7348227B1 (en) | 1995-03-23 | 2008-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
-
1980
- 1980-12-17 JP JP55178417A patent/JPS57102067A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7087962B1 (en) * | 1991-12-24 | 2006-08-08 | Semiconductor Energy Laboratory Co., Ltd. | Method for forming a MOS transistor having lightly dopped drain regions and structure thereof |
| US5463238A (en) * | 1992-02-25 | 1995-10-31 | Seiko Instruments Inc. | CMOS structure with parasitic channel prevention |
| US6337231B1 (en) | 1993-05-26 | 2002-01-08 | Semiconductor Energy Laboratory Co., Ltd. | Method for producing semiconductor device |
| US7348227B1 (en) | 1995-03-23 | 2008-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US7816195B2 (en) | 1995-03-23 | 2010-10-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US8574976B2 (en) | 1995-03-23 | 2013-11-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| FR2788883A1 (en) * | 1998-12-24 | 2000-07-28 | Mitsubishi Electric Corp | SEMICONDUCTOR DEVICE WITH A SILICON STRUCTURE ON INSULATION |
| US6953979B1 (en) | 1998-12-24 | 2005-10-11 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device, method of manufacturing same and method of designing same |
| US7303950B2 (en) | 1998-12-24 | 2007-12-04 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device, method of manufacturing same and method of designing same |
| US7741679B2 (en) | 1998-12-24 | 2010-06-22 | Renesas Technology Corp. | Semiconductor device, method of manufacturing same and method of designing same |
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