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JPS57103355A - Mos semiconductor device - Google Patents

Mos semiconductor device

Info

Publication number
JPS57103355A
JPS57103355A JP55178862A JP17886280A JPS57103355A JP S57103355 A JPS57103355 A JP S57103355A JP 55178862 A JP55178862 A JP 55178862A JP 17886280 A JP17886280 A JP 17886280A JP S57103355 A JPS57103355 A JP S57103355A
Authority
JP
Japan
Prior art keywords
substrate
current
fet
drain
back surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55178862A
Other languages
Japanese (ja)
Inventor
Hideshi Ito
Shigeo Otaka
Mitsuo Ito
Kyoichi Takagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55178862A priority Critical patent/JPS57103355A/en
Publication of JPS57103355A publication Critical patent/JPS57103355A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the current between a substrate and a drain smaller than a channel current in an FET having a high resistance drain region, by interposing a Schottky barrier or reverse conductive type layer between the back surface electrode connected to the source and the substrate. CONSTITUTION:In an N-channel FET used, for example, for the output circuit of a pulse width modulation PWM type, a Ti film 11 forming a Schottky barrier (SB) is formed, for example, between the substrate 1 and an electrode 10 formed on the back surface of the substrate. (In case of P-channel FET, a W film is formed.) Or, an N type layer 12 is formed on the back surface of the substrate to form a P-N junction J1. Thus, when the source and drain are reversely biased therebetween, a current Insub flowing from the electrode 10 through the substrate to the drain can be eliminated at the SB or J1 to be ignored with respect to the channel current Inmos. Thus, an FET adapated for the PWM can be provided.
JP55178862A 1980-12-19 1980-12-19 Mos semiconductor device Pending JPS57103355A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55178862A JPS57103355A (en) 1980-12-19 1980-12-19 Mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55178862A JPS57103355A (en) 1980-12-19 1980-12-19 Mos semiconductor device

Publications (1)

Publication Number Publication Date
JPS57103355A true JPS57103355A (en) 1982-06-26

Family

ID=16055978

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55178862A Pending JPS57103355A (en) 1980-12-19 1980-12-19 Mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS57103355A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5086324A (en) * 1988-07-11 1992-02-04 Mitsubishi Denki Kabushiki Kaisha Insulated gate bipolar transistor
US5171696A (en) * 1988-11-07 1992-12-15 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and method of manufacturing the same
US5512769A (en) * 1992-05-25 1996-04-30 Matsushita Electronics Corporation High breakdown voltage semiconductor device and method of fabricating the same
CN102668348A (en) * 2010-10-29 2012-09-12 松下电器产业株式会社 Converter
US8693226B2 (en) 2010-10-29 2014-04-08 Panasonic Corporation Synchronous rectification type inverter

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5086324A (en) * 1988-07-11 1992-02-04 Mitsubishi Denki Kabushiki Kaisha Insulated gate bipolar transistor
US5171696A (en) * 1988-11-07 1992-12-15 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and method of manufacturing the same
US5512769A (en) * 1992-05-25 1996-04-30 Matsushita Electronics Corporation High breakdown voltage semiconductor device and method of fabricating the same
CN102668348A (en) * 2010-10-29 2012-09-12 松下电器产业株式会社 Converter
EP2493061A4 (en) * 2010-10-29 2013-11-06 Panasonic Corp CONVERTER
US8693226B2 (en) 2010-10-29 2014-04-08 Panasonic Corporation Synchronous rectification type inverter

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