JPS57130150A - Register control system - Google Patents
Register control systemInfo
- Publication number
- JPS57130150A JPS57130150A JP1472381A JP1472381A JPS57130150A JP S57130150 A JPS57130150 A JP S57130150A JP 1472381 A JP1472381 A JP 1472381A JP 1472381 A JP1472381 A JP 1472381A JP S57130150 A JPS57130150 A JP S57130150A
- Authority
- JP
- Japan
- Prior art keywords
- register
- cycle
- operation result
- control
- reg1
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
Abstract
PURPOSE:To obtain a control system where the instruction execution time is shortened, by reading and writing data to and from a general register in the first half and the latter of the same operation cycle respectively. CONSTITUTION:In respect to a means which writes the operation result of a preceding instruction to a general register and reads a succeeding instruction in the indexing cycle in the same operation cycle, the operation result of the preceding instruction is stored from an operating circuit ALU to an operation result storage buffer register RBR when the operation execution cycle is terminated. Next, contents of the register RBR are written to a register REG1 through a bus PB in the latter half of the operation result write cycle, and a general register write control signal Wt is transmitted from a control circuit CTL to the register REG1 to control the write. In the indexing cycle, a general register read control signal Rt is sent from the control circuit CTL to the register REG1 to tead control data from the register REG1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1472381A JPS57130150A (en) | 1981-02-03 | 1981-02-03 | Register control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1472381A JPS57130150A (en) | 1981-02-03 | 1981-02-03 | Register control system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57130150A true JPS57130150A (en) | 1982-08-12 |
Family
ID=11869045
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1472381A Pending JPS57130150A (en) | 1981-02-03 | 1981-02-03 | Register control system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57130150A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5979355A (en) * | 1982-10-29 | 1984-05-08 | Toshiba Corp | Arithmetic control system |
| JPS5979357A (en) * | 1982-10-29 | 1984-05-08 | Toshiba Corp | Arithmetic control system |
| JPS5979356A (en) * | 1982-10-29 | 1984-05-08 | Toshiba Corp | Arithmetic control system |
| JPS63193237A (en) * | 1987-02-06 | 1988-08-10 | Toshiba Corp | Semiconductor integrated circuit device |
| JPH03116233A (en) * | 1989-05-24 | 1991-05-17 | Tandem Comput Inc | System and method for processing instruc- tion of data processor |
| JPH03201031A (en) * | 1989-12-28 | 1991-09-02 | Koufu Nippon Denki Kk | Information processor |
-
1981
- 1981-02-03 JP JP1472381A patent/JPS57130150A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5979355A (en) * | 1982-10-29 | 1984-05-08 | Toshiba Corp | Arithmetic control system |
| JPS5979357A (en) * | 1982-10-29 | 1984-05-08 | Toshiba Corp | Arithmetic control system |
| JPS5979356A (en) * | 1982-10-29 | 1984-05-08 | Toshiba Corp | Arithmetic control system |
| JPS63193237A (en) * | 1987-02-06 | 1988-08-10 | Toshiba Corp | Semiconductor integrated circuit device |
| JPH03116233A (en) * | 1989-05-24 | 1991-05-17 | Tandem Comput Inc | System and method for processing instruc- tion of data processor |
| JPH03201031A (en) * | 1989-12-28 | 1991-09-02 | Koufu Nippon Denki Kk | Information processor |
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