JPS5728362A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5728362A JPS5728362A JP10419780A JP10419780A JPS5728362A JP S5728362 A JPS5728362 A JP S5728362A JP 10419780 A JP10419780 A JP 10419780A JP 10419780 A JP10419780 A JP 10419780A JP S5728362 A JPS5728362 A JP S5728362A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- region
- type
- diffused
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 4
- 230000003321 amplification Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000003199 nucleic acid amplification method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
- H10D48/30—Devices controlled by electric currents or voltages
- H10D48/32—Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H10D48/34—Bipolar devices
- H10D48/345—Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions
Landscapes
- Bipolar Transistors (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
PURPOSE:To improve the current limiting function of transistors, by forming a diffused resistor in a separated region neighboring to the region in which an element of an epitaxial layer is formed by a base process, and connecting an emitter region and an emitter electrode provided on a substrate. CONSTITUTION:A P<-> type epitaxial layer 111 is provided on a low-resistance P type wafer 110 to obtain a substrate 11. An N type expitaxial layer 13 is formed on the substrate 11, and an NPN transistor is provided in a separated region in which 2 buried layer 12 is formed. When a base 17 of the element is diffused, a P type layer 19 is formed on an N type epitaxial layer 15 separated by a P<+> type diffused layer 16 neighboring to the element forming region so that one end 21 of the layer 19 contacts with the diffused layer 16, and the other end of the layer 19 is connected with an emitter region 18 through a wiring 20. Also, on the rear face of the substrate 11, and emitter electrode 26 is provided. Therefore, a transistor having a high emitter resistance of the summed resistances of the diffused layer 19 and the P<-> type epitaxial layer 111 can be formed, and the DC amplification rate in a large current region can be lowered rapidly.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10419780A JPS5728362A (en) | 1980-07-28 | 1980-07-28 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10419780A JPS5728362A (en) | 1980-07-28 | 1980-07-28 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5728362A true JPS5728362A (en) | 1982-02-16 |
| JPH0132665B2 JPH0132665B2 (en) | 1989-07-10 |
Family
ID=14374245
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10419780A Granted JPS5728362A (en) | 1980-07-28 | 1980-07-28 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5728362A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08125132A (en) * | 1994-10-28 | 1996-05-17 | Rohm Co Ltd | Semiconductor device |
| JP2006295073A (en) * | 2005-04-14 | 2006-10-26 | Mitsubishi Electric Corp | Semiconductor device and manufacturing method thereof |
| US7986018B2 (en) | 2006-10-23 | 2011-07-26 | Sony Corporation | Solid-state imaging device |
-
1980
- 1980-07-28 JP JP10419780A patent/JPS5728362A/en active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08125132A (en) * | 1994-10-28 | 1996-05-17 | Rohm Co Ltd | Semiconductor device |
| JP2006295073A (en) * | 2005-04-14 | 2006-10-26 | Mitsubishi Electric Corp | Semiconductor device and manufacturing method thereof |
| US7986018B2 (en) | 2006-10-23 | 2011-07-26 | Sony Corporation | Solid-state imaging device |
| US8969987B2 (en) | 2006-10-23 | 2015-03-03 | Sony Corporation | Solid-state imaging device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0132665B2 (en) | 1989-07-10 |
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