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JPS5769517A - Digital signal modulation and demodulation system - Google Patents

Digital signal modulation and demodulation system

Info

Publication number
JPS5769517A
JPS5769517A JP55145320A JP14532080A JPS5769517A JP S5769517 A JPS5769517 A JP S5769517A JP 55145320 A JP55145320 A JP 55145320A JP 14532080 A JP14532080 A JP 14532080A JP S5769517 A JPS5769517 A JP S5769517A
Authority
JP
Japan
Prior art keywords
series
circuit
bit
codes
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55145320A
Other languages
Japanese (ja)
Inventor
Masayoshi Kamo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55145320A priority Critical patent/JPS5769517A/en
Publication of JPS5769517A publication Critical patent/JPS5769517A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To achieve high-density recording by the digital signal modulation-demodulation system by modulating 4-bit codes into 8-bit codes and then performing demodulation. CONSTITUTION:A timing generator circuit 4 receives a clock 1 to output a control signal 5, data 3 inputted to a parallel-series data converting circuit 2 in series is sent to ROMs 8 and 9 by four bits each, and memory information containing 8-bit modulation codes is sent to a corrected 8-bit modulation code circuit 13. The modulation code circuit 13, after converting the codes, output series codes after 8-bit conversion to a parallel-series converting circuit 16. A demodulated signal is inputted to a series-parallel data converting circuit 20 via an input signal line 19 and a prescribed clock is generated to send an 8-bit modulation code split timing and a clock signal to a data converting circuit 20. Then, demodulated data is outputted through a data block selecting circuit 32 and a parallel-series code converting circuit 34. Thus, high-density recording is achieved.
JP55145320A 1980-10-17 1980-10-17 Digital signal modulation and demodulation system Pending JPS5769517A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55145320A JPS5769517A (en) 1980-10-17 1980-10-17 Digital signal modulation and demodulation system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55145320A JPS5769517A (en) 1980-10-17 1980-10-17 Digital signal modulation and demodulation system

Publications (1)

Publication Number Publication Date
JPS5769517A true JPS5769517A (en) 1982-04-28

Family

ID=15382427

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55145320A Pending JPS5769517A (en) 1980-10-17 1980-10-17 Digital signal modulation and demodulation system

Country Status (1)

Country Link
JP (1) JPS5769517A (en)

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