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JPS58128722A - Semiconductor wafer - Google Patents

Semiconductor wafer

Info

Publication number
JPS58128722A
JPS58128722A JP57011370A JP1137082A JPS58128722A JP S58128722 A JPS58128722 A JP S58128722A JP 57011370 A JP57011370 A JP 57011370A JP 1137082 A JP1137082 A JP 1137082A JP S58128722 A JPS58128722 A JP S58128722A
Authority
JP
Japan
Prior art keywords
pellets
pellet
electrical characteristics
semiconductor wafer
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57011370A
Other languages
Japanese (ja)
Inventor
Yoshio Shibata
柴田 芳男
Shigeru Santo
山藤 滋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57011370A priority Critical patent/JPS58128722A/en
Publication of JPS58128722A publication Critical patent/JPS58128722A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448Located on chip prior to dicing and remaining on chip after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To easily select a plurality of pellets having electrical characteristics substantially equal to each other in a semiconductor wafer having a multiplicity of pellets, by marking the pellts with sumbols different from each other. CONSTITUTION:After electrical characteristics of pellets 3 on a semiconductor substrate 1 are measured, the substrate 1 is cut along scribe lines 2 to separate the pellets 3 from each other. The pellets 3 are previously marked with numerals 4 different from each other, and the electrical characteristics of the respective pellets 3 are stored in a computer correspondingly to the numerals 4. This greatly facilitates the selection of pellets having characteristics approximate to each other. Therefore, it is extremely advantageous in manufacture of a device requiring a plurality of pellets substantially equal in characteristics to each other.

Description

【発明の詳細な説明】 本発明は半導体ウニへKin、特にプレーナ構造を有す
る半導体集積回路用ベレットに関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit pellet, particularly to a semiconductor integrated circuit pellet having a planar structure.

差動増幅用トランジスタや高出力用トランジスタ等にお
いては、その内部には複数個のベレットが塔載されてい
るが、これらの搭載ベレットの電気的特性はほぼ同一の
ものになっている必要がある場合がある。しかし、従来
では、半導体ウェハと呼ばれる半導体基板上に製造され
た多数のベレットを、スクライプと呼ばれる分離工程で
個々に分離する前に、電気的特性を測定してそれが良品
か不良品かの判定を行ない、もし良品と判定され九ペレ
ットについてはそのままの状態にしておくが、不良品と
判定され九ペレッ)Kついてはこのベレット上にキズや
色をつ社たりして使用できないようにしておく、シかし
、この橡な従来の方法で線、個々のベレットの電気的特
性が何ら記録に残されているわけではないので一つのベ
レットと電気的特性が最も近い他のベレットを半導体ウ
ェハ内の任意の位置にあるベレットから選び出す仁とは
できない、し九がって、従来では、半導体ウェハ内の一
つのベレットに隣りあっているもう一つのベレットある
いはごく近傍のもう一つのベレットから選び出し、それ
らを使用して前記差−動幅用トランジスタあるいは高出
力トランジスタに使用している。しかし、この場合、使
用し九複数個のベレットの電気的特性がほぼ同一かどう
かはまり九〈の不明であり、トランジスタの組立て後に
電気的特性を測定して始めて、電気的特性が亙いに近い
ペレットを使用し良かどうかが判明し、もし使用し九複
数個のペレットの特性が不揃いであれば、トランジスタ
の特性としては不嵐と判定され廃秦しなければならない
Differential amplification transistors, high-power transistors, etc. have multiple pellets mounted inside them, but the electrical characteristics of these mounted pellets must be almost the same. There are cases. However, in the past, before separating a large number of pellets manufactured on a semiconductor substrate called a semiconductor wafer into individual pellets in a separation process called scribing, the electrical characteristics were measured to determine whether the pellets were good or defective. If the pellet is determined to be good, leave it as it is, but if it is determined to be defective and leave the pellet in the same state, if it is determined to be defective, leave scratches or color on the pellet so that it cannot be used. However, since no records of the electrical characteristics of individual pellets are kept in this sloppy conventional method, one pellet is compared to another pellet with the closest electrical properties to the other pellet within the semiconductor wafer. It is not possible to select a grain from a pellet located at an arbitrary position. Therefore, in the past, one pellet in a semiconductor wafer is selected from another pellet adjacent to it or from another pellet in the immediate vicinity. is used for the differential width transistor or high output transistor. However, in this case, it is unclear whether the electrical characteristics of the multiple pellets used are almost the same, and it is difficult to determine whether the electrical characteristics are very similar until the electrical characteristics are measured after the transistor is assembled. It is determined whether pellets can be used or not, and if the characteristics of the nine or more pellets used are uneven, the characteristics of the transistor are determined to be poor and must be scrapped.

本発明の目的は、電気的特性がほぼ同−OSSを持り九
複数個のペレットを容易に得る仁とO出来る半導体ウェ
ハを提供する仁とにあゐ。
It is an object of the present invention to provide a method for easily obtaining a plurality of pellets having approximately the same electrical characteristics and OSS, and a method for providing a semiconductor wafer that can be manufactured using a semiconductor wafer.

本発明は、多数のペレットを有する半導体クエハにおい
てそれぞれのペレットに互いに異なる数字1文字あるい
は記号を施していることを特徴とする半導体ウェハにあ
ゐ。
The present invention relates to a semiconductor wafer having a large number of pellets, in which each pellet is provided with a different number, letter, or symbol.

本発明を図面を参照して詳細に説明する。The present invention will be explained in detail with reference to the drawings.

第1図は本発v4の実施例を示した平面図であ妙、lは
半導体ウェハあるいはクエハースと呼ばれる半導体基板
であり、前記半導体基板1の上にはペレット3と呼ばれ
る多数の半導体素子が製造される。2はスクライブ線と
呼ばれ、個々にペレット3を分離するための半導体基板
の分離境界線である。それぞれのペレットは、半導体ウ
ェハ上で電気的特性を測定されたあと、レーザービーム
やダイヤ篭/ドカッター勢により、スクライプ線上を切
断され、個々の独立したペレットとして分離される。4
Fi半導体ウェハ上のそれぞれのペレットに設けられ九
互いに異なり丸数字であり、前記それぞれのペレットに
しるされ丸数字と対応がつく橡に、それぞれのペレット
の電気的特性がコンビ凰−タ勢に蓄積される。
Fig. 1 is a plan view showing an embodiment of the present invention v4.L is a semiconductor substrate called a semiconductor wafer or quefer, and a large number of semiconductor elements called pellets 3 are manufactured on the semiconductor substrate 1. be done. Reference numeral 2 is called a scribe line, which is a separation boundary line of the semiconductor substrate for separating the pellets 3 individually. After the electrical characteristics of each pellet are measured on a semiconductor wafer, the pellets are cut along a scribe line using a laser beam or a diamond cage/cutter to separate them into individual pellets. 4
Each pellet on the Fi semiconductor wafer is provided with a 9 different round numbers, and the electrical characteristics of each pellet are stored in the combinatorial box in the squares marked on each pellet and corresponding to the round numbers. be done.

本発−を実施することにより、¥導体ウェハ上Oそれぞ
れOベレットのうち電気的特性が近いもの同志を選び出
す場合、任意の位置にあゐペレットから選ぶことが出来
、これらのペレットは特性的にほぼ一一であるため、差
動動幅用トランジスタ、あるいは高出力トランジスタな
ど1個のケース内に互いに%性の近い複数個のペレット
が必要なところに利用出来る。従って、従来方法の様に
1単Kll抄合ったペレットとかごく近傍のペレットを
使用して組立てたトランジスタより、特性的にはすぐれ
たトランジスタが出来る。
By carrying out the present invention, when selecting pellets with similar electrical characteristics from each O pellet on a conductor wafer, it is possible to select pellets located at arbitrary positions, and these pellets have characteristics. Since it is approximately 11, it can be used where multiple pellets with similar percentages are required in one case, such as differential width transistors or high output transistors. Therefore, a transistor with better characteristics can be produced than a transistor assembled using pellets made by combining one single Kll or pellets that are very close to each other as in the conventional method.

本発明の実施例の半導体ウェハは次のように製造される
ことが好ましい。
The semiconductor wafer of the embodiment of the present invention is preferably manufactured as follows.

(1)半導体ウェハのそれぞれのペレットに必要な回路
機能が形成されるとともに、互いに異なる数字、例えば
1.2.3.4.5等が各ベレッ)K施こされる。
(1) Necessary circuit functions are formed on each pellet of the semiconductor wafer, and different numbers, such as 1, 2, 3, 4, 5, etc., are applied to each pellet.

(2)それぞれのペレットの電気的特性を測定し、この
測定したデータと前記数字とを対比させて配憶装置等に
記憶しておく。
(2) Measure the electrical characteristics of each pellet, compare the measured data with the numbers, and store them in a storage device or the like.

(3)それぞれのペレットをスクライブ線に沿りて個々
に分離する。
(3) Separate each pellet individually along the scribe line.

(4)配憶装置に記憶した個々のペレットの特性を照合
させ、互いに近い関係にある複数のペレットの数字を出
力させる6個々のペレットにはこの数字が施こされてい
るから、見い出すのは極めて容易となる。
(4) Compare the characteristics of individual pellets stored in the storage device and output the numbers of multiple pellets that are closely related to each other 6. Since these numbers are applied to each pellet, it is possible to find out It becomes extremely easy.

女お、本発明の実施例では、半導体ウエノ・上のそれぞ
れのペレットには互いに異なる数字をしるしたが、数字
の他に文字あるいは記号等をしるしてもよい。
In the embodiment of the present invention, different numbers are marked on each of the pellets on the semiconductor wafer, but letters or symbols may be marked in addition to numbers.

以上のように、本発明によれば、互いに電気的特性の近
いペレットをそろえることが極めて容易となる。
As described above, according to the present invention, it is extremely easy to arrange pellets having similar electrical characteristics to each other.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の詳細な説明するための半導体基板を示
す平面図である。尚、図において、1は半導体基板、2
はスクライプ線、3はペレット、4はペレット上にしる
された数字をそれぞれ示す。
FIG. 1 is a plan view showing a semiconductor substrate for explaining the present invention in detail. In the figure, 1 is a semiconductor substrate, 2 is a semiconductor substrate, and 2 is a semiconductor substrate.
indicates the scribe line, 3 indicates the pellet, and 4 indicates the number written on the pellet.

Claims (1)

【特許請求の範囲】[Claims] 多数のベレットを有する半導体ウニ八において、前記そ
れぞれのベレットに亙いに異なる数字、文字あるいは記
号を施していることを特徴とする半導体ウェハ。
1. A semiconductor wafer comprising a semiconductor wafer having a large number of pellets, each of which is provided with different numbers, letters, or symbols.
JP57011370A 1982-01-27 1982-01-27 Semiconductor wafer Pending JPS58128722A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57011370A JPS58128722A (en) 1982-01-27 1982-01-27 Semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57011370A JPS58128722A (en) 1982-01-27 1982-01-27 Semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS58128722A true JPS58128722A (en) 1983-08-01

Family

ID=11776122

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57011370A Pending JPS58128722A (en) 1982-01-27 1982-01-27 Semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS58128722A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH039235U (en) * 1989-06-13 1991-01-29

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH039235U (en) * 1989-06-13 1991-01-29

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