JPS582019A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device in which a wafer alignment mark used when aligning a wafer to an exposure device in a photolithography process is improved.

In recent years, as the integration of LSIs has progressed, alignment of the mask and wafer in the photolithography process, which is one of the manufacturing processes, has become extremely important! There are many.

For example, as shown in FIG. 1, source and drain regions 2 and 3 of a <pm semiconductor substrate 7Kn+ type are provided electrically separated from each other, and these source and drain regions 2 and 3 are electrically separated from each other. An f-to electrode 5 is provided on the channel region between the drain regions 2 and 3 via an insulating film 4, and further covers the entire [C interlayer insulating film 6 and the core of the insulating film 6.

In an MO8 type transistor having a structure in which a drain extraction wiring 8 connected to a drain region S via a contact hole 7 is provided, c-) an electrode J and a contact hole r;
This is very important in terms of miniaturization of the isoline L81. That is, it is necessary to prevent the dirt electrode 5 and the contact hole 7 from coming into contact with each other so that the dirt electrode 5 and the drain region 3 do not short-circuit. Therefore, it is necessary to leave a distance A between the dirt electrode 5 and the contact hole 1.
When aligning the mask for forming contact hole 1 with dirt electrode 5, even if contact hole 1 is misaligned, f
-) The distance A needs to be sufficiently large so that the electrode 5 and the contact hole 1 do not come into contact with each other and cause a short circuit between the date and the drain. However, if the alignment accuracy is not good as described above, the distance A becomes large, which becomes an obstacle to LSI integration.

By the way, a conventional method for aligning wafers will be explained using a step-and-repeat type exposure apparatus shown in FIG. 2 as an example. That is, 11 in the figure is a wafer cha that can be rotated by a motor or the like.

This is a stage that holds a truck 12 and is movable in the x, y, and y directions. A lens barrel 13 containing a built-in optical system for reducing the main turn of the mask is disposed above the stage l1, and a lens barrel 13 is provided at the upper edge of the lens barrel 13 for alignment with alignment marks on the mask. Two marks 14* and 14b are attached □.

Further, a light source 1 is placed directly above the lens barrel 3 at a predetermined distance.
5 is provided. Furthermore, an alignment mechanism 16 is attached to the side surface of the lens barrel 3.

This alignment mechanism 16 includes a main body 17 attached to the side surface of the lens barrel 3, and marks 18m and 18 attached near the bottom of the main body 17 for alignment with the alignment marks of Ueno.
b, and microscopes 19m and 19b, which are provided on the main body J7 and are used to observe the comparison between the alignment mark on the wafer and the marks 18m and 18b.

In addition, in such an alignment mechanism 16, the mark Illm, 18b inside the main body 7 and the microscope 19a.

A no-fu mirror (not shown) is interposed between 19b,
In some cases, an alignment monitor 20 is provided for observing the comparison between the wafer alignment mark and the marks 18m and 1lb through this no-f mirror. Furthermore, marks 2 J and J J' are attached to the side surface of the stage 1l and the side surface of the lens barrel 13, respectively, for aligning the stage 11 and the barrel 3 in the Y direction.

However, a method of aligning and exposing the film using the above-mentioned reduction projection type exposure apparatus of the Stezzo-and-repeat method will be described below.

First, a mask 22 having the desired nine turns,
The alignment mark JJm attached to the mask 12, 23
Marks 14m and 14 b are attached to the upper edge of the lens barrel 13.
b to match the lens barrel 13. In this alignment operation, in the reduction projection exposure system, the nine turns of the mask 22 are reduced, and the misalignment between the mask 22 and the lens barrel 13 is also reduced, so the slight misalignment between the mask 22 and the lens barrel 3 is almost eliminated. It's not a problem. Next, the wafer holder 24 was installed in the wafer holder 12. Look, lens barrel 13
The marks 18m and 18b on the main body 11 are passed through the microscope 919m and 19b of the alignment mechanism 16 attached to the urchin/-2.
Either move the wafer 24 so that the alignment marks 25 and 25b attached to the wafers 4 and 4 match, or use the alignment monitor 20 to align the marks 18a and 18b on the main body 17.
Then, the wafer 24 is moved so that the alignment marks 25m and 25b on the wafer 24 are aligned. By comparing the marks IJia, 1llb of the alignment mechanism 16 with the alignment marks 25m, :16b of the wafer 24, it is found that the alignment mechanism 16 is fixed to the lens barrel 13, so that the wafer 24 is relative to the lens barrel 13. In other words, mask 22
It will be adjusted to After the alignment of the wafer 24 is completed, the stay 5) 11 is moved in the Y direction along a rail (not shown), and the alignment operation is performed so that the wafer 24 is positioned directly below the lens barrel 13 as shown by the imaginary line in FIG. Do the following.

The matching number J in the Y direction of this stage II and the lens barrel 13, the mark 21 with the stage 11 and the lens barrel 1BK, j
1' and align automatically with a laser interferometer. Next, step and repeat the wafer 24 along with the stage 11 in the X and Y directions, and for each step, the light source 15 irradiates the mask 22 with light, and the nine turns of the mask are transferred to the lens barrel 1.
3, the wafer 24 is reduced as shown in FIG.
The pattern is repeatedly transferred to the upper predetermined area 26. After the exposure is completed, the stage 11 is returned to its original position (the position where the wafer 24 was aligned) and replaced with the next wafer. - However, the fog light method described above has the following problem in terms of alignment of the wafer 24 and the optical system (alignment mechanism 16).

The alignment marks 26m and 25b on the wafer 24 cannot be too small for the purpose of increasing alignment accuracy, and for example, 4 alignment marks of about 130 μm x 130 μm are used. In addition, this alignment mark is usually attached to the center of the wafer 24 at a predetermined interval B, and the chip pattern on this wafer 24 portion must be excluded. There was a problem that the production efficiency of LSI decreased. This means that when the chip patterns on alignment marks 25m and 25b overlap,
The marks 25m and 25b are identification 1. This is because it becomes difficult and the alignment accuracy decreases. These problems occur not only during manual alignment, but also during automatic alignment.

Furthermore, even if the chip pattern is not formed on the alignment marks 25m and 25b-E of 9172240, the alignment mark 25 is formed by etching the oxide film 26 on the groove 24 as shown in FIG. Membrane; j7.2
When g is deposited (a film 28 of a substance that is easily melted is deposited), the step of the mark 25 disappears, and 1-
This makes it difficult to detect 21i. To avoid this,
The various films 27 and 28 on the mark 25 must be selectively removed, which complicates the alignment operation and reduces the productivity of the semiconductor device.

Another method is to form a new alignment mark at the second and subsequent times as well as forming the chip pattern. There are generally two methods for forming the alignment mark: a method in which the alignment mark is placed within the chip pattern, and a method in which the alignment mark is formed in a wafer area other than the chip pattern. In the former method, alignment marks are placed in each chip pattern, which imposes large restrictions on the reduction of the chip pattern and, ultimately, on the design of the LSI/# turn. Although the latter method eliminates the need to put marks into the chip, it requires a separate mask dedicated to alignment marks, which has the disadvantage of complicating the exposure apparatus and making operations more complicated.

The present invention was developed in view of the above circumstances, and by forming alignment marks made of radioactive material on a wafer,
When aligning the wafer with the non-light device during the exposure process, even if various coatings are deposited on the alignment mark, the mark can be detected with high resolution, and the process of removing the various coatings on the mark is also possible. The purpose of this invention is to provide a method that can solve the problems and manufacture semiconductor devices with high productivity.

That is, the present invention is characterized in that an alignment mark made of radioactive material is formed on the wafer, and this mark is used to align the wafer with semiconductor manufacturing equipment or testing equipment to process or evaluate the wafer. be.

Examples of the radioactive substance in the present invention include americium, which emits alpha rays, or radium, which emits beta rays and gamma rays. Uranium, thorium, etc. can be used. Especially when using materials such as americium that emit alpha rays, the alpha rays are 20μm.
Although it passes through a film with a thickness of 100 mL, it quickly attenuates in substances and air, which is beneficial from the standpoint of safety and prevention of damage to wafers (including devices). Furthermore, in the present invention of semiconductors, the law of: t=in radioactivity can be adopted for the wafer. The depth of the alignment mark thus formed is the ion implantation depth)
When manufacturing semiconductor devices from wafers, the wafer itself is rarely processed, but taking into account that the convex surface is eaten away by oxide film formation and oxide film removal, etc.
It is desirable that the thickness be 1 μm@degrees.

Next, embodiments of the present invention will be explained.

EXAMPLE Ions were implanted onto a 4-inch wafer 24 with a thickness of 400 μm by scanning a finely focused americium beam to form cross-shaped alignment marks 30 m and 30 b made of americium with dimensions of 100 μm×100 μm and a depth of 1 μm.

In this case, alignment marks may be formed by selectively ion-implanting americium into the wafer using the resist arm turn as a mask.

Next, the wafer 24 having the alignment marks 30m and 30b is placed on the wafer chuck 12 of the exposure apparatus shown in FIG.
The alignment mechanism 16 is used to detect the radiation (X-rays) emitted from the alignment marks 80 m and 30b of the wafer 24 and compare it with the marks 18 m and 18 b of the mechanism 16 to align the wafer 24 i. Let's do it. After the alignment of the wafer 24 is completed, the stage 11 is moved in the Y direction along a rail (not shown) and aligned so that the wafer 24 is positioned directly below the lens barrel 13 as shown by the imaginary line in FIG. Perform the operation. Subsequently, the wafer 24 is steered in the X and Y directions together with the stage 11, and in each step, the light source 15 irradiates the mask 22 with light and the mask/P turn is reduced by the lock cylinder ZS. 2
The chip pattern is repeatedly transferred to a predetermined area on the substrate 4 and exposed.

In the exposure process of the semiconductor device described above, the alignment mark 30m made of t-S emitter such as americium is formed on the wafer 24.

The alignment mark 30a is used to align the weno 24 by detecting radiation from the alignment mark 30b.

Even if a chip pattern is formed on the wafer 30b or various types of coatings are deposited, the positions of the alignment marks 30m and 30b can be detected regardless of their presence, and the wafer 1 can be aligned with high precision. Furthermore, the wafers can be aligned with high precision since a sufficiently large alignment mark can be formed on the wafer 1 without reducing the number of chips on the wafer 1 or increasing the area of the chips. Therefore, it is possible to eliminate the gap in the alignment mark area as in the past, and eliminate the need for the process of selectively removing the grainy film coated on the mark, resulting in improved wafer yield. By choosing quality over low cost and mass production, it is possible to emit radiation with short wavelengths.

It has high resolution and can further improve alignment accuracy.

In the above embodiment, alignment marks 30m made of a radioactive material and alignment marks 30m' and 30b' made of a material 30b may be formed on the upper surface of the tube 24. With this structure, it is possible to prevent damage to the elements on the surface of the wafer 24 due to radiation from the alignment marks 30a' and 30b'. Furthermore, it is possible to incorporate a sensor for detecting the alignment marks 30m' and 30b' of the wafer 240 into the stage itself on which the wafer 24 is placed.
According to such a structure, the elements on the surface of the wafer 24 are not damaged by the radiation from the alignment marks 30m' and 30b'', similar to the case where the marks are provided on the back side of the wafer. However, it is desirable to select a location where marks will be formed on the side surface of the wafer 24 where they will ultimately be removed by polishing.

In the above embodiment, an exposure method (photo-etching process) using a reduction projection type step-and-repeat type exposure apparatus has been described, but the present invention can be similarly applied to photo-etching using other exposure apparatuses.

The alignment of the wafers in the manufacturing process of the semiconductor device according to the present invention is described in the above-mentioned photograph.In addition to the etching process, trimming with a laser beam, and the glow pattern for evaluating wafer characteristics.
This also applies to alignment with cards and die-cutting of wafers, so when aligning the wafer with the exposure equipment in the exposure process, a portion of the TignoLean may overlap the alignment mark, and various problems may occur. It is possible to detect the same mark with high resolution even if a film has been deposited on it, which in turn makes effective use of wafers and eliminates the process of removing various films on the mark, allowing semiconductor devices to be manufactured at low cost and in one production. Has a remarkable effect.

[Brief explanation of drawings]

Fig. 1 is a cross-sectional view of the main parts of the MO8) transistor, Fig. 2 is a perspective view showing a set of reduced projection type step-and-repeat exposure equipment, and Fig. 3 is a step on a wafer using the exposure equipment shown in Fig. 2. A schematic perspective view showing the and-repeat exposure process,
FIG. 4 is a sectional view of the vicinity of alignment marks formed on a conventional wafer, FIG. 5 is a perspective view of a wafer used in the manufacturing process of a semiconductor device in an embodiment of the present invention, and FIG. FIG. 7 is a perspective view showing another form of wafer used in the manufacturing process of the semiconductor device of the present invention. DESCRIPTION OF SYMBOLS 11... Stage, 13... Lens barrel, 16... Aligning mechanism, 22... Mask, 24... Wafer, :10
ae30b, 30m', 30b', 30m'', 30b
”...Match mark. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2 Section 3 Figure 4 Figure 5 Figure 6 Figure 7

Claims (1)

[Claims] (1) An alignment mark made of radioactive material is formed on the wafer, and this mark is used to align the wafer with semiconductor manufacturing equipment or testing equipment, and process or evaluate the query. A method for manufacturing a semiconductor device, characterized in that: (2) The method for manufacturing a semiconductor device according to claim 1, wherein the radioactive substance is a substance that emits alpha rays. (3) A method for manufacturing a semiconductor device according to claim 1 or 2, characterized in that alignment marks are formed on the upper surface of the wafer. (4) A method for manufacturing a semiconductor device according to claim 1 or 2, characterized in that an alignment mark is formed on the side surface of C. , (5) The method for manufacturing a semiconductor device according to claim 1 or 2, wherein alignment marks are formed on the back surfaces of the alignment marks. (6) A method for manufacturing a semiconductor device according to any one of claims 1 to 5, characterized in that the wafer is aligned with an exposure device using alignment marks, and the wrinkled wafer is photo-etched. (7) A method for manufacturing a semiconductor device according to any one of claims 1 to 5, characterized in that the wafer is aligned with the glove using alignment marks and the characteristics of the wafer are measured. (8) Match! 6. The method of manufacturing a semiconductor device according to claim 1, wherein the wafer is aligned with an energy beam irradiation device using a mirror, and the wafer is irradiated with the energy beam. (9) A method for manufacturing a semiconductor device according to any one of claims 1 to 5, characterized in that the wafer is aligned with an ion implanter using alignment marks, and ions are implanted into the blank wafer. (To) I, which is characterized by aligning the wafer with a dicing device using alignment marks and dicing the wafer.
Vf! ? ! A method for manufacturing a semiconductor device according to any one of items 1 to 5 of the range of F precision.