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JPS5835929A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5835929A
JPS5835929A JP56135158A JP13515881A JPS5835929A JP S5835929 A JPS5835929 A JP S5835929A JP 56135158 A JP56135158 A JP 56135158A JP 13515881 A JP13515881 A JP 13515881A JP S5835929 A JPS5835929 A JP S5835929A
Authority
JP
Japan
Prior art keywords
heat
etching
treated
mask
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56135158A
Other languages
Japanese (ja)
Inventor
Shuichi Ohashi
修一 大橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56135158A priority Critical patent/JPS5835929A/en
Publication of JPS5835929A publication Critical patent/JPS5835929A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain a glass coating having the high dampproof property for a semiconductor device by a method wherein the film consisting of silicate glass is selectively treated with heat by irradiation of an energy beam, and selective etching is performed according to the difference of etching speed to be generated by hydrofluoric acid to form a pattern. CONSTITUTION:The PSG film 2 is made to grow on a substrate 1 according to the CVD method holding at the thermal decomposition temperature of 425 deg.C, a metal mask 3 having the prescribed openings is put thereon, and the film 2 is irradiated to perform the selective heat treatment using continuous wave CO2 gas laser of about 3mm. luminous flux diameter making the scanning speed at about 0.4cm/sec. The etching speed to be performed using hydrofluoric acid at the part treated with heat is made slower than the part not treated with heat by this way, the mask 3 is removed, etching is performed on the whole surface using the etching liquid of H2O:HF=39:1, and the part not treated with heat being covered with the mask 3 is removed. Accordingly the resist treatment is unnecessitated, and the progress of work is shortened, while cleanness is enhanced.

Description

【発明の詳細な説明】 本発明は半導体装置におけるシリケート・ガラス(5i
licate gksm )よシなるパターンの形成方
法に関す。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to silicate glass (5i) in semiconductor devices.
related to different pattern formation methods.

半導体嵌置の安定化、或いは半導体素子の層間絶縁膜を
形成する材料として、燐珪酸ガラス(ph−ospho
 −811icate −glass 、以下PSGと
略称する)或い紘硼珪酸ガラス(Boro −8iji
cate −Gjams 、以下BSGと略称する)等
のシリケート・ガラスが使用されている。
Phosphosilicate glass (ph-ospho
-811icate -glass, hereinafter abbreviated as PSG) or borosilicate glass (Boro -8iji
Silicate glasses such as Cate-Gjams (hereinafter abbreviated as BSG) are used.

PEG及びBSGは配線金属との密着性が良く、熱膨張
係数が配線金属に近くクラックなどが発生しないこと勢
の特徴をもち、通常は、500℃以下の温度で生成が可
能であシ、かつ不純物ガスの濃度を変化することによシ
生成されたガラス中の不純物濃度を容易に制御すること
が可能な化学蒸着法(以下CVD法と略称する)によシ
下記の如く生成される0 PSG;  5iHa+2丹(m + 60 t→si
o冨・P、OJL+5H1O BSG;   5iHa+B鵞H・+501→SIO宜
・B、O,+5H鵞O 前記の如く形成されたシリケート・ガラス膜よシバター
ンを形成する場合に、従来はホトレジストを用いてマス
クを形成し、弗化水素酸(HF)を主要成分とするエツ
チング液により選択的にエツチングを行なう方法が一般
に冥施されている。
PEG and BSG have good adhesion to wiring metals, have a coefficient of thermal expansion close to that of wiring metals, and are unlikely to cause cracks, and can usually be produced at temperatures below 500°C. 0 PSG is produced as follows by a chemical vapor deposition method (hereinafter abbreviated as CVD method), which allows easy control of the impurity concentration in the produced glass by changing the concentration of impurity gas. ; 5iHa+2tan(m+60t→si
otomi・P, OJL+5H1O BSG; 5iHa+B鵞H・+501→SIO Y・B, O, +5H鵞O When forming a shiba turn on the silicate glass film formed as described above, conventionally a photoresist was used as a mask. Generally, a method is used in which the film is formed and then selectively etched using an etching solution containing hydrofluoric acid (HF) as a main component.

本発明はレジストを使用することなく、シリケート−ガ
ラスよシなるパターンを形成する製造方法を得ることを
目的とする。
An object of the present invention is to obtain a manufacturing method for forming a pattern made of silicate-glass without using a resist.

本発明の前記目的は、光或いは電子ビーム等のエネルf
Hを選択的に照射することによってシリケート・ガラス
を選択的に熱処理し、熱処理された部分が熱処理されな
い部分に比較して弗化水素酸によるエツチング速度が遅
いことによる選択エツチングによシ達成される。
The object of the present invention is to
This is achieved by selectively heat-treating the silicate glass by selectively irradiating it with H and selectively etching the heat-treated portions with a slower etching rate with hydrofluoric acid than the non-heat-treated portions. .

以下本発BAt笑施例によ久図面を用いて具体的に説明
する。第1図に断面図を示す如く、基板1上に熱分解温
度425℃の前記CVD法によ、9PSG膜2を厚さ1
.3μ蕾に成長せしめた。
The present invention will be specifically explained below with reference to the drawings of an example of the BAt model. As shown in the cross-sectional view in FIG.
.. It was allowed to grow into 3μ buds.

次に金属製のマスク3をPSG膜2上2上置し、50J
/dの連続波炭酸ガス(CO,)レーザの光束直径を約
3mmとし、走査速度を約0.4α/s6cとして、前
記マスク3を介してPSG膜2を照射し、PSG膜2に
選択的に熱処理を行なった。
Next, a metal mask 3 was placed on the PSG film 2, and 50J
The PSG film 2 is irradiated through the mask 3 with a beam diameter of about 3 mm and a scanning speed of about 0.4α/s6c from a continuous wave carbon dioxide (CO,) laser of Heat treatment was performed.

前記の選択的熱処理を行なりたPSGJ[2に組成 H
,O:HF=39 : 1  のエツチング液によシ全
面エツチングを実施し、マスク3に覆われ熱処理全党け
なかった部分を除去した結果第2図に断面図を示す如き
PSGよりなるパターン4を得た。パターン4の厚さは
約800nmであシ、本実施例のエツチング時間は10
分間であって、エツチング速度は熱処理されない部分に
ついて約130nml ds、熱処理した部分について
約50 nm/ s”でらった。
PSGJ subjected to the selective heat treatment described above [2 has a composition H
, O:HF=39:1 etching solution was used to remove the portions covered by the mask 3 that were not etched during the heat treatment, resulting in a pattern 4 made of PSG as shown in the cross-sectional view in FIG. I got it. The thickness of pattern 4 is about 800 nm, and the etching time in this example is 10
The etching rate was approximately 130 nm/s for the non-heat-treated portion and approximately 50 nm/s for the heat-treated portion.

前記実施例においては、マスク3を介してCOtレーザ
光を全面に照射したが、マスク3を使用せず直接描画も
可能である。
In the embodiment described above, the entire surface was irradiated with COt laser light through the mask 3, but it is also possible to perform direct drawing without using the mask 3.

また、前記の方法によって形成されるPSGパターンを
マスクとしてその下層まで選択的にエツチングすること
も可能である。
It is also possible to selectively etch down to the underlying layer using the PSG pattern formed by the above method as a mask.

本発明は以上説明した如く、シリケー)−ガラスよシな
るWXをエネルギ線照射によって選択的に熱処理し、弗
化水素酸によるエツチング速度の差によシ選択エツチン
グを行なってパターンを形成するものであって、レジス
トを処理する各工程を不要とすることにより製造工程の
短縮と製品の清浄度とを向上するのみならず、シリケー
ト・ガラスの熱処理によ)耐湿性が向上し、半導体表面
の安定化についても効果を有する。
As explained above, the present invention forms a pattern by selectively heat-treating WX (silica)-glass by irradiating it with energy beams, and performing selective etching based on the difference in etching speed with hydrofluoric acid. This not only shortens the manufacturing process and improves product cleanliness by eliminating the need for resist processing steps, but also improves moisture resistance (through heat treatment of silicate glass) and stabilizes the semiconductor surface. It also has an effect on conversion.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は本発明の実施例を示す断面図であゐ
0 図において、1は基板、2はPSG膜、3はマスク、4
はPSGよりなるノ(ターンを示す0第 1 図 莞2図
1 and 2 are cross-sectional views showing embodiments of the present invention. In the figures, 1 is a substrate, 2 is a PSG film, 3 is a mask, and 4 is a cross-sectional view showing an embodiment of the present invention.
is composed of PSG (showing the turn 0 Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] シリケート・ガラスよシなる膜をエネルギ線照射によっ
て選択的に熱処理し、然る後に弗化水素酸を含む液によ
シ該シリケート参ガラス膜のエツチングを行なうことに
よシ、該シリケート・ガラスの熱処理t−実施した部分
よシなるパターンを形成することを%徴とする半導体装
置の製造方法。
The silicate glass film can be selectively heat-treated by energy beam irradiation, and the silicate glass film can then be etched with a solution containing hydrofluoric acid. A method of manufacturing a semiconductor device, the feature of which is to form a pattern that differs from the portions subjected to heat treatment.
JP56135158A 1981-08-28 1981-08-28 Manufacture of semiconductor device Pending JPS5835929A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56135158A JPS5835929A (en) 1981-08-28 1981-08-28 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56135158A JPS5835929A (en) 1981-08-28 1981-08-28 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5835929A true JPS5835929A (en) 1983-03-02

Family

ID=15145167

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56135158A Pending JPS5835929A (en) 1981-08-28 1981-08-28 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5835929A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4634494A (en) * 1984-07-31 1987-01-06 Ricoh Company, Ltd. Etching of a phosphosilicate glass film selectively implanted with boron
US5743998A (en) * 1995-04-19 1998-04-28 Park Scientific Instruments Process for transferring microminiature patterns using spin-on glass resist media

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160479A (en) * 1974-11-22 1976-05-26 Hitachi Ltd HANDOTAISOCHINOSEIZOHOHO
JPS55132045A (en) * 1979-04-02 1980-10-14 Mitsubishi Electric Corp Nitride film forming method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160479A (en) * 1974-11-22 1976-05-26 Hitachi Ltd HANDOTAISOCHINOSEIZOHOHO
JPS55132045A (en) * 1979-04-02 1980-10-14 Mitsubishi Electric Corp Nitride film forming method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4634494A (en) * 1984-07-31 1987-01-06 Ricoh Company, Ltd. Etching of a phosphosilicate glass film selectively implanted with boron
US5743998A (en) * 1995-04-19 1998-04-28 Park Scientific Instruments Process for transferring microminiature patterns using spin-on glass resist media

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