JPS5837969A - Protection circuit element - Google Patents

Abstract

PURPOSE:To raise the withstand voltage of the drain region by providing the offset region of low impurity concentration in the periphery of the drain region to which a high voltage is applied. CONSTITUTION:The field oxide film 12 is deposited on the N type semiconductor base material 11. In the one activated region, the P type high concentration drain region surrounded by the P type low concentration offset region is formed, while in the other activated region, the P type high concentration source region 15. In the lower part of film 12, the N type high concentration channel cut region 16 is deposited in contact with the regions 13, 15. Moreover, the drain electrode 18, source electrode 19, gate electrode 20 are formed on the insulating film 17. If an abnormally high voltage is applied to the drain region, the depletion layer in the P-N junction 23 widely spreads into the region 13, thereby raising the breakdown voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protection circuit element formed in a semiconductor integrated circuit, and particularly to a structure of a protection circuit element having a high breakdown voltage.

Conventionally, as semiconductor integrated circuits (ICs) have become larger and more dense, for example, the gate insulating films of MISW elements have become thinner, and their gate withstand voltages have become lower, making it difficult to protect these elements from destruction. A protection circuit element is provided for maintenance. Such ICs usually have a power supply voltage of 5 [
Since there are many circuits that operate at a voltage of about 100 volts, the protection circuit elements are sufficiently useful even if the withstand voltage is low. However, for example, in an IC to which a display device such as a fluorescent display tube is connected to the outside, a high voltage element that operates at 40 to 50 [V] is installed inside the IC. It is useless to simply add conventional protection circuit elements for protection. Moreover, high voltage elements cannot achieve high voltage unless they are formed using a limited narrow area with low concentration and high resistance. It is an element with properties.

The present invention provides a protection circuit element for protecting the fragile high voltage elements provided inside such an IC. -9 Many structures have been proposed for protection circuit elements, such as the use of jDP-N reverse junctions, but when a protection circuit element with a lateral structure is applied, the circuit diagram shown in Figure 1 is obtained, and the input/output The drain of the protection circuit element T is connected to the terminal Io, and the source, gate, and substrate are grounded), and when an abnormally high voltage is applied to the input/output terminal VIO, the protection circuit element T will flash twice. The input and output terminals are shorted to the ground side, and the input stage semiconductor element T1
Protected from high voltage being applied to the

FIG. 2 exemplifies the cross-sectional structure of such a protection circuit element T, in which a thick field oxide film 3 is formed on an N-type semiconductor substrate 1 via an N''ffi channel cut region 2,
A P+ type drain region 4 and a P+ type drain region 5 are provided in the active regions on both sides, respectively. When an abnormally high voltage is applied from the input/output terminal to the protection circuit element having such a structure, the PN junction between the drain region 4 and the channel cut region 2 breaks down, and the substrate 1 is charged. Will be uploaded. There, the charged-up substrate 1 and the source region 5 at the ground level become in a forward direction, and at the same time a current flows from the substrate 1 to the source region 5, the lateral transistor is activated, and a current flows from the drain region 4 to the source region 5. It will serve as a flow protection element.

In this way, the protection circuit element with the lateral type (horizontal) structure utilizes the lateral transistor characteristics, and a break occurs at the portion 7 where the drain region 4 on the input/output terminal VTo side contacts the channel cut region 2. The down voltage determines the withstand voltage that can be guaranteed. On the other hand, since the main purpose of the channel cut region is originally to suppress the operation of parasitic transistors in the entire ICC, the concentration cannot be made low.

Therefore, if this structure is left as it is, the protection element will be at a low voltage (30
1y1 or less) and is not suitable as a protection element for high voltage elements. In the figure, reference numeral 6 indicates a gate electrode, 8 a surface protective film made of cinsilicate glass (PSG), 9 a drain electrode, and 10 a source electrode.

The present invention aims to provide a protection circuit element having a higher dielectric strength voltage in place of the conventional protection circuit element.

That is, the protection circuit element of the present invention comprises a semiconductor substrate having a first conductivity type, an insulating film selectively disposed on the surface of the semiconductor substrate 1, and a surface portion of the semiconductor substrate on one side of the insulating film. a first and a second having a second conductivity type low concentration region around the second conductivity type low concentration region;
a conductivity type high concentration region, a second conductivity type high concentration region formed on the surface of the semiconductor substrate on the other side of the insulating film, a first conductivity type high concentration region formed under the insulating film; , the electrodes disposed on the insulating film are biased, and the first and second electrodes are biased.
A conductive type high concentration region is connected to a protected element, and the second conductive type high concentration region and the electrode are connected to a reference potential.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIGS. 3(a) and 3(b) are cross-sectional structural diagrams of another embodiment,
Figures 4 (&) to (e) are sectional views of the manufacturing process of one embodiment.According to the present invention, a protection circuit element having a cross-sectional structure as shown in FIG. 3(a), for example, is provided. That is, the protection circuit element is an N-type semiconductor (silico substrate (N-well, N-substrate, etc.)
A field oxide film 12 defining and exposing the active region surface is provided on the surface of the field oxide film 110.
2, the surrounding area is P
A P-type high concentration (P+ type) drain region 14 surrounded by an offset region 13 is formed, and a P-type high concentration (P+ type) source region 5 is formed in the other active region. There is. Further, an N-type high concentration (N+ type) channel cut region 16 is provided in the substrate surface layer below the field oxide film 12 and is in contact with both the offset region 13 and the source region 150. Further, on an insulating film 17 such as PSG covering the substrate, a drain electrode 18 is in contact with the P+ hot drain region 14 through an electrode window of the insulating film 17, a source electrode 19 is in contact with the P+ type source region 15, and a drain electrode is provided. A gate electrode 20 is formed on top of the field oxide N12 between the region and the source region, the drain electrode 18 is connected to an input terminal 21, and the source electrode 19 and gate electrode 20 are connected to a reference potential terminal or ground terminal 22. It has become. In the protection circuit element having the above structure, even if an abnormal voltage is applied to the drain region through the input terminal, the depressine layer in the PN junction 23 remains in the PN state with a low impurity concentration.
Since it spreads widely within the - type offset region 13, the break-down voltage of the protection element can be increased to a value determined by the resistivity of the offset region and the channel cut region.

FIG. 3(b) shows another embodiment of the present invention,
Each region is represented by the same symbol as in FIG. 3(a).

The difference between this structure and the embodiment described above is that the N+ type channel cut region 16 does not directly contact the P− type offset region 13. In this way, the deblessing layer in the PN junction 23 is in the offset region 1.
3 and a low impurity concentration N-type semiconductor substrate 110 in contact with it.
Due to the wide spread in both directions, the breakdown voltage of the protection element can be increased to even higher values as in the previous embodiment, determined by the resistivity of the offset region and the semiconductor body.

Next, the manufacturing procedure of the protection circuit element of the present invention will be explained for one embodiment using process cross-sectional views shown in FIGS. 4(a) to 4(e). The manufacturing process is proceeded in the order of the process cross-sectional diagrams above, and first, as shown in FIG. 4 (al), N-type silicon (81)
Silicon oxide (with a thickness of about 100 [λ]) is deposited on the base 11.
810,) After selectively forming a silicon nitride (s t s N4) film 25 with a film thickness of 1000 [A] via the film 24 to shield the active region, the Si*N4 film 25 is used as a mask. For example, by selectively implanting arsenic ions (As"), an As+B+ region 16' is selectively formed on the surface of the N-type 81 substrate 11.Next, selective thermal oxidation is performed using the NJN25 81a as an acid-resistant material, as shown in FIG. As shown in b), field oxide films 2 and 12' having an N+ channel cut region 16 at the bottom are selectively formed on the surface of the N-type St substrate 11. Next, the Si, N, film 2
After removing the N-type S1 substrate 11 using the field oxide films 12 and 12' as a mask, as shown in FIG. 4(e),
A low dose of boron ions (B+) is selectively implanted on the surface,
A low concentration boron (B) implantation region 13' is selectively formed on the substrate surface. Next, as shown in FIG. 4(d), a resist pattern 26 is formed on the substrate to cover the offset region formation site.
A high dose of boron ions (B+) is selectively implanted into the substrate surface using the resist pattern 26 and the field oxide films 12 and 1τ as masks, and high concentration boron (B+) is selectively implanted into the NfjISi substrate 11. ) forming implant regions 14' and 15'; Next, the resist pattern 26
After removing, a desired high temperature annealing treatment is performed to form the fourth
As shown in Figure (e), a P-type drain region 14 having a P-type offset region 13 around it is formed on the surface of the Nff1S l substrate 11 exposed on one side of the field oxide film 12'. A P + -type source region 15 is formed on the surface of the N-type Si substrate 11 exposed on the other side. Although not shown, the formation of an insulating film such as PSG, opening of electrode windows, electrode formation, etc. are then carried out according to the usual method.
The lateral structure element for which the circuit protection element shown in FIG. Because it is similar to a shaped element,
The explanation has been made using the name of MO8 type element.

Furthermore, the protection circuit element of the present invention can also be formed with a conductivity type opposite to that of the above embodiment.

As explained above, the present invention is a protection circuit element with improved withstand voltage, and in particular, the present invention aims at high visibility, so the protection circuit element is formed in a semiconductor substrate or well with a high impurity concentration. 0, which shows a particularly remarkable effect when

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a protection circuit element, FIG. 2 is a cross-sectional structure diagram of a conventional protection circuit element, and FIGS. 3(a) and (b) are cross-sectional structures of the first and second embodiments of the present invention. In the figure, Fig. 4(a)
7(e) are process cross-sectional views in one embodiment of the manufacturing procedure. In the figure, 11 is an N-type semiconductor (silicon) base, 12 is a field oxide film, 13 is a P-type low concentration (OP-type) offset region, 14 is a P-type high concentration (P medium) drain region,
15 is a P-type high concentration (P"ff1) source region, 16 is an N
High concentration type (N+ type) channel cut region 16. 17 is an insulating film, 18 is a drain electrode, 19 is a source electrode, 20
is the gate electrode, 21 is the input terminal, and 22 is the reference potential (ground) terminal. 1 r

Claims (1)

[Claims] 1. A semiconductor substrate having a first conductivity type, an insulating film selectively disposed on the surface of the semiconductor substrate, and a periphery formed on the surface of the semiconductor substrate on one side of the insulating film. a first high concentration region of the second conductivity type having a low concentration region of the second conductivity type; a second high concentration region of the second conductivity type formed on the surface portion of the semiconductor substrate on the other side of the insulating film; a first conductivity type high concentration region formed at the bottom of the film; and an electrode disposed on the insulating film; the first second conductivity type high concentration region is connected to the protected element; 2. A protection circuit element, characterized in that the second conductivity type high concentration region and the electrode are connected to a reference potential. 2. Claims characterized in that the first conductivity type high concentration region under the insulating film is in contact with both the second conductivity type low concentration region and the second second conductivity type high concentration region. The protection circuit element 03 according to claim 1, wherein the first conductivity type high concentration region under the insulating film is in contact only with the second second conductivity type high concentration region. The protection circuit element according to item 1.