JPS5893332A - Method for forming an insulating film on a semiconductor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming an IIA film Ng on a semiconductor in a semiconductor device.

Technical background and method of forming an insulating film on a semi-conductive body and board between them is conventionally,
A method of heat-treating a semiconductor substrate in a uniform atmosphere to form an oxide film of a semiconductor element (for example, silicon), which is C
In the former method, however, the oxide film formed is
Silicon oxide film only, or I containing borium, arsenic, etc., which are included in the process of forming the half body.
! It is wrinkled, and it is not possible to obtain an insulating film with arbitrary characteristics (such as dielectric constant).

Although it is not impossible to form an insulating film made of any element and having any desired properties using the latter method, it is often accompanied by problems.

OBJECTS OF THE INVENTION An object of the present invention is to provide a method for forming an insulating film on a semiconductor, which can easily form an insulating layer with arbitrary characteristics on a semiconductor substrate.

The Invention Book @ Ming describes the process of oxidizing the implanted metal and oxidizing the semiconductor substrate by injecting metal ions into the whole surface or the entire surface of the semiconductor substrate using the ion implantation method, and then heat-treating the semiconductor substrate in an oxidizing atmosphere. The 4I feature is to form an insulating film made of a mixed film of oxide εO of semiconductor elements constituting the semiconductor element.

Effects of the Invention According to the present invention, desired characteristics can be easily obtained by changing the relationship between the standard free energies of formation between the oxide of the implanted metal and the oxide of the semiconductor element, the implantation dose of metal ions, etc. Figure 8.1 is a process diagram of an embodiment of the present invention, and A) is a process diagram of an embodiment of the present invention. This figure schematically shows the intermediate steps in the manufacturing process. 111(a), l is a semiconductor substrate, for example a silicon substrate, and H
Silicon oxide expansion as s-field conversion, 3.4 indicates the device area.

When forming an insulating film on the semiconductor substrate 1 (D element region 3.4) in Figure 1 (1), first implant metal ions 5 as shown in 1m(b). In this case, the parts other than the element region 3.4 on the semiconductor substrate 1 may be covered with photoresist or the like to block the implantation of the metal ions 5, but if there is no problem in the subsequent steps. Figure 1 (b)
), in the element region S, the surface of the conductor substrate III is exposed, but the area where most of the metal ions 5 pass through is covered with a microsilicon oxide film, etc. good. In the experiment, Tene ψ ions T1 were used as the metal ions 5, the implantation dose was 1 x 101''/aIL3, and the acceleration energy k d
After injecting @V'' into f-50, heat treatment is performed in an oxidizing atmosphere, and M 1
11J (o), an insulating film r consisting of a saponified product of the implanted metal 6 (titanium compound), a saponified compound of the semiconductor element constituting the semiconductor substrate 1 (silicon compound), and an Os composite film is placed in the element region 3. 4. Form on top. In the experiment, heating was carried out at 1000° C. in a nitrogen-oxygen mixture or in an oxygen stream.

The reaction in this heat treatment step is shown by the following equation.

Ti ÷ 0. → TiOyi ・・・・・・・・・
(1) Si+01 → 5ift...
...(2) The standard free energy of formation of TIOm (titanium oxide) at 1000°C for this reaction is -171Kc
al/mol e, which is smaller than -166Kcal/1nole of 5 lots (silicon oxide).

Therefore, the insulating film 7tli formed by this heat treatment
I will meet many TtO. In fact, most of T1, which is the implanted gold a6, was scooped out of the insulating film FIIIK. On the other hand, when nickel ions were implanted for comparison, almost no nickel was detected in the insulating film.

This is t! The standard principal free energy of NiO is 1000
-65Kca7/mole at ℃, and Si
01!42, the insulating film r formed in this way is used as a gate oxide film and a dielectric film #3Vh, and the device region J of FIG. 1(a) is formed by a normal process. , MOS) transistor and M
9. 0JFi gate electrode of OS capacitor fabricated and showing good condition; l0FJ source and drain electrodes, 1
16*'rp''/1%%, 1#ticVD method silicon solder insulating layer, JJt:tA i s-rim type wiring layer.

7'tMO8) transistors and MOS-? Yapa-shime exhibited properties different from those of conventional insulating films made of only StOw. That is, since it is a gIi dielectric material compared to the TIOs F1a 10m, the insulating film rFi obtained in the example has a higher spin resistance than the loquat gland obtained by the conventional method and consisting of only 9810t. shows. This is especially true for high gW conductor devices! It has an extremely overlapping nature in the # & circuit that has been made into a mouse.

According to the present invention, the metal ion implantation dose xtt
By adjusting tJ4, an insulating film having arbitrary properties, particularly dielectric constant, can be obtained.

In addition to the above embodiments, zirconium and hafnium were also investigated as the metal ions to be implanted, but an insulating film having a high dielectric constant as in the case of titanium and P1 was obtained. Further, in the example, the acceleration energy during implantation was set at 50 KeV, but similar results were obtained if the acceleration energy was between 20 and 200 KeV. Since metal elements such as titanium, zirconium, and hafnium have extremely large diffusion coefficients in silicon, it is easily expected that almost the same results will be obtained regardless of implantation acceleration.

[Brief explanation of the drawing]

Figure m1 is a schematic #IIJ showing the steps of an embodiment of the present invention;
FIG. 2 is a schematic cross-sectional view showing the state in which the ZETSUKA-OKOSHITA obtained in the same example was manufactured. I... Semi-coated board, 2... Field oxide layer, 3.
4... Element region, 5... Metal ion, 6... Implanted metal, 1... Insulating film formed from a mixed film of the oxide of the implanted metal and the oxide of the conductive element, 8. ...Gate electrode, 9
... Source electrode, 10 ... Drain IIL pole, 11
...Capacitor electrode, 12...Insulating layer, 13...
wiring layer. Applicant's agent Patent attorney Takehiko Suzue 11 11!1 Figure 2

Claims (3)

[Claims] (1) After implanting metal ions into the whole surface or the entire surface of a semiconductor substrate using an ion implantation method, heat treatment is performed in an oxidizing atmosphere to form an oxide of the implanted metal and the semiconductor constituting the semiconductor substrate. 1. A method for forming an insulating film on a semiconductor, comprising forming an insulating film made of a mixed film with an oxide of an element. (2) A method for forming an insulating film on a semiconductor according to claim (1), wherein the semiconductor substrate is made of silicon. (3) In some trout, the oxide of the implanted metal has a sub-oxide or both sub-oxide free energy of formation that is smaller than that of the oxide of the semiconductor element constituting the semiconductor substrate.
11. A method for forming an iF-, KK film on a semiconductor according to claim 11 or 11.