JPS5233410A - Receiving level automatic adjusting system - Google Patents
Receiving level automatic adjusting systemInfo
- Publication number
- JPS5233410A JPS5233410A JP10897075A JP10897075A JPS5233410A JP S5233410 A JPS5233410 A JP S5233410A JP 10897075 A JP10897075 A JP 10897075A JP 10897075 A JP10897075 A JP 10897075A JP S5233410 A JPS5233410 A JP S5233410A
- Authority
- JP
- Japan
- Prior art keywords
- adjusting system
- automatic adjusting
- receiving level
- level automatic
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B14/00—Transmission systems not characterised by the medium used for transmission
- H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
- H04B14/023—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse amplitude modulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Control Of Amplification And Gain Control (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
PURPOSE:To improve the error rate by controlling the input level of A-D convertion of a receiving system and by giving a specific input to lower bits of the input of D-A convertors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10897075A JPS5233410A (en) | 1975-09-10 | 1975-09-10 | Receiving level automatic adjusting system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10897075A JPS5233410A (en) | 1975-09-10 | 1975-09-10 | Receiving level automatic adjusting system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5233410A true JPS5233410A (en) | 1977-03-14 |
Family
ID=14498257
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10897075A Pending JPS5233410A (en) | 1975-09-10 | 1975-09-10 | Receiving level automatic adjusting system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5233410A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59108326U (en) * | 1983-01-13 | 1984-07-21 | 横河電機株式会社 | Automatic range switching circuit |
| JPS60164563A (en) * | 1984-02-01 | 1985-08-27 | 石川島播磨重工業株式会社 | Balance construction method of concrete wall |
| FR2740286A1 (en) * | 1995-10-23 | 1997-04-25 | Inst Eurecom | DEVICE AND METHOD FOR HYBRID DIGITAL-ANALOG COMMUNICATION ON A TELEPHONE CHANNEL |
-
1975
- 1975-09-10 JP JP10897075A patent/JPS5233410A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59108326U (en) * | 1983-01-13 | 1984-07-21 | 横河電機株式会社 | Automatic range switching circuit |
| JPS60164563A (en) * | 1984-02-01 | 1985-08-27 | 石川島播磨重工業株式会社 | Balance construction method of concrete wall |
| FR2740286A1 (en) * | 1995-10-23 | 1997-04-25 | Inst Eurecom | DEVICE AND METHOD FOR HYBRID DIGITAL-ANALOG COMMUNICATION ON A TELEPHONE CHANNEL |
| WO1997016008A1 (en) * | 1995-10-23 | 1997-05-01 | Motorola Inc. | Digital-to-analog communication device and method |
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