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JPS53145535A - Universal interface - Google Patents

Universal interface

Info

Publication number
JPS53145535A
JPS53145535A JP6071677A JP6071677A JPS53145535A JP S53145535 A JPS53145535 A JP S53145535A JP 6071677 A JP6071677 A JP 6071677A JP 6071677 A JP6071677 A JP 6071677A JP S53145535 A JPS53145535 A JP S53145535A
Authority
JP
Japan
Prior art keywords
universal interface
rewriting
simulation
ram
freely
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6071677A
Other languages
Japanese (ja)
Inventor
Yoshinobu Sano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6071677A priority Critical patent/JPS53145535A/en
Publication of JPS53145535A publication Critical patent/JPS53145535A/en
Pending legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To ensure a simulation for many input/output devices with just one universal interface by rewriting freely the contents of the CPU memory or the program incorporated into RAM.
COPYRIGHT: (C)1978,JPO&Japio
JP6071677A 1977-05-25 1977-05-25 Universal interface Pending JPS53145535A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6071677A JPS53145535A (en) 1977-05-25 1977-05-25 Universal interface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6071677A JPS53145535A (en) 1977-05-25 1977-05-25 Universal interface

Publications (1)

Publication Number Publication Date
JPS53145535A true JPS53145535A (en) 1978-12-18

Family

ID=13150282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6071677A Pending JPS53145535A (en) 1977-05-25 1977-05-25 Universal interface

Country Status (1)

Country Link
JP (1) JPS53145535A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6034645U (en) * 1983-08-10 1985-03-09 三菱電機株式会社 Simulated transfer response signal generator
JPS6095648A (en) * 1983-10-28 1985-05-29 Fujitsu Ltd Virtual fba pseudo processing device
JPS61272838A (en) * 1985-05-28 1986-12-03 Sony Tektronix Corp Simulator
JPS6250922A (en) * 1985-08-30 1987-03-05 Toshiba Corp Fdd simulator
JPS62194550A (en) * 1986-02-20 1987-08-27 Nec Corp Emulator for slave processor
JPS6361046U (en) * 1986-10-02 1988-04-22
US8966144B2 (en) 1997-03-04 2015-02-24 Papst Licensing Gmbh & Co. Kg Analog data generating and processing device having a multi-use automatic processor

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6034645U (en) * 1983-08-10 1985-03-09 三菱電機株式会社 Simulated transfer response signal generator
JPS6095648A (en) * 1983-10-28 1985-05-29 Fujitsu Ltd Virtual fba pseudo processing device
JPS61272838A (en) * 1985-05-28 1986-12-03 Sony Tektronix Corp Simulator
JPS6250922A (en) * 1985-08-30 1987-03-05 Toshiba Corp Fdd simulator
JPS62194550A (en) * 1986-02-20 1987-08-27 Nec Corp Emulator for slave processor
JPS6361046U (en) * 1986-10-02 1988-04-22
US8966144B2 (en) 1997-03-04 2015-02-24 Papst Licensing Gmbh & Co. Kg Analog data generating and processing device having a multi-use automatic processor
US9189437B2 (en) 1997-03-04 2015-11-17 Papst Licensing Gmbh & Co. Kg Analog data generating and processing device having a multi-use automatic processor
US9836228B2 (en) 1997-03-04 2017-12-05 Papst Licensing Gmbh & Co. Kg Analog data generating and processing device having a multi-use automatic processor

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