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JPS6479862A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS6479862A
JPS6479862A JP23490287A JP23490287A JPS6479862A JP S6479862 A JPS6479862 A JP S6479862A JP 23490287 A JP23490287 A JP 23490287A JP 23490287 A JP23490287 A JP 23490287A JP S6479862 A JPS6479862 A JP S6479862A
Authority
JP
Japan
Prior art keywords
matrix
elements
layers
parallel processing
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23490287A
Other languages
Japanese (ja)
Other versions
JPH0524548B2 (en
Inventor
Makoto Yoshimi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP23490287A priority Critical patent/JPS6479862A/en
Publication of JPS6479862A publication Critical patent/JPS6479862A/en
Publication of JPH0524548B2 publication Critical patent/JPH0524548B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Complex Calculations (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To rapidly find out the product of elements in a complex matrix by forming three-dimensional structure and executing parallel processing for the product calculation of matrix elements by means of simple wiring. CONSTITUTION:The titled device has three-dimensional structure, register groups Aij, Bij for storing numerical data corresponding to the elements of 1st and 2nd matrixes are arrayed on 1st and 3rd layers 1, 3 and operation parts Cij for inputted data from the register groups in the 1st and 3rd layers 1, 3 and executing the parallel processing of the data are arrayed on a 2nd layer 2. Each operation part Cij has a multiplier for multiplying matrix elements in parallel and an adder for accumulatively adding the multiplied results. The calculation of matrix products based upon parallel processing is executed by constituting the register groups Aij, Bij in the 1st and 3rd layers 1, 3 as shift registers for circulating data in mutually rectangular directions of the matrix and repeating the parallel multiplication among corresponding matrix elements and the cumulative addition of the multiplied results. Consequently, the calculation time of matrix products can be remarkably shortened.
JP23490287A 1987-09-21 1987-09-21 Semiconductor integrated circuit device Granted JPS6479862A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23490287A JPS6479862A (en) 1987-09-21 1987-09-21 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23490287A JPS6479862A (en) 1987-09-21 1987-09-21 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS6479862A true JPS6479862A (en) 1989-03-24
JPH0524548B2 JPH0524548B2 (en) 1993-04-08

Family

ID=16978091

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23490287A Granted JPS6479862A (en) 1987-09-21 1987-09-21 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6479862A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011052351A1 (en) * 2009-10-29 2011-05-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9748400B2 (en) 2011-05-20 2017-08-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54120546A (en) * 1978-03-10 1979-09-19 Seiko Instr & Electronics Ltd Matrix multiplier circuit
JPS6083175A (en) * 1983-10-14 1985-05-11 Fujitsu Ltd Hierarchical array cache memory
JPS61201329A (en) * 1985-03-04 1986-09-06 Agency Of Ind Science & Technol Parallel array multiplier

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54120546A (en) * 1978-03-10 1979-09-19 Seiko Instr & Electronics Ltd Matrix multiplier circuit
JPS6083175A (en) * 1983-10-14 1985-05-11 Fujitsu Ltd Hierarchical array cache memory
JPS61201329A (en) * 1985-03-04 1986-09-06 Agency Of Ind Science & Technol Parallel array multiplier

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011052351A1 (en) * 2009-10-29 2011-05-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9202546B2 (en) 2009-10-29 2015-12-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9806079B2 (en) 2009-10-29 2017-10-31 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US10720433B2 (en) 2009-10-29 2020-07-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9748400B2 (en) 2011-05-20 2017-08-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device

Also Published As

Publication number Publication date
JPH0524548B2 (en) 1993-04-08

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term