JPS625788A - Monitor of magnetic recording and reproducing device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a magnetic recording and reproducing device, and more specifically, the present invention relates to a magnetic recording and reproducing device, and more specifically, when the content recorded on a magnetic tape is reproduced at high speed for high-speed dubbing, etc., the reproduced content is simultaneously reproduced. The present invention relates to a monitor device that allows monitoring on a television screen.

[Background of the invention]

In general, in a rotary head type magnetic recording/reproducing device using an azimuth recording method, for example, two rotary heads have different azimuth angles, and these heads alternately helically scan the magnetic tape to transfer video signals to the magnetic tape. Recording is performed sequentially in units of one field on the upper inclined recording track, and due to the difference in recording azimuth (recording magnetization direction) between adjacent recording tracks, there is no crosstalk from adjacent recording trunks during playback, and therefore High-density recording can be performed without providing guard hands between adjacent recording tracks.

Dubbing (copying) a magnetic tape can be easily realized by connecting two or more such magnetic recording/reproducing devices.

FIG. 2 is a block diagram showing a general system for realizing magnetic tape dubbing at N times the speed (where N is a number satisfying N22).

In the figure, 1 and 2 are cylinders, 3 and 4 are capstans, 5 and 6 are magnetic tapes, 7 to 1o are heads, 11 is a servo circuit for synchronously rotating each capstan and each cylinder, and 12 is a signal Processing circuits 13 to 15 are switches.

It is assumed that a video signal recorded on a magnetic tape 5 is to be dubbed onto a magnetic tape 6. At this time, cylinder 1.2
When the capstan 3.4 is rotated at N times the normal speed, the reproduction signal of the magnetic tape 5 from the head 7.8 is guided to the signal processing circuit 12 via the PB side of the switch 13 and processed. After that, from the REC side of the switch 14 to the head 9,
1o, and is recorded on the magnetic tape 6, thus making it possible to dub from the magnetic tape 5 to the magnetic tape 6 with a recording pattern that satisfies the current VH3 (Beta) standard, and the required time is shorter than the time required for normal recording and playback. It becomes 1/N.

That is, the pattern of the magnetic tape 5 as shown in FIG. 3 is also recorded on the magnetic tape 6.

At this time, for example, when N is set to 2 and the magnetic tape is traced by the head at twice the speed, the reproduced signal obtained when the reproduced signal is displayed on the television screen is as shown in FIG. 4. In FIG. 4, 16 is a vertical retrace period, and 17 is a television screen.

When tracing at double speed, the normal one field period (
Since two fields worth of video signals are output every 1/60 sec), there has conventionally been a problem in that it is impossible to monitor the reproduced content as it is.

Furthermore, dubbing has been realized for a long time.
An example of a document describing signal processing for preventing image quality deterioration at that time is Japanese Patent Application Laid-Open No. 56-80984.

[Purpose of the invention]

The purpose of the present invention is to solve the above-mentioned problems of the prior art,
It is an object of the present invention to provide a monitor device that allows the reproduction contents to be monitored on a current television screen even when a magnetic tape is reproduced at high speed for high-speed dubbing or the like in a magnetic recording and reproducing device.

[Summary of the invention]

In order to achieve the above object, in the present invention, in a magnetic recording/reproducing device, when the cylinder and the capstan are each rotated at N times speed for high-speed reproduction, the video signal of 1 minute of N fields reproduced and demodulated in 1760 seconds is reproduced. Each field is temporarily stored in memory according to a predetermined address, and then one of the N fields is selected and read out and displayed on the TV screen as a reproduced video signal so that it can be monitored. It is a feature.

[Embodiments of the invention]

The present invention will now be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. The monitor device M shown as an embodiment in the same figure shows an example in which the reproduced video signal during high-speed dubbing is branched from the rotary head 7.8 in FIG. 2 and is taken in for monitoring. If you want to monitor the rotating head 7.
8, the recording video signal during high-speed dubbing may be branched from the rotary heads 9 and 10 and taken in for monitoring.

Now, in FIG. 1, 7.8 is the two rotating heads with different azimuth angles shown in FIG.
8, 1.9 are amplifiers, and 20 is a switch, the switching of which is controlled by a head switching signal. 21 is a demodulation circuit, 22 is an analog-digital (A/
D) Converter, 23 is a semiconductor memory, 24 is a digital
An analog (D/A) converter, 25 is an output terminal for a reproduced video signal, 26 is a synchronization signal separation circuit, and 27 is a memory control circuit.

Here, the FM video signals reproduced by the rotary head 7.8 are amplified by amplifiers 18.19, respectively, and the switches 20
The signals are switched alternately to form one continuous FM video signal.

This FM video signal is demodulated by a demodulation circuit 21, and the demodulated video signal is sent to an analog-digital (A/D) converter 22.
is converted into a digital video signal by Analog-
The digital (A/D) converter 22 is, for example, an 8-bit/
The conversion speed is set to be approximately 50 nsec per word.

On the other hand, the output of the demodulation circuit 21 is also input to a synchronization signal separation circuit 26, which separates and extracts the horizontal synchronization signal, vertical synchronization signal, and color subcarrier signal in the demodulated video signal. By operating the memory control circuit 27 based on the signal, the analog
The digital output of the digital converter 22 is repeatedly written to a predetermined address in the semiconductor memory 23 for each field.

The memory control circuit 27 also controls the reading of the memory 23, and the digital video signals written in the memory 23 are sequentially read out in parallel with the writing, and are sent to the digital-to-analog (D/A) converter 24. After being converted into the original analog video signal, it is output from the output terminal 25.

Note that the memory control circuit 27 also controls the conversion operations of the analog-to-digital converter 22 and the digital-to-analog converter 24, and these conversion operations are performed by the memory 23.
The write and read operations are synchronized.

Next, a specific circuit configuration example of the synchronizing signal separation circuit 26 and the memory control circuit 27 in the configuration of the embodiment shown in FIG. 1 will be explained with reference to FIG. Components other than the synchronization signal separation circuit 26 and memory control circuit 27 surrounded by broken lines in the same figure are the same as the configuration shown in FIG. do.

Please refer to FIG. 28 is a circuit that separates and extracts a color burst signal from the demodulated video signal output from the demodulation circuit 21 (see Figure 1) and generates a color subcarrier signal that is phase-synchronized with this color burst signal; This is a quadrupling circuit that quadruples the frequency Esc of the subcarrier signal, and the output of this circuit is supplied to the memory control circuit 27 as a clock signal CP. Note that as the color subcarrier signal, a color subcarrier used in a reproduction color signal processing circuit of a normal magnetic recording and reproducing device may be used, and in this case, the circuit 28 can be omitted. Not even.

30 is a horizontal synchronization signal separation circuit, and 31 is a vertical synchronization signal separation circuit, which separates and outputs a horizontal synchronization signal and a vertical synchronization signal from the demodulated video signal input. 32 uses the clock signal cp from the quadrupling circuit 29 as a count input;
A counter that receives the horizontal synchronization signal from the horizontal synchronization signal separation circuit 30 as a reset input, 33 is the horizontal synchronization signal separation circuit 3
This is a counter that takes the horizontal synchronization signal from 0 as a count input and the vertical synchronization signal from the vertical synchronization signal separation circuit 31 as a reset input.The write and read addresses of the memory 23 are specified by the outputs of these counters 32 and 33. .

34 is a write and continuous pulse generation circuit, and 4 multiplier circuit 2
A write pulse W and a read pulse R for the memory 23 are generated based on the clock signal CP from 9. 35 is a circuit that divides the frequency of the vertical synchronization signal by N (N is N of N times speed tracing).

Next, the operation of the circuit shown in FIG. 5 will be explained with reference to the operation waveform diagrams shown in FIGS. 6 and 7.

Note that in FIGS. 6, 5, and 7, signals corresponding to the signals on the circuit in FIG. 5 are given the same reference numerals.

The counter 33 sequentially counts the horizontal synchronizing signal H3 from the horizontal synchronizing signal separating circuit 30, and at the same time, the count value is one vertical period by a pulse S' synchronized with the vertical synchronizing signal VS from the vertical synchronizing signal separating circuit 31. It is reset every time. Therefore, the count value C1 is obtained from the counter 33. This count value C1 is 0 to 263 (actually 262.5) during standard playback of an NTSC video signal.
This is the count range.

This count value CI is supplied to the semiconductor memory 23, and addressing of this memory 23 in units of one horizontal scanning period is repeated every one vertical period. On the other hand, the counter 32 is
The clock signal CP shown in FIG. 7 from the quadrupling circuit 29 is counted sequentially, and the count value C2 is a pulse H3 synchronized with the horizontal synchronizing signal H3 (shown as a partially enlarged diagram in FIG. 7). ' is reset every horizontal period. The count range of the count value Ct of the counter 32 is 0 to approximately 910 (4X fsc/fH, however, f
Se is the color subcarrier frequency and fH is the horizontal synchronization frequency).

This count value C2 is supplied to the semiconductor memory 23,
A more detailed address within the designated address in the grass position for one horizontal scanning period determined by the counter 33 is designated.

Next, a specific example of the configuration of the semiconductor memory 23 for displaying images on a television screen when high-speed tracing is performed at double speed will be described with reference to the circuit configuration diagram in FIG. In the same figure, 37 is the memory capacity for 2 fields, 2 field memory, 38
'd! for the field! It 9 Motsul Fihano)
'Memory.

2x speed -7,-,y;; 1f i L・,XL/
time (1/60 sec) to display one field's worth of video signal on tb'2', tln''+n1)
In this case, two fields worth of recording tracks are played back. Therefore, the video signal for the recording track to be reproduced is stored in the field memory 37. At the same time, either the first or second field of the two fields stored in the memory 37 is stored in the field memory 38. The contents of this field memory 38 are newly rewritten when the 1 field memory 37 stores the next 2 fields. The writing timing to this one field memory 38 may be performed in synchronization with the pulse W' obtained by dividing the vertical synchronizing signal by N.

Next, the contents of the 1-field memory 38 are read out, and the output thereof is input to the digital-to-analog converter 24 (see FIG. 5) and converted into an analog signal to obtain a video signal.

The writing and reading operations of video signals in the semiconductor memory 23-. based on the above-mentioned addressing will be explained with reference to the operational waveform diagram of FIG.

The demodulated video signal from the 1V modulation circuit 2 (Fig. 1) is first input to the analog-digital converter 22, and is sampled in synchronization with the falling edge of the clock CP (Fig. 9 (A)). , for example, into an 8-bit parallel digital signal. On the other hand, write.

The read pulse generation circuit 34 generates a write pulse W (FIG. 9 (C
)) and a read pulse R (FIG. 9(D)) that is slightly delayed from the write pulse W.

This write pulse W is applied to the analog-digital converter 2.
The 8-bit parallel digital signal output from the memory 23 is sent to the memory 23 according to the addressing signal (FIG. 9(B)) obtained based on the count values of the counters 32 and 33.
Write to field memory 37. 2 field memory 3
7, after writing to the 1 field memory 38 at the same timing in synchronization with the N-divided output W' of the vertical synchronization signal,
From this l field memory 38, the read pulse R
(FIG. 9(D)) and input to the digital-to-analog converter 24 as an 8-bit parallel digital signal.

The digital-to-analog converter 24 launches the input 8-bit parallel digital signal in synchronization with the rise of the clock signal CP (FIG. 9(A)), and converts it into the original analog video signal. and output from the output terminal 25.

Next, another specific circuit example of the memory 23 for displaying the reproduced content on the television screen when high-speed tracing is performed at triple speed will be described with reference to the circuit configuration diagram in FIG. In this figure, the same parts as in FIG. 8 are given the same reference numerals. 44 is a field memory for three fields.

As in the case of tracing at double speed described above, in this case, three fields worth of recording tracks are reproduced in a period of 1/60 sec. Therefore, the amount to be regenerated is 3
It is stored in the field memory 44.

At the same time, the first of those three fields. The second or third field is written and stored in the one field memory 38.

Next, the signals are sequentially read out from the one field memory 38, input to the digital-to-analog converter 24, and converted into an analog signal to obtain the original analog video signal. Here, the 3-field memory 44 may be a memory for any two consecutive fields among the three fields or a memory for one field.

Next, another specific circuit example of the memory 23 will be explained in the 11th example.
This will be explained using the circuit configuration diagram shown in the figure. In this figure, the same parts as in FIG. 8 are given the same reference numerals. 45 is a switch means.

Here, when tracing at N times speed, 1/60 sec
The switch means 45 is turned on for only one field period out of the N fields reproduced during the period , and the data is written and stored in the one field memory 38.

By appropriately selecting the timing at which the switch means 45 is turned on, any field among the N fields can be selected.

Next, the signals are sequentially read out from the one field memory 38, input to the digital-to-analog converter 24, and converted into an analog signal to obtain the original analog video signal. In this example,
This has the advantage that only one field memory is required.

〔Effect of the invention〕

As described above, according to the present invention, in a magnetic recording and reproducing device, the cylinder and the capstan are rotated at N times the speed to reproduce the recording track at N times the speed.

When recording, it is possible to store video signals for up to N fields, and by temporarily storing them in the field memory (1≦L≦N), it is possible to obtain video signals for current televisions and display them on a monitor. This has the advantage that the mechanism is not complicated, the cost is low, and a monitor device suitable for use in high-speed dubbing for a magnetic recording/reproducing device can be provided.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram of a general system that realizes N-times speed magnetic tape dubbing, FIG. 3 is an explanatory diagram of a tape pattern on a recording tape, and FIG. Figure 4 is an explanatory diagram of a television screen when the magnetic tape is raced by the head at double speed and the output signal is displayed as a television signal on the screen, and Figure 5 is an example of the embodiment shown in Figure 1. 6 and 7 are operation waveform diagrams of each part of FIG. 5, respectively, and FIG. 8 is a block diagram showing a specific configuration example of the main parts of the memory 23 in the embodiment shown in FIG. 1. Block diagram showing an example, No. 9
10 is a block diagram showing another specific configuration example of the memory 23 in FIG. 1. FIG. 11 is another specific configuration of the memory 23 in FIG. 1. FIG. 2 is a block diagram illustrating an example. Explanation of symbols 21... Demodulation circuit, 22... Analog-digital converter, 23... Semiconductor memory, 24... Digital-analog converter, 26... Synchronization signal separation circuit, 2
7...Memory control circuit, 37...2 field memory, 38...1 field memory, 44...3 field memory, 45...Switch means agent Patent attorney Akio Namiki Figure 1 @ 2 Figure 3 Figure 6 Figure 7 K 8 Illustration 9 Figure CD) RII'1 Shimatao 10 Figure 11 Memory

Claims (1)

[Scope of Claims] 1) In a magnetic recording and reproducing apparatus that records and reproduces video signals by helically scanning a magnetic recording medium with a plurality of rotary heads having different azimuth angles, the running speed of the recording medium and the speed of the rotary heads are controlled. Increase the scan speed by N times (however,
N is a number satisfying N≧2), a monitor device capable of displaying on a monitor a video signal reproduced and demodulated from the magnetic recording and reproducing device, the video signal being reproduced and demodulated during N times speed operation; horizontal from the signal,
means for separating and extracting a vertical synchronization signal and a color subcarrier signal, and a first address signal for repeatedly specifying an address in units of one horizontal scanning period from these extracted signals for each vertical period, and a predetermined period. address generating means for generating and outputting a second address signal that repeatedly specifies an address in units of each horizontal scanning period; a first memory that stores L fields (1≦L≦N); a frequency divider that divides the vertical synchronization signal by N and outputs it as an N-divided output; 1 of the video signal data for L fields
a second memory into which the field is written using the N-divided output, and one field's worth of video signal data read from the second memory is displayed for monitoring purposes. A monitor device in a magnetic recording/reproducing device characterized by: 2) In the monitor device for the magnetic recording and reproducing apparatus according to claim 1, there are M magnetic recording and reproducing apparatuses (where M≧2), and these M units are synchronously driven at N times the speed. A monitor device characterized in that it monitors a reproduced demodulated video signal from one device. 3) In a magnetic recording and reproducing apparatus that records and reproduces video signals by helically scanning a magnetic recording medium with a plurality of rotary heads having different azimuth angles, the traveling speed of the recording medium and the scanning speed of the rotary head are set to N times faster ( however,
N is a number satisfying N≧2), a monitor device capable of displaying on a monitor a video signal reproduced and demodulated from the magnetic recording and reproducing device, the video signal being reproduced and demodulated during N times speed operation; horizontal from the signal,
means for separating and extracting a vertical synchronization signal and a color subcarrier signal, and a first address signal for repeatedly specifying an address in units of one horizontal scanning period from these extracted signals for each vertical period, and a predetermined period. address generating means for generating and outputting a second address signal that repeatedly specifies an address in units of each horizontal scanning period; a memory for storing only one field of the vertical synchronization signal, a frequency dividing means for dividing the frequency of the vertical synchronizing signal by N and outputting the frequency divided by N, and a switch for turning on/off the input signal of the memory using the output of the frequency dividing means. A monitor device in a magnetic recording/reproducing device, comprising means for displaying one field worth of video signal data read from the memory for monitoring purposes.