JPS6269680A - Manufacturing method of thin film transistor - Google Patents

Abstract

PURPOSE:To avoid unevenness of a recrystallized semiconductor film created by beam annealing when a backward stagger type TFT is formed by carrying out the beam annealing before a gate electrode (the first conductive film) is patterned. CONSTITUTION:After a laminated film 10, consisting of the first conductive film 2, a gate insulating film 3 and an Si thin film 4, is deposited on an insulating substrate 1, the Si thin film 4 is subjected to beam annealing to form a recrystallized Si film 14. Then the laminated film 10, consisting of the recrystallized Si film 14, the gate insulating film 3 and the first conductive film 2, is selectively etched so as to have the shape of a gate electrode to form an island shape laminated film 20. After that, a field insulating film 7 is deposited and an aperture is formed in the field insulating film 7 above the island shape laminated film 10 and, after an N<+> type Si film 5 and a metal film 6, which compose the second conductive film 50, are deposited, a source electrode 16 and a drain electrode 26 are composed of the metal film 6 and a source region 15 and a drain region 25 are composed of the N<+> type Si film 5 by selective etching. With this constitution, a backward stagger type TFT with a semiconductor thin film subjected to beam annealing can be easily obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a thin film transistor (TPT) using a semiconductor thin film recrystallized with an energy beam such as a laser beam.

[Summary of the invention]

A method for manufacturing an inverted staggered TPT having a beam annealed recrystallized semiconductor thin film in the channel region, which includes (1) depositing a laminated film of a first conductive film, a gate insulating film, and a semiconductor thin film on an insulating substrate (2) semiconductor Beam annealing of thin film (3
) Gate electrode shape of laminated film Shape to island-like laminated film Ji!
2. (4) Deposition of field insulation film (5)
Opening on the top surface of the island-like stacked film of the field insulating film (6)
Deposition of a second conductive film (7) Selective etching of the second conductive film, forming a gate electrode with the first conductive film.

The second conductive film serves as source and drain electrodes. For selective etching of the second conductive film, a self-alignment technique using exposure from the back surface of the substrate can be used.

[Conventional technology]

TPT using amorphous silicon (a-8+) has low = 3
- Since it can be formed on a large-area substrate by filling it, it is applied to liquid crystal display devices, etc. However, since the a3i film has low carrier mobility, its operating speed is slow and its applications are limited. One way to improve this is to recrystallize the a-8i film by laser annealing, but this method poses a problem when applied to an inverted staggered TPT. An example of a conventional manufacturing process will be explained using FIG.

FIG. 2(e) shows a gate insulating film 3m-8t after selectively forming a gate electrode 12 on a substrate 1 made of glass, quartz, etc.
This is a cross section of a film 4 deposited thereon. Figure 2(b) is.

FIG. 2C shows a state in which the n-8T film 4 is laser annealed to form a recrystallized St film 14, and FIG. 2(c) shows a state in which the recrystallized S1 film 14 is selectively etched. FIG. 2(d) shows a completed state in which the na-8+ film 5° and the metal film 6 are deposited and selectively etched to provide source/drain regions 15.25 and source/drain electrodes 25.26, respectively. The problem with this process example is that during the laser annealing shown in FIG. 2(b), the recrystallized SI film 24 on the gate electrode 12 and the other recrystallized S1 film 34 cannot be made uniform.

Because of the presence of the gate electrode '12, a-s+l[
This is because the reflection of the laser beam transmitted through i4 and the heat dissipation during recrystallization differ only in the Si film 27I on the gate electrode 12, and in extreme cases, only this portion 24 will evaporate. The heat dissipation situation depends on the area of the gate electrode, etc.
It is difficult to make it uniform even between T.

This is not limited to laser annealing, but also electron beam annealing,
Even with lamp annealing, polycrystalline St.
A similar problem exists with membranes.

[Problem that the invention seeks to solve]

The present invention is based on the above-mentioned inverted stagger type TPTiI! This was done to improve the non-uniformity of the recrystallized semiconductor film caused by beam annealing during manufacturing.

[Means for solving problems]

The manufacturing method of the present invention includes (1) depositing a laminated film of a first conductive film, a gate insulating film, and a semiconductor thin film on an insulating substrate; (2) beam annealing the semiconductor thin film; (3) selectively etching the gate electrode shape of the laminated film; ) Deposition of a field insulating film; (5) Selective removal of the field insulating film on the top surface of the island-like laminated film; (6) Deposition of a second conductive film; and (7) Formation of source and drain electrodes by selective etching of the second conductive film.

The low-resistance semiconductor film that becomes the source and drain regions.

(2) is deposited after beam annealing, but (6) second
Deposited as at least a portion of a conductive film. The first conductive film in the island-like laminated film is used as the gate electrode.

[For production]

In the present invention, beam annealing of a semiconductor thin film is performed.

Since the annealing is performed before the gate electrode (first conductive film) is patterned, both reflection heat radiation is uniform, and the recrystallized semiconductor film can be annealed uniformly.

Furthermore, the first conductive film also acts as a heat sink, reducing the influence of heat on the substrate side, making it easy to apply to three-dimensional ICs and TPTs on low-melting point glass substrates. In particular, if a high melting point insulating film is inserted under the first conductive film, the effect will be even greater.

〔Example〕

The present invention will be explained in detail below using the drawings.

a. Example] TFT cross section (FIG. 1) FIG. 1 shows a cross-sectional view along the manufacturing process according to the present invention. Figure 1 (&)
A first conductive film 2. is formed on an insulating substrate l. Gate insulating film 3. S
After depositing the laminated film 10 consisting of the i thin film 4, the Si thin film 4 is deposited.
This is a state in which a recrystallized Si film 14 is formed by beam annealing. As the substrate 1, an amorphous insulating 81 substrate coated with an insulating film, such as glass or quartz, is used. First conductive film 2
for.

High melting point metals such as Cr, Mo, W, Ta, and Ti, their silicides, or low resistance SI thin films are used for the gate insulating film 3, and S+02, 5r3N, , kl, , 03, etc. are used. The Si thin film 4 is a −S + or polycrystalline S1
It is. For beam annealing.

Laser beams such as Ar lasers and excimer lasers,
In addition to annealing using a child beam, annealing using a lamp and a heater is applied. Recrystallization S+l'J.

For example, a small amount of P-type impurity may be added to 14 before or after annealing. Figure 1(b) shows the recrystallized S
t Film Removal 14 The laminated film 10 consisting of the gate insulating film 3/first conductive film 2 is selectively etched in the shape of a gate electrode to form an island-shaped laminated film 2o.

This selective etching is performed for each film or all at once, and plasma etching, reactive ion etching (RIE), ion etching, etc. are used. The side shape of the island-like laminated film 20 depends on the method of depositing the field insulating film in the first step.2For example, it may be a gentle shape if CVD is used, or a reverse tapered shape if it is coated.

FIG. 1(c) shows a state in which a field insulating film 7 is deposited and a hole is opened on the upper surface of the island-like laminated film 20. As shown in FIG. For the field insulating film 7, a coated insulating film such as PIQ can be used in addition to the 5i02 HsrN film.

In addition to the usual mask process, techniques such as exposure from the back side of the substrate and etchback are applied to the openings on the two sides of the island-shaped laminated film 20. FIG. 1(d) shows n+S which is the second conductive film 50.
After depositing the I film 5 and the metal film 6, selective etching is performed to form source electrode/regions 16, 1.5 and drain electrode/region 26.2.
5 and metal film 6. It is provided with an n+SI film 5. The n+Si film 5 includes an n+a-8t film and a polycrystalline n+8
For example, a microcrystalline A-3+ film or a beam-annealed polycrystalline Si film is desirable from the viewpoint of low resistance. The source/drain region 15.25 is formed by selective etching of the n+SI film 5 after the selective etching of the metal film 6, but has sufficient selectivity because there is a recrystallized St film 14 underlying the channel region. Etching For example, plasma etching or RIE using d-based gas.

Optical etching is optimal.

b. Example 2 (FIG. 3) FIG. 3 shows two other manufacturing process examples according to the present invention. Third
Figure (e) shows that after the same process as in Figure 1(e), for example, an n+a-8i film 5 is deposited as a low-resistance Si film, and +a-S
This is a state in which a laminated film 10 consisting of i film 5/recrystallized S+ film 14/gate insulating film 3/first conductive film 2 is formed. FIG. 3(b) is a cross section of the laminated film 10 that has been selectively etched to provide an island-shaped laminated film 20 in the shape of a gate electrode. In this example, the first
The conductive film 2 is over-etched so that the gate insulating film 3 overhangs the gate electrode 12. Figure 3 (
In c), photosensitive PIQ is used as the field insulating film 7, and holes are opened in the upper surface of the island-shaped laminated film 20 by exposure from the back surface of the substrate 1. In this step, a coated oxide film (for example, spin-on glass) or the like is used as the field insulating film 7, a negative resist is applied after coating, and similar openings can be formed by exposing the back side. Depending on the backside exposure conditions, the gate electrode 12 or the recrystallized Si film I4 can be used as a mask. Figure 3(c) is.

After depositing a transparent conductive film (for example, an ITO film) 6 as the second conductive film 50, a negative resist 8 is coated, and the uppermost layer (n
An ITO film 6 is formed in contact with the "a-8i film 5), excluding the portion that will become the channel region." Figure 3(d)
After removing the resist 8, unnecessary ITO films are removed in a mask process to form source/drain electrodes 16.26, and the exposed 1A-8I film 5 is selectively etched to form source/drain regions 15.25. It is a completed sectional view provided. In this example, since the source and drain regions 15.25 and the electrodes 16.26 can be formed in alignment with the cell 7, a TPT with small interelectrode capacitance can be manufactured. n+a-8i film 5
In addition, n+ polycrystalline S peritoneum can be used, but Fig. 3(e)
It is also effective to beam-anneal the n+a-8t film 5 after the step 1 to lower the resistance.

C9 Embodiment 3 (FIG. 4) FIG. 4 shows an example in which a low resistance semiconductor film (for example, n+a-8+IIQ) 5 is used as the second conductive film 50. FIG. 4(e) is a cross section after the same process as FIG. 1(c), and the island-like laminated film 20 is a recrystallized S1 film]4/gate insulating film 3/first conductive film (gate voltage $i81. 2). For the field insulating film 7, for example, a flat 5102 film deposited by RF bias sputtering is used.

Openings are provided on two sides of the island-like laminated film 20 by etching back. FIG. 4(b) shows n+a− as the second conductive film 50.
8i film 5 is deposited, and the n+a Si film at the center of the island-like laminated film 20 is removed using overexposure from the back surface of the substrate. In this case, the na-8i film 5 is desirably thin and has a thickness of 100 to 5 ooX.

FIG. 4(c) shows that after the resist is removed, the n+a-8t film 5 is crystallized during beam annealing, and the recrystallized SI
This is a state in which the n-type impurity in the film type 4 is diffused.

It is desirable that the beam annealing in this step does not melt the na-8i film 5 or the S+ film type 4. Figure 4(d) is.

Unnecessary portions of the n4"a-8i film 5 are removed by a mask process.

This is a cross section with source and drain regions 15.25. An example in which a body film (for example, H'-a-8i film) 5 is subjected to beam annealing as shown in FIG. 4(c) after this step is shown. FIG. 4(e) shows a cross section after the same process as FIG. 1(c).
(not shown), etc.

Although the external extraction of the gate electrode I2 and the wiring formation were not explained in the second embodiment, the gate insulating film 3. Mask this part when depositing the semiconductor thin film 4.
Recrystallized Si film 14 by beam annealing
This can be done by an additional mask process or the like to provide openings in this part in a process subsequent to formation. Also, mainly n-channel TPT
has been described as an example, but a p-channel is also possible by reversing the conductivity type of each region.

〔effect〕

As described below, according to the present invention, a beam-annealed semiconductor thin film is formed into an inverted staggered TPT having a channel region.
can be easily manufactured. Therefore, an inverted staggered TPT with a channel region that is not beam annealed, e.g.
It has the advantage that it can be easily mixed with 8i'l''pT, and an active matrix display device made of, for example, a-8+TPT and a peripheral drive circuit made of beam-annealed TPT can be mounted on the same substrate. and drain electrode 16.26 and source and drain region 15
．． 25 can be provided in a cell 7 aligned manner,
Higher speeds can be achieved. Furthermore, since the first conductive film plays the role of a heat sink during beam annealing, the present invention is also effective for other substrates having transistors underneath, low melting point glass substrates, and the like.

[Brief explanation of drawings]

FIGS. 1(e) to (ai are sectional views of the TPT manufacturing process according to the present invention, FIGS. 2(e) to (d) are sectional views along the conventional manufacturing process example, and FIGS. 3(e) to (ai) e), Figure 4(a)-(
e) is a sectional view along the manufacturing process of another embodiment of the present invention. 1... Substrate 2... First conductive film 3... Gate insulating film 4... Semiconductor thin film 14... Recrystallized semiconductor film
5...Low resistance semiconductor thin film 6...Conductive film 7...
Field insulating film 8...Resist 10...Laminated film 20...Island-like stacked film 50...Second conductive film 12.
... Gate electrode 15 ... Source region 16 ... Drain region 25 ... Source electrode 26 ... Drain electrode and above Applicant Seiko Electronics Co., Ltd. Agent Patent attorney TFTr by Akira Mogami #91 , Manufacturing process order Front view Conventional TF
Diagram 2 of the T manufacturing process

Claims (4)

[Claims] (1) (a) A first conductive film, a gate insulating film on an insulating substrate,
A first step of depositing a laminated film consisting of a semiconductor thin film (b) A second step of beam annealing the semiconductor thin film to form a recrystallized semiconductor film (c) To leave the laminated film as an island-like laminated film in the shape of a gate electrode A third step of selectively etching (d) a fourth step of depositing a field insulating film; and (e) a fifth step of selectively removing the field insulating film on the upper surface of the island-like laminated film.
Step (f) A sixth step of depositing a second conductive film; and (g) a seventh step of selectively etching the second conductive film to form a source electrode and a drain electrode in contact with the upper surface of the island-shaped laminated film. . A method for manufacturing a thin film transistor in which the first conductive film in the island-like laminated film is used as a gate electrode and the recrystallized semiconductor film is used as a channel region. (2) A patent claim in which at least a common portion of the second conductive film includes a low resistance semiconductor thin film of one conductivity type, and in the seventh step, a source region and a drain region are provided by the low resistance semiconductor thin film in contact with the recrystallized semiconductor film. A method for manufacturing a thin film transistor device according to item 1. (3) After the second step, a low-resistance semiconductor thin film of one conductivity type is deposited, and in the third step, the low-resistance thin film is simultaneously formed into an island-like laminated film, and in the seventh step, the second conductive film is selectively etched simultaneously. 2. The method of manufacturing a thin film transistor device according to claim 1, wherein the low resistance thin film is selectively removed to form a source region and a drain region. (4) Thicknesses or materials that allow light to pass through the substrate and the second conductive film were selected, and the selective etching in the seventh step utilized exposure using the island-like laminated film as a mask by light irradiation from the back side of the substrate. A method for manufacturing a thin film transistor according to any one of claims 1 to 3.