JPS63236975A - Duty ratio measuring device - Google Patents

Abstract

PURPOSE:To generate a signal corresponding to a duty ratio in response to even a high-speed pulse signal by detecting the intermediate value between the maximum and minimum value of a signal to be measured and also detecting the mean value, and outputting a signal corresponding to the deviation between both values. CONSTITUTION:Maximum and minimum value peak holding circuits 10 and 30 detect the maximum value and minimum value of a pulse signal from a signal source 100 and an intermediate value detecting circuit 40 detects the intermediate value between the maximum and minimum values. This intermediate value and the mean value from a mean value detecting circuit 20 are added and a differential amplifying circuit 50 outputs the signal corresponding to the duty ratio of the deviation between the intermediate value and mean value. The constitution which uses no clock pulses generates the signal corresponding to the duty ratio in response to even a high-speed pulse signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a duty ratio measuring device, and particularly to a duty ratio measuring device suitable for measuring the duty ratio of a high frequency signal.

[Conventional technology]

The duty ratio of a pulse waveform is expressed as a ratio of a high level to a period, and a time measurement method is known as a method for measuring the duty ratio.

[Problem that the invention seeks to solve]

In the conventional time measurement method, the pulse to be measured and the clock pulse signal are ANDed, the clock pulse signals are counted when the pulse signal to be measured is at a high level, and the duty ratio is measured from this counted value. Therefore, even if the clock pulse signal is 100100
Even if an O signal is used, only an ins resolution can be obtained, and the duty ratio of a high-speed pulse signal cannot be measured with high precision. That is, the period of 100100O is ins, and when the period of the clock pulse signal is ins, In
It is not possible to follow pulse signals smaller than s.

In addition, in order to measure the duty ratio of a pulse signal with a cycle of Ions and a duty ratio of 0.5 with an accuracy of 1%, a clock pulse signal with a cycle of 50 pS is required. It is difficult to generate a lock pulse signal.

An object of the present invention is to provide a duty ratio measuring device that can generate a signal according to the duty ratio in response to a high-speed pulse signal.

[Means for solving problems]

To achieve the above object, the present invention includes maximum value detection means for detecting the maximum value of the signal under measurement, minimum value detection means for detecting the minimum value of the signal under measurement, and detection means for detecting the average value of the signal under measurement. an average value detection means; and an intermediate value detection means for detecting an intermediate value of the signal under measurement from the output of the maximum value detection means and the output of the minimum value detection means.

The duty ratio measuring device includes a deviation detecting means for determining the deviation between the output of the intermediate value detecting means and the output t of the average value detecting means and outputting a signal corresponding to the deviation.

[Effect]

The maximum and minimum values of the signal under test are determined, and the intermediate value of the signal under test is calculated from these values. Furthermore, the average value of the signal to be measured is detected, the deviation between the intermediate value and the average value is determined, and a signal corresponding to the deviation is output.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

In FIG. 1, the duty ratio measuring device includes a maximum value peak hold circuit 10 as maximum value detection means, an average value detection circuit 20 as average value detection means, and a minimum value peak hold circuit 30 as minimum value detection means. , an intermediate value detecting means 40 as an intermediate value detecting means, a differential amplifier circuit 50 as a deviation detecting means, and a maximum value peak hold circuit 10 . Average value detection circuit 20. A pulse signal source 10 is connected to each input terminal of the minimum value peak hold circuit 30.
A high-speed pulse signal as a signal to be measured is input from 0 onwards.

As shown in FIG. 2, the maximum value peak hold circuit 10 includes an operational amplifier 11. Diode 12゜13, capacitor 14. It consists of resistors 15 and 16, and terminal 1
7 is connected to the pulse signal source 100, the terminal 18 is connected to the intermediate value detection circuit 40, and the terminal 19 is connected to the negative power supply.

The pulse signal input to the terminal 17 is charged in the capacitor 14, and the peak value of the pulse signal is outputted to the output terminal 18 via the operational amplifier 11. That is, when a pulse signal as shown in FIG. 4 is input to the terminal 17, a signal having the peak value Vo of the pulse signal is output from the terminal 18.

Here, the diode 13 constitutes a feedback circuit of the operational amplifier 11 and is also used to compensate for the forward voltage of the diode 12. Furthermore, since each of the diodes 12 and 13 is biased in the forward direction via the resistors 15 and 16, the DC resistance of each of the diodes 12 and 13 can be ignored.

Furthermore, since each of the diodes 12 and 13 is composed of high-speed diodes of the same type, they can also respond to high-speed pulse signals. That is, as the diodes 12 and 13, those having a small storage effect, capacitance between terminals, and forward voltage difference are used. Further, the capacitor 14 is used for voltage holding.

The time constant determined by the resistor 15 is sufficiently large compared to the period of the pulse signal to be measured, for example, several hundred to several thousand.
It is set to double.

As shown in FIG. 3, the minimum value peak hold circuit 30 includes an operational amplifier 31. Diode 32°33, capacitor 341. The terminal 37 is connected to the pulse signal source 100, the terminal 38 is connected to the intermediate value detection circuit 40, and the terminal 39 is connected to the positive power supply. The minimum value peak hold circuit 30 has a fourth
When a pulse signal as shown in the figure is input, a signal with the minimum value v of the pulse signal is held, and the held signal is output from the terminal 38. Diode 32.
33 is always biased through resistors 35 and 36, and the direct current resistance of diodes 32 and 33 can be ignored.

The intermediate value detection circuit 4o includes resistors 41 and 42, and a variable resistor 43.
By adjusting the variable resistor 43, the voltage between the output terminals 18 and 38 is set to be a voltage ratio of 1/2. Therefore, the output of variable resistor 33 is terminal 4
6 outputs a DC signal having an intermediate value VP between the maximum value VH and the minimum value VL.

That is, the intermediate value Vp is expressed by the following equation (1).

VP:VL+ −(VH−VL) −
(1) The average value detection circuit 20 is composed of a CR time constant circuit which is made up of a resistor and a capacitor and is sufficiently longer than the period of the pulse signal, and smoothes the pulse signal and converts the smoothed signal into the average value shown in FIG. The signal V is output. This average value V is expressed by the following equation (2).

T o + T L Here, TH: period greater than 50% amplitude of the pulse signal.

T: Φ period smaller than 50% amplitude of the pulse signal.

The differential amplifier circuit 50 is composed of resistors 51, 52, 53.degree. 54 and an operational amplifier 55, and a terminal 45 is connected to the average value detection circuit 2o, and a terminal 46 is connected to the intermediate value detection circuit 40. The differential amplifier circuit 50 takes in the signals of the intermediate value Vp and the average value V, and outputs a voltage V from a terminal 56 according to the deviation of these signals. This voltage V is expressed by the following (3) X.

(3) Here, =G (VH-VL), where G indicates the amplification degree of the differential amplifier 50.

In equation (3), TH/(TH+TL) represents the duty ratio of the pulse signal, so the output voltage Vo
indicates the enlarged deviation from the duty ratio of 0.5. That is, when the duty ratio of the pulse signal to be measured is 0.5, the output voltage V.

When becomes Ov, it can be measured that the duty ratio of the input pulse signal is 0.5.

Here, when a duty ratio of 32 MHz was measured as a pulse signal, measurement results as shown in FIG. 5 could be obtained. From this measurement result, according to the device according to this embodiment, the voltage is about 80 mV for a 32 MHz pulse signal.
A duty ratio gain of /% was obtained. Since the stability of the DC output at this time was about 10 mV, the accuracy was 0.12% in terms of duty ratio and 40 pS in terms of 1 hour.

As described above, in this embodiment, the duty ratio of the pulse signal is measured by converting the pulse signal to be measured into an analog value, so that even high-speed pulse signals can be accurately measured. Moreover, there is no need for a lock generator as in the prior art, and there is no need for a logic circuit that operates at GHz or higher.

〔Effect of the invention〕

According to the present invention, the signal component of a high-speed pulse signal is converted into an analog signal of an average value and an intermediate value, and the duty ratio is measured based on the deviation between the intermediate value and the average value. Can be measured with high precision,
The measuring device can be downsized and simplified.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a circuit diagram of a maximum value peak hold circuit, Fig. 3 is a circuit diagram of a minimum value peak hold circuit, and Fig. 4 is shown in Fig. 1. The waveform diagram of each part and FIG. 5 are characteristic diagrams showing the relationship between duty ratio and output voltage. 10... Maximum value peak hold circuit, 20... Average value detection circuit, 30... Minimum value peak hold circuit, 4
0...Intermediate value detection circuit, 50...Differential amplifier circuit, 1
00...Pulse signal source.

Claims (1)

[Claims] 1. Maximum value detection means for detecting the maximum value of the signal under test;
Minimum value detection means for detecting the minimum value of the signal under measurement, average value detection means for detecting the average value of the signal under measurement, and intermediate value of the signal under measurement from the output of the maximum value detection means and the output of the minimum value detection means. and a deviation detection means that determines the deviation between the output of the intermediate value detection means and the output of the average value detection means and outputs a signal according to the deviation. Ratio measuring device.