JPS639951A - Large scale integrated circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a large-scale integrated circuit incorporating a plurality of macro cells.

(Prior Art) In recent years, as electronic devices have become more sophisticated and larger in size, there has been an increasing demand for the development of large-scale integrated circuits in order to make devices smaller and cheaper. Moreover, this development
Since this is a field of rapid technological innovation, it is necessary to do so in a short period of time and reliably in order to cope with these advances. Therefore, in order to meet this demand, existing (that is, already developed) various LSIs such as CPUs and peripheral LSIs are used as design basic cells (called macrocells), and system-specific circuits are added to them to create a single chip. The method of accumulating on the top is increasingly being applied.

Now, some systems to which the large-scale integrated circuits developed in this way are applied do not necessarily require all macrocells in the large-scale integrated circuits. In such a system, unnecessary macrocells are not accessed, but if there is internal clock input, data bus, and address bus connections, there is a problem that power must be consumed in the standby state. was there.

(Problems to be Solved by the Invention) As described above, in conventional large-scale integrated circuits that include a plurality of macro cells, there is a problem in that power is consumed even in macro cells that are not used.

The present invention has been made in view of the above circumstances, and its purpose is to provide a large-scale integrated circuit in which there is no fear that power will be consumed in unnecessary macro cells.

[Structure of the Invention: Means and Effects for Solving the Problems] This invention provides a fuse group for each macrocell in a large-scale integrated circuit incorporating a plurality of macrocells, and performs the disconnection operation by each fuse group externally. A control means is provided to selectively control according to specifications, and it is possible to selectively disconnect only the power supply terminal, ground terminal, and input/output terminal of the macrocell that are not required by the system and the wiring outside the macrocell. It is something.

(Embodiment) FIG. 1 shows a block configuration of a large-scale integrated circuit (hereinafter referred to as system LSI) 10 according to an embodiment of the present invention. The system LS110 incorporates four macro cells 11-0 to 11-3 of Fuyume Noh.

The macro cell 11-0 includes, for example, one power supply terminal 12, one ground terminal 13, and a plurality of input/output terminals 14 (input only).

(including output-only). In this embodiment, the power supply end 12. A fuse box 15 is provided corresponding to the ground end 13 and the input/output end 14, respectively.

As shown in FIG. 2, this fuse box 15 receives a control signal C output from a decoder 22, which will be described later.
It has a fuse 15a, such as an aluminum pattern, which is blown by O, for example.

The power supply terminal 12 of the macro cell 11-0 is connected to the power supply line (power supply wiring pattern) via the corresponding fuse box 15.
16, and the ground end 13 is connected to the ground line (ground wiring pattern) 17 via the corresponding fuse box 15.
The input/output terminal 14 is connected to the signal line (signal transmission wiring pattern) via the corresponding fuse box 15.
18-0. Further, the power source end 19 of the system LSIIQ is connected to the power source line 16, and the ground end 20 of the system LS110 is connected to the ground line 17. Although omitted in FIG. 2, the macro cells 11-1 to 11-3 are also power supply terminals.

It has a ground terminal and an input/output terminal, and a control signal C1 is provided corresponding to the power supply terminal, ground terminal, and input/output terminal.
A fuse box (similar to fuse box 15) is provided that performs a disconnection operation according to C3. Then, similarly to macrocell 11-0, macrocell 11-1
The power supply terminals and ground terminals of macrocells 11-1 to 11-3 are connected to the power supply line 16 and ground line 17 through the corresponding fuse boxes, respectively, and the input and output terminals of the macrocells 11-1 to 11-3 are connected via the corresponding fuse boxes. Signal line 18-1
~18-3.

Power supply end 12 of macro cell 11-0. Fuse boxes 15 provided corresponding to the ground end 13 and the input/output end 14 are commonly connected to a signal line 21-0 for transmitting the control signal CO. Similarly, fuse boxes (none of which are shown) provided corresponding to the power supply end, ground end, and input/output end of macrocells 11-1 to 11-3 are connected to signal lines for transmitting control signals 01 to C3. 21-1 to 21-3. A decoder 22 is connected to the signal lines 21-0 to 21-3. This decoder 22 operates on macrocell selection information bits SO, configuring 2-bit macrocell selection information S,
It is also connected to the signal lines 23 and 24 for S1 transmission operation and the signal line 25 for transmitting the output permission signal E, and the information S
When the output permission signal E is logic "1", the control signal Ci for the macro cell 11-1 (1 is one of 1 to 4) specified by the information S is selectively set to logic "1".
1''. The input/output logic of the decoder 22 is shown in FIG. and is connected to the input end 28 of the system LS110.

Next, the operation of one embodiment of the present invention will be explained.

Now, in a system to which the system LS110 is applied, for example, macrocell 11 among macrocells 11-O to 11-3.
-0 is not required. In this case, in order to designate the macro cell 11-0, the macro cell selection information bits So and Sl of logic par 0'' are input to the input terminal 26.27 of the system LS 110. The signal is supplied to the decoder 22 via the signal.

Further, in order to set the decoder 22 to an output enable state, an output enable signal E of logic "O" is input to the input terminal 28. This signal E is supplied to the decoder 22 via the signal line 25, thereby placing the decoder 22 in an output enabled state. As a result, from the decoder 22, the signal line 2
3.24 Macro cell selection information bit So (-0
), the logic “
1n control signals CO are output (see input/output logic in FIG. 3).

Note that the signal line 25 is pulled up through the resistor R to prevent the decoder 22 from entering the output enable state unless a logic "0" output enable signal @E is input from the input terminal 28. , input end 26.27.28
is not connected (NG) in the system, so decoder 2
This is to prevent the control signal Ci from being inadvertently output from the control signal Ci.

Now, the control signal co of logic "1" output from the decoder 22 onto the signal line 21-0 is applied to the terminal a of the macro cell 11-O. Ground end 13. The signal is supplied to fuse boxes 15 provided corresponding to the input/output terminals 14, respectively. As a result, fuse 1 of fuse box 15
5a is fused, the connection between the terminal 12 of the electric wire 31 and the power line 16, the connection between the ground terminal 13 and the ground line 17, and the input/output terminal 14.
The connection between the signal line 18-o and the signal line 18-o is disconnected. Therefore, the macro cell 11-o is connected to the wiring within the system LSI10 and outside the macro cell 11-o, and to the system LSI10.
It is completely separated from the inside of SI10 (power supply terminal 19, ground terminal 20, and input/output terminal of the system 18110) and is not subjected to DC interference. If there are a plurality of macro cells that are not needed in the system, the operation of specifying the unnecessary macro cells using the macro cell selection information S and giving the output permission signal E of logic "o" may be repeated.

[Effects of the Invention] As detailed above, according to the present invention, among the plurality of macrocells that form part of a large-scale integrated circuit, for macrocells that are not required in the system, the power supply end, grounding end, and input/output Since the end can be separated from wiring outside the macrocell, power consumption in this type of macrocell can be prevented, making it suitable for systems that require low power consumption, such as battery-powered systems. Furthermore, since only the necessary macrocells can be used efficiently, there is no need to prepare various large-scale integrated circuits with different numbers of macrocells, and the versatility of large-scale integrated circuits incorporating macrocells is increased.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram of a large-scale integrated circuit (system LSI) according to an embodiment of the present invention, FIG. 2 is a diagram showing the configuration of the fuse box 15 shown in FIG. 1, and FIG.
It is a diagram showing the input/output logic of the decoder 22 shown in the figure. 10...System LS I 111-0 to 11-3.
...Macrocell, 12, 19...Power supply end, 13.20
...Grounding end, 15...Fuse box, 15a.
...Fuse, 16...Power line, 17...Ground line, 18-〇~18-3.21-0~21-3.2
3 to 25...Signal line, 22...Decoder. Figure 2 ×; No input Figure 3

Claims (1)

[Claims] In large-scale integrated circuits containing multiple macrocells,
a fuse group provided for each macrocell, the fuse group for disconnecting the power supply end, grounding end, and input/output end of the corresponding macrocell from wiring outside the same macrocell;
A large-scale integrated circuit comprising control means for selectively controlling the disconnection operation by the fuse group provided for each macro cell in accordance with an external designation.