KR100239016B1 - Differential comparator with adjustable threshold and tracking hysteresis - Google Patents

Abstract

A pair of differential inputs that turn on the first current switches 22, 23 to compare the differential and threshold voltages of the inputs through each of the same resistive networks 16, 30, 17, 31, Improved programmable comparator circuit with VN, VP). The threshold voltage is set by the voltage generated when the selected current flows through one of the resistor networks, and the bias current through one of the transistors forming the first current switch and the second current switches 12 and 13 A hysteresis current is established through one of the transistors forming the second current switch. Positive feedback means 28, 29, D 1 -D 4 coupled to the output of the first current switches 22, 23 control the second current switches 12, 13.

Description

[Name of invention]

Differential Comparator with Adjustable Threshold and Tracking Hysteresis

[Technical Field]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to differential comparator, and more particularly to a differential comparator that indicates whether a differential input is greater or less than a threshold by clearly comparing an analog differential signal with an arbitrary threshold.

[Background]

In analog signal processing, it is often required to be able to determine if a signal exceeds a prescribed level or threshold. A high gain differential amplifier without negative feedback can be used as a comparator to achieve this by connecting a positive input to an input signal and a negative input to a desired threshold. In many analog systems, the input signal is differential to the purpose of removing noise present at the input relative to a reference potential, for example ground potential. Accordingly, a comparator capable of directly processing differential input signals is desired.

In analog systems such as high performance hard disk drive read channels, the threshold is not fixed and changes as the average amplitude of the input signal changes. This change is caused by temporal and positional fluctuations in the read head, magnetic medium, and the like. For these reasons, differential signals are used in such systems. Thus, a differential comparator with an adjustable threshold is desired.

In addition, the digital logic required to process the output of such a comparator requires a firm signal at the comparator output. If the comparator output is in the middle of two logic levels or switches rapidly between logic levels, the digital logic cannot interpret that output. This problem is particularly common when the input signal is close to the threshold voltage of the comparator.

Currently, the industry desires a comparator circuit that can solve all the above problems. Since comparators currently available do not have these desired characteristics, there is a need for comparators with direct processing of differential input signals and with adjustable thresholds.

[Summary of invention]

Accordingly, the present invention provides a differential comparator having an adjustable threshold and hysteresis that tracks the threshold when the threshold is adjusted.

The present invention is a programmable comparator circuit having a pair of differential inputs coupled through each same resistive network, which turns on the active element of the first current switch. By turning on this element of the current switch, it is possible to compare the difference between the inputs and the threshold voltage set by the selected current value through each resistor network. By doing so, one of the transistors forming the first current switch and the second to turn on the second switch and thus establish a hysteresis current through one of the transistors forming the second current switch. A bias current is established through the current switch. By providing positive feedback means from the output of the first current switch, control of the second current switch is assured.

[Brief Description of Drawings]

1 is a schematic diagram of a simple embodiment of the present invention.

2 is a schematic representation of a preferred embodiment of the present invention.

Detailed Description of the Preferred Embodiments

Referring to the drawings and in particular to FIG. 1, a simple embodiment of a comparator circuit of the invention is schematically illustrated. This schematic illustrates the comparator circuit 10 of the present invention, in which a pair of NPN bipolar emitter coupled transistors (NPN, bipolar, emitter) are coupled to ground via a hysteresis current source 15. and a hysteresis switch 11 composed of coupled transistors 12 and 13. The collectors of transistors 12 and 13 are coupled to respective differential inputs 18 and 19 via respective hysteresis resistors 16 and 17, the base of transistors 12 and 13 being the respective diode pair D1. Are coupled to outputs 20 and 21 via D2 and D3 and D4, respectively.

The circuit 10 further includes a second emitter coupled switch formed of a pair of NPN bipolar, emitter coupled, main amplifier transistors 22,23. Emitters of main amplifier transistors 22 and 23 are coupled to ground 14 via bias current source 24. The collectors of the amplifier transistors 22, 23 are coupled to the supply voltage V _DD and the respective output NPN bipolar drive transistors 28, 29 via respective current resistors 26, 27. The bases of the main amplifier transistors 22, 23 are coupled to the collectors of the switching transistors 12, 13 via respective threshold resistors 30, 31, respectively. The base of the amplifier transistor 23 is also coupled to ground 14 via a threshold current source 33.

The collectors of the output drive transistors 28 and 29 are coupled to the voltage source V _DD , and the emitter is coupled to the respective outputs 20 and 21, respectively, and through each diode pair D1, D2 and D3 and D4. It is coupled to the base of each switch transistor 12 and 13.

The above circuit operates as follows. Suppose a varying differential input voltage signal is applied to inputs 18 and 19, respectively. For purposes of explanation, assume that the voltage of the signal applied to input 118 is initially much higher than the voltage of the signal applied to input 19. The higher voltage applied to the input 18 turns on the amplifier transistor 22 so that current can flow from the voltage source V _DD to the ground 14 via the current resistor 26, the transistor 22 and the current source 24. Will be. When the transistor 22 is turned on, the voltage applied to the base of the driving transistor 28 is lowered. Since the transistor 28 operates as an emitter follower, when its base voltage is lowered, the voltage at its emitter and the base of the transistor 12 is lowered, and the transistor 12 is turned off. .

At the same time, the transistor 23 is in the off state by the lower input voltage applied from the input 19 to the base. Since the transistor 23 is in the off state, the voltage applied to the base of the drive transistor 29 remains high, the transistor 13 remains on, and current is supplied from the input 19 to the hysteresis resistance ( 17), to the ground via the transistor 13 and the hysteresis current source 15. It should be noted that under all circuit conditions the threshold current source 33 continues to flow a constant current from the input 19 through the hysteresis resistor 17 and the threshold resistor 31.

When the input voltage signal applied changes, the difference between them decreases, and when the voltage difference between the two inputs approaches the total voltage across the threshold resistor 31 and the hysteresis resistor 17, the main amplifier transistors 22 and 23 Everyone starts to challenge and the amplifier enters linear mode.

If the main amplifier is in linear mode, the hysteresis switch consisting of transistors 12 and 13 also enters linear mode, because each amplifier transistor is coupled to each collector and collector of the hysteresis switch transistors 12 and 13, respectively. This is because of the feedback loop between the bases of (22, 23). The feedback between transistors 12 and 13 and the feedback between transistors 13 and 23 are positive feedback, causing the entire network to switch when the feedback loop reaches unity gain. This switching occurs approximately at the point where the voltages applied to the bases of the transistors 22 and 23 are equal.

When the differential voltage applied to the inputs 18 and 19 continues to change, i.e., the input 19 is higher than the sum of the total voltage across the threshold resistor 31 and the hysteresis resistor 17 at the input 18. At the voltage, the amplifier transistor 23 is turned on more fully, and the transistor 22 is turned off. The current flowing from V _DD through the bias current source 24 to ground 14 is now switched from V _DD to flow through the current resistor 27, transistor 23, and source 24 to ground 14. When the transistor 23 is turned on, the voltage applied to the base of the driving transistor 29 is lowered. Since the transistor 29 operates as an emitter follower, lowering the base voltage of the transistor 29 lowers the voltage at the emitter of the transistor 29 and the base of the transistor 13, and the transistor 13 Is turned off.

Now, when the transistor 22 is turned off, the voltage applied to the base of the driving transistor 28 becomes high to turn on the transistor 12, and the current is now input from the hysteresis resistor 16, the transistor ( 12) and hysteresis current source 15 to ground. It should be noted that under all circuit conditions, the threshold current source 33 continues to flow a constant current from the signal source 19 through both the hysteresis resistor 17 and the threshold resistor 31.

If the input voltage VP at the input 19 is now reduced with respect to the input voltage VN at the input 18, the circuit will ultimately return to the initial state described above. However, the threshold voltage when this happens is different from the threshold voltage value when the circuit is switched from the initial state. This is because current I _H now flows through hysteresis resistor 16 instead of hysteresis resistor 17. This allows the base of the amplifier transistor 22 to be at a voltage lower by I _H R _H than the input voltage VN, while the base of the amplifier transistor 23 is lower by I _T (R _H + R _T ) than the input voltage VP Will be in. The switch point from this state is also when these base voltages are approximately equal, i.e.

(VP-VN) = I _T (R _H + R _T ) -I _H R _H

If it happens. This indicates that the switchover point from the initial state described above

(VP-VN) = I _T (R _H + R _T ) + I _H R _H

Contrast with that in.

As such, a comparator circuit is disclosed that can clearly compare analog differential signals with any threshold level. The circuit can also logically indicate whether the differential input is greater than the threshold (logic 1 output) or smaller (logic 0 output).

The comparator draws the transition point at a voltage higher or lower than the threshold I _T (R _H + R _T ) by the current I _H flowing through the hysteresis current source 15 and the voltage I _H R _H corresponding to the resistance (R _H , 16). Therefore, it can be easily explained that the hysteresis width becomes 2I _H R _H. This means that the hysteresis of the comparator can be set independently of the threshold voltage or can be set to track the threshold voltage by simply selecting the appropriate values of I _T , I _H , R _T , and R _H.

Analyzing the circuit shows that by meeting the following criteria, the comparator threshold is proportional to the externally applied voltage V _TH and the hysteresis is αV _TH (where α is the desired proportional constant between the threshold and the hysteresis). It is easy to see.

A preferred embodiment of the comparator is shown in FIG. In Fig. 2, the comparator circuit of the present invention comprises a hysteresis current switch consisting of a pair of NPN bipolar emitter coupling transistors 112 and 113, whose emitter is coupled to ground 114 via a hysteresis current source 115. The collectors of transistors 112 and 113 are coupled to emitters of a pair of NPN bipolar emitter coupled transistors 140 and 141 through respective hysteresis resistors 116 and 117, respectively. That is, the collector of transistor 112 is connected to the emitter of emitter follower transistor 140 and the collector of auxiliary switch transistor 113 is coupled to the emitter of emitter follower transistor 141. Each differential input 118, 119 is coupled to the base of these emitter follower transistors 140, 141, respectively. The bases of the switching transistors 112 and 113 are coupled to the outputs 120 and 121 through respective diode pairs D7, D8 and D13 and D14, respectively.

The auxiliary emitter coupled current switch is composed of NPN bipolar transistors 142 and 143 whose base is commonly coupled to the base of the switching transistors 112 and 113. This auxiliary current switch is also coupled between emitter follower transistors 140 and 141 and ground 114. More specifically, the emitters of the auxiliary transistors 142 and 143 are coupled to ground 114 through separate current sources 115a, and the collector is cross coupled to each emitter of the emitter follower transistors 140 and 141. -coupled). As such, the collector of transistor 142 is connected to the emitter of emitter follower transistor 141, and the collector of auxiliary switch transistor 143 is coupled to the emitter of emitter follower transistor 140. .

As shown in FIG. 1, the circuit shown in FIG. 2 further includes a pair of NPN bipolar emitter coupled main amplifier transistors 122, 123. Emitters of main amplifier transistors 122 and 123 are coupled to ground 114 through bias current source 124. The collectors of the amplifier transistors 122 and 123 are coupled to the supply voltage V _DD through respective current resistors 126 and 127, and are also coupled to the bases of the respective output driving NPN bipolar transistors 128 and 129, respectively. The bases of the main amplifier transistors 122 and 123 are connected to the collectors of the switching transistors 112 and 113 through respective threshold resistors 130 and 131, respectively. The base of the amplifier transistor 123 is also coupled to ground 114 via a threshold current source 133.

The collectors of the output drive transistors 128 and 129 are coupled to the voltage source V _DD , and the emitters are coupled to the respective outputs 120 and 121, respectively, through respective diode pairs D7, D8 and D13 and D14. It is also coupled to the base of (112,113).

By adding an auxiliary current switch consisting of emitter follower transistors 140 and 141 and transistors 142 and 143, the operation of the comparator circuit of the present invention is significantly improved. By buffering the input voltages V _P and V _N with emitter follower transistors 140 and 141, the effective load on the circuit driving them is reduced. The addition of these elements 140, 141 and 142, 143 also results in a level shift by the base-emitter voltage V _be , and any base-emitter voltage V between the two emitter follower transistors 140, 141. _be mismatch appears as an offset from the threshold voltage. The minimum V _be difference occurs when the current through the two devices is the same. The current through the emitter follower transistors 140 and 141 is set to all operating conditions by selectively setting the bias current level passing through the second and third current switches, i.e., current switches comprised of transistors 124 and 133 and transistors 142 and 143, respectively. Can be made constant under the following conditions.

As described above, by cross-coupling the collectors of the auxiliary current switch transistors 142 and 143, the surplus hysteresis current I _H through the current source 115a is controlled by an emitter follower transistor driving the main amplifier transistor in the on state. do. This current is chosen such that the total current in the follower transistors 140 and 141 is exactly equal given all bias and base currents flowing in the circuit. In the actual circuit fabricated, the threshold voltage was 80% of the voltage difference between the external threshold voltage and the reference voltage, and the actual width of the hysteresis was 20% of the threshold voltage.

Although the circuit is shown implemented using an NPN bipolar transistor, it should be noted that it can be replaced by a PNP bipolar transistor by appropriately varying the voltage. In addition, field effect transistors (FETs) such as MOSFETs can also be used, but circuit speed and accuracy are reduced when using such FET devices.

As described above, the present invention discloses a fully differential comparator circuit for comparing a predetermined threshold voltage with a differential input, which can be adjusted by varying the voltage of the differential input to the circuit. The comparator of the present invention also provides hysteresis to track the threshold by a factor of 1 or less.

This concludes the description of the preferred embodiment of the present invention. As changes may be made in the above process without departing from the scope of the invention described herein, it is to be understood that all matter contained in the above description or shown in the accompanying drawings is illustrative and not restrictive. Accordingly, other alternatives and modifications will be apparent to those skilled in the art without departing from the spirit and scope of the invention as set forth in the claims below.

Claims (12)

1. A programmable comparator circuit, comprising: a pair of differential inputs; And positive feed back means, wherein each of the differential inputs is coupled to a first current switch through a respective resistor network, each comprising two resistors. Turn on the first switch to compare the differential voltage between the inputs with a threshold voltage established by a current through a selected one of the respective resistive networks, and Establish a bias current through one of the transistors forming a current switch and through the second switch to turn on a second current switch, and one of the transistors forming the second current switch Establishes a hysteresis current through which the positive feedback means phases to control the second current switch. The program, characterized in that coupled to both the output of the current switch of the first available comparator circuit (programmable comparator circuit). In a programmable comparator circuit, a pair of resistor networks, each of which includes a threshold resistor and a hysteresis resistor, a pair of differential inputs, and a positive feed back means. each of said differential inputs is coupled to a first current switch consisting of a first pair of transistors via a respective resistor network, and the differential voltage between said inputs of the transistors that turn on the first switch and form the first current switch to compare a differential voltage with a threshold voltage established by a current through a selected one of the respective resistive networks. The second switch to turn on a second current switch through one and consisting of a second pair of transistors A bias current through the device, a hysteresis current through one of the transistors forming the second current switch, the positive feedback means being equal to a voltage drop across the hysteresis resistance in the resistor network. A programmable comparator circuit coupled to the output of the first current switch to control the second current switch to produce a predictable hysteresis voltage. Further comprising a third current switch comprised of a third pair of transistors, wherein the differential inputs are respectively coupled to a current source through the third current switch transistors, and wherein the positive feedback means is connected to the first source switch. A programmable comparator circuit, characterized in that it is cross-coupled to control the transistors of the current switch of three. A programmable comparator circuit, comprising a pair of differential inputs and positive feed back means, each of the differential inputs being coupled to a first transistor pair through a respective resistor network. Coupled to a first current switch consisting of: comparing the differential of the input with a threshold voltage established by a selected one of the input voltages across one of the respective resistive networks Bias through the second switch to turn on the first switch, through one of the transistors forming the first current switch, and to turn on a second current switch comprised of a second pair of transistors. Hysteresis through one of the transistors that establish a current and form the second current switch To establish a hysteresis current, and the positive feedback means controls the second current switch to produce a predictable hysteresis voltage, such as a voltage drop across the other one of the resistive networks. A programmable comparator circuit coupled to the output of said first current switch. Further comprising a third current switch comprised of a third pair of transistors, wherein the differential inputs are respectively coupled to ground through the third current switch transistors, and wherein the positive feedback means comprises: A programmable comparator circuit, characterized in that it is cross-coupled to control the transistors of the current switch of three. 2. The programmable comparator circuit of claim 1 wherein the transistor is a bipolar transistor. 2. The programmable comparator circuit of claim 1, wherein each of the current switches comprises a pair of emitter coupled NPN bipolar transistors. 5. The method of claim 4, wherein each identical resistor network has a first and a second resistor, the second current switch includes a second NPN bipolar transistor pair, and controls the second current switch. And wherein said positive feedback means coupled to the output of said first current switch comprises said second resistor. 5. The apparatus of claim 4, further comprising a pair of emitter follower transistors, each of the follower transistors being coupled between the input and the first resistor in each of the network respectively. Programmable comparator circuit characterized. 10. The apparatus of claim 9 further comprising a third current switch, the outputs of which are respectively cross coupled to each junction between each emitter follower transistor and the first resistor in each of the network. Programmable comparator circuitry. 5. The programmable comparator circuit of claim 4 wherein the hysteresis current is proportional to a threshold current. 11. The programmable comparator circuit of claim 10 wherein the bias current levels of the second and third current switches are set to provide a constant current to the emitter follower transistors.

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