KR100441275B1 - Testing method for lead of semiconductor package - Google Patents

Abstract

The present invention relates to a method for inspecting a lead of a semiconductor package, and measures the coordinates of the free end of each lead 12 and the center of gravity (G) of the semiconductor package from a photographed image, and the Z axis in the free end coordinates of the leads 12. Comparing the coordinates to each other, the lead having the largest Z-axis coordinate is taken as the first reference lead LD1, and then the virtual plane and / or the semiconductor package 10 is properly rotated in consideration of the semiconductor package center of gravity G. The virtual plane P3 'corresponding to the motherboard is systematically tracked, and the vertical distance between the virtual plane P3' corresponding to the motherboard and the leads 12 is measured, and the measured value Hmax is used as a medium. Since it is a method for discriminating whether there is a product defect, the molding defect inspection of the lid 12 is performed efficiently, and the amount of calculation for the lid inspection is greatly reduced, and the inspection speed is greatly reduced.

Description

Testing method for lead of semiconductor package

The present invention relates to a method of inspecting a lead of a semiconductor package, and more particularly, to a method of inspecting a molding defect of a lead indirectly from a photographed image after photographing a plane, both sides, and / or a front and back surface of the semiconductor package.

As is well known, semiconductor packages are largely classified into that a semiconductor chip is mounted on a lead frame and that a semiconductor chip is mounted on a printed circuit board.

In detail, a manufacturing process of a semiconductor package using a lead frame is described in detail. A lead frame in which a semiconductor chip is mounted is molded through a molding apparatus, and a junk and a dambar of the lead frame are processed through a trimming apparatus. After removing and cutting and bending the lead of the lead frame through the forming apparatus, the semiconductor package is separated from the lead frame body by cutting the connection between the semiconductor package and the lead frame through the singulation apparatus. The semiconductor package separated from the lead frame main body has a structure in which leads are protruded to the outside of the molded package main body, and inspection apparatuses for detecting defects are installed before, during or after each manufacturing process.

On the other hand, defect inspection of the lead is generally performed after the semiconductor package is completed. If the lead is not formed properly, when the semiconductor package is mounted on the main board, a number of leads are lifted from the main board by more than the allowable distance. Since a problem arises that the welding thereof is not properly performed, defect inspection of the lead is also one of the very important inspection process. Therefore, in the defect inspection of the lead, in the state that the semiconductor package is mounted on the main board and supported, the separation distance between the leads and the main board in the vertical direction is measured, and the separation distance between them exceeds the set reference value (allowed value). The main purpose is to determine whether or not.

Conventionally, a lead inspection method of a semiconductor package is largely classified into a physical method and a method using a virtual plane.

First, the physical method is to actually place the semiconductor package on the base of the flat plate corresponding to the motherboard, and then to measure the separation distance in the vertical direction between the leads from the base, which is a semiconductor package Is the most ideal because it measures the lift of the leads while reproducing the environment mounted on the main board. However, the lead deformation is caused by external interference during the process of placing the semiconductor package on the base for the lead inspection. This may be caused, and in order to prevent this, an experimental device with high precision is required, and due to a problem that a lot of work time is required for lead inspection, it is rarely used at present.

On the other hand, the conventional virtual plane is a method of sequentially performing the following steps in the state of photographing the plane, both sides and / or front and rear surfaces of the semiconductor package.

First step; Measuring the coordinates of the free end of each lead and the center of gravity of the semiconductor package from the captured image and storing it.

The second step is to take three leads in order of leads having the largest Z-axis coordinate values (leads having the longest lead length) and storing them as reference leads.

Third step; On the reference plane passing through the three reference leads, the center of gravity of the semiconductor package is projected to determine whether the center of gravity of the projected semiconductor package is located on a triangular plane connecting the free ends of the three reference leads. From the other leads except the leads, it is determined whether the free end thereof is located below the reference plane. If all of these conditions are satisfied, the fifth step is performed. If all these conditions are not satisfied, the fourth step is performed. Steps to perform.

4th step; Taking three of the leads of the semiconductor package sequentially and storing the three leads as reference leads and then returning to the third step.

Fifth step; Measure the vertical distance from the free end of the leads, excluding the three reference leads, to the reference plane across the three reference leads, and compare these measurements with the set reference values (allowed values), so that at least one of the measured values If the set reference value is exceeded, the product is determined to be defective. If all of the measured values do not exceed the set reference value, the product is judged to be normal.

In the method using the virtual plane, the plane and both left and right and / or front and rear surfaces of the semiconductor package are photographed, the free end coordinate values of the leads are measured from the photographed image, and then the semiconductor package is placed on the virtual plane. Since a virtual plane is brought into contact with the lead free end of the semiconductor package to check the lift of the leads, no physical force is applied to the leads during the lead inspection operation, thereby preventing their deformation and miniaturizing the experimental equipment. Although there is an advantage in that it is possible, the task of setting the virtual plane is not systematic and the inspection speed is lowered, which causes a problem of shortening the inspection work time.

In more detail, in the conventional method using the virtual plane, if any of the first three reference leads (the lead with the longest lead length) set up does not satisfy both conditions, any three leads of the semiconductor package may be used. After sequentially taking these as the reference lead, it is necessary to determine whether the two conditions are satisfied by using a plane passing through three arbitrarily selected reference leads as the reference plane, so that the number of calculation operations is greatly increased and the inspection speed is greatly reduced.

For example, when the number of leads of the semiconductor package is 40, the number of cases where three of them can be arbitrarily taken is 9360 (see Equation 1), so that the plane passing through the free ends of the three reference leads arbitrarily selected, It is necessary to repeat the operation of determining the two conditions 9360 times while the three reference leads are in contact.

Where X is the number of cases, n is the number of reads, and r is the number of choices.

Accordingly, the present invention has been invented to solve the above problems, and actually tracks three leads supported on the main board systematically, so that the calculation amount for the lead inspection is greatly reduced, thereby significantly reducing the inspection speed. It is an object of the present invention to provide a method for inspecting a lead of a semiconductor package.

1 is a view for explaining a step of measuring the free end coordinates of the leads by setting a reference coordinate system from the photographed image,

2A and 2B are views for explaining a step of selecting a lead having the longest lead length as a first reference lead;

3A to 3C are diagrams for explaining a step of selecting a second reference lead;

4A and 4B are views for explaining a step of selecting a third reference lead;

5A and 5B are diagrams for explaining a step of determining whether selected first, second, and third reference leads are actually leads supported on a main board;

6A and 6B are diagrams for describing a step of reselecting reference leads;

7A and 7B are diagrams for explaining a step of determining whether the reselected first, second, and third reference leads are actually leads supported on the main board;

8 is a view for explaining a step of determining whether a semiconductor package product defects.

-Explanation of terms for the main parts of the accompanying drawings-

10; Semiconductor package 11; main body,

12; Lead, G; Weight,

G ', G "; center of gravity projected perpendicular to the third reference plane,

Hx; Vertical distance from the free end of the lead to the third reference plane,

L0; Temporary baseline, L1, L1 '; First Baseline,

L2, L2 '; Second baseline, L3, L3 '; Third Baseline,

La; A straight line intersecting the free end of the lead at an angle of 90 ° to the temporary reference line,

Lb; A straight line crossing the free end of the lead at an angle of 90 ° to the first reference line,

Lg; A straight line passing through the free end of the first reference lead and the center of gravity,

LD1, LD1 '; First reference lead, LD2, LD2 '; 2nd standard lead,

LD3, LD3 '; 3rd standard lead,

Lc; A straight line connecting any point located inside the triangular plane on the third reference plane and the projected center of gravity,

P1; First reference plane, P2, P2 '; Second reference plane,

P3, P3 '; Third reference plane,

Pt; Any point located inside a triangular plane on the third reference plane,

Pxy; A plane consisting of the X and Y axes,

T, T '; A triangular plane on a third reference plane consisting of first, second and third reference lines,

θ1; A straight line intersecting the free end of the lead at an angle of 90 ° with the temporary reference line, the inclination angle with the first reference plane,

θ2, θ2 '; A straight line intersecting at an angle of 90 ° with the first reference line while passing through the free end of the lead, the inclination angle with the second reference plane,

θ3; The angle of inclination between the third reference plane and the XY axis plane.

In order to achieve the above object, the present invention measures the coordinates of the free end of each lead and the center of gravity of a semiconductor package from a photographed image, and compares the Z-axis coordinates among the free end coordinates of the leads to have the largest Z-axis coordinate. Is taken as the first reference lead, then the virtual plane and / or the semiconductor package are properly rotated in consideration of the semiconductor package center of gravity to systematically track the virtual plane corresponding to the motherboard, and the virtual plane and lead corresponding to the motherboard After measuring the vertical distance between them, it is a lead inspection method of a semiconductor package characterized by determining whether or not a product defect is made through this measured value.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

The lead inspection method of a semiconductor package according to the present invention consists of the following seven sequential steps.

First step (see FIG. 1); Measuring and storing the coordinates (x, y, z) of the free end of each lead 12 and the center of gravity (G) of the semiconductor package from the captured image. As the photographed image, it is common to use a photograph of a plane, both left and right and / or front and rear surfaces of the semiconductor package 10, and take the vertex of the bottom surface of the semiconductor package main body 11 as the origin of the XYZ axis coordinates. In the present embodiment, the horizontal and vertical directions of the semiconductor package main body 11 are taken as the X axis and the Y axis, and the width direction of the semiconductor package main body 11 is taken as the Z axis. 1 is a perspective view showing a semiconductor package for explaining this step.

Second step (see FIGS. 2A and 2B); Comparing the Z axis coordinates among the free end coordinates of the leads 12 and storing the lead having the largest Z axis coordinate as the first reference lead LD1. Referring to the reference coordinate system, since the lead with the largest Z-axis coordinate (the lead with the largest absolute value) is the longest lead 12 from the semiconductor package body 11, the Z-axis coordinates are compared with each other. Stores the largest lead 12 as the first reference lead LD1. 2A is a front view of the semiconductor package, and FIG. 2B is a plan view of the semiconductor package.

Third step (see FIGS. 3A-3C); Passing a free end of the first reference lead LD1, and storing a plane parallel to the XY axis plane Pxy as the first reference plane P1; A first reference plane that crosses the free end of the first reference lead LD1 at an angle of 90 ° with a straight line Lg passing through the free end of the first reference lead LD1 and the center of gravity G. Storing the straight line on (P1) as a temporary reference line (L0); After measuring the inclination angle between the straight line La and the first reference plane (P1) intersecting the temporary reference line (L0) at an angle of 90 ° while passing through the free end of the lead (12); Storing the lead having the smallest angle of inclination θ1 as the second reference lead LD2. Here, the lead 12 and the first reference lead LD1 positioned on the opposite side of the center of gravity G with respect to the temporary reference line L0 may include a straight line La and a first reference plane P1 corresponding thereto. It is not necessary to measure the inclination angle θ1 with). 3A is a perspective view illustrating a semiconductor package, FIG. 3B is a plan view of the semiconductor package, and FIG. 3C illustrates an arrangement state between the first reference lead LD1 and the second reference lead LD2. As a figure, it is a state figure seen from the right side of the temporary reference line L0.

Fourth step (see FIGS. 4A and 4B); Storing a straight line passing through the free end of the first reference lead LD1 and the free end of the second reference lead LD2 as the first reference line L1; The plane crossing the first reference plane P1 while passing through the first reference line L1 forms an angle equal to the inclination angle θ1 formed by the first reference line L1 and the first reference plane P1. 2 Save as reference plane (P2); After measuring the inclination angle between the straight line (Lb) and the second reference plane (P2) intersecting the first reference line (L1) at an angle of 90 ° while passing through the free end of the lead; Storing the lead having the smallest angle of inclination θ2 as the third reference lead LD3. Here, the lead 12 and the first and second reference leads LD1 and LD2 positioned opposite to the center of gravity G with respect to the first reference line L1 may correspond to the straight lines Lb and the corresponding lines. It is not necessary to measure the inclination angle θ2 with the two reference planes P2. 4A is a perspective view illustrating a semiconductor package, and FIG. 4B is a diagram illustrating an arrangement state of the third reference lead LD3, and is a state diagram seen from the right side of the first reference line L1.

A fifth step (see FIGS. 5A and 5B); Storing a straight line passing through the free end of the second reference lead LD2 and the free end of the third reference lead LD3 as the second reference line L2; Storing a straight line passing through the free end of the first reference lead LD1 and the free end of the third reference lead LD3 as the third reference line L3; After storing the plane passing through the free ends of the first, second, and third reference leads LD1, LD2, and LD3 as the third reference plane P3; The center of gravity G of the semiconductor package is projected on the second reference plane P2 at an angle of 90 °, and the projected center of gravity G 'is formed of the first, second and third reference lines L1, L2 and L3. If the projected center of gravity G 'is positioned inside the triangular plane T, it is determined whether it is located inside the triangular plane T on the third reference plane P3. If the center of gravity (G ') is not located inside the triangular plane (T) performing a sixth step. This step is to determine whether the first, second and third reference leads LD1, LD2, and LD3 are actually supported leads on the main board, assuming the third reference plane P3 as the main board. When the projected center of gravity G ′ is positioned inside the triangular plane T, the semiconductor package 10 may pass through the third reference plane 3 through the first, second and third reference leads LD1, LD2, and LD3. If the projected center of gravity G 'is not positioned inside the triangular plane T, the semiconductor package 10 is rotated toward the projected center of gravity G'. To be considered. 5A is a perspective view illustrating a semiconductor package, and FIG. 5B is a plan view of FIG. 5A.

Sixth step (see FIGS. 6A and 6B); Arbitrary point Pt located inside the triangular plane T on the 3rd reference plane P3 which consists of 1st, 2nd, 3rd reference lines L1, L2, L3, and the projected center of gravity G ' Connecting any one of the reference lines L2 intersecting the connecting line Lc among the reference lines L1, L2, L3 constituting the triangular plane T by the straight line connection to the first reference line L1 '; Changing the corresponding leads forming both ends of the changed first reference line L1 'into first and second reference leads LD1' and LD2 '; Changing the third reference plane P3 to the second reference plane P2 '; Measuring the inclination angle between the straight line Lb intersecting the first reference line L1 'at an angle of 90 ° while passing through the free end of the lead 12, and the second reference plane P2'; After storing the lead having the smallest value of the inclination angle θ2 'as the third reference lead LD3'; Returning to the fifth step. Here, the lead 12 positioned on the opposite side of the center of gravity G from the first reference line L1 'and the first and second reference leads LD1' and LD2 'correspond to straight lines Lb. It is not necessary to measure the inclination angle θ2 'between') and the second reference plane P2 '. 6A is a view illustrating the center of gravity G, the projected center of gravity G, and the triangular plane T in the vertical direction of the third reference plane P3, and FIG. 6B illustrates the semiconductor package. In the perspective view shown, some leads are omitted for the purpose of differentiation between lines.

For reference, after returning to the fifth step, as shown in FIGS. 7A and 7B, the third reference plane P3 passing through the first, second and third reference leads LD1 ′, LD2 ′ and LD3 ′ may be used. After projecting the center of gravity G ″ perpendicularly to '), the projected center of gravity G ″ consists of the first, second and third reference lines L1', L2 ', L3' and the third reference plane P3. It is judged whether it is located inside the triangular plane (T ') on'). FIG. 7A is a perspective view of a semiconductor package, in which some leads are omitted to distinguish lines, and FIG. 7B is a plan view of FIG. 7A.

Seventh step (see Fig. 8); The vertical distance from the free end of the lead 12 to the third reference plane P3 'is measured, and the measured values Hx are compared with the set reference value Hmax, and at least one of the measured values Hx. If the measured value (Hx) exceeds the set reference value (Hmax) is determined to be a product defect, and if all the measured values (Hx) do not exceed the set reference value (Hmax) to determine the product normal. Here, in the case of the first, second and third reference leads LD1 ′, LD2 ′ and LD3 ′ among the leads 12, the third reference plane P3 ′ contacts the third reference plane P3 ′, and thus a vertical distance thereof needs to be measured. There is no. 8 is a front view illustrating a state where the reference leads LD1 ', LD2', LD3 'and the third reference plane P3' are in contact with each other, and the XY axis plane Pxy is shown. As a reference, the third reference plane P3 'is rotated and brought into contact with each other.

According to the present invention, the virtual plane and / or the semiconductor package is properly rotated in consideration of the semiconductor package center of gravity to systematically track the virtual plane corresponding to the main board, and the vertical distance between the virtual plane corresponding to the main board and the leads After measuring, the method determines whether the product is defective based on this measurement value, and compared with the conventional method of conditionally comparing all virtual planes that the leads of the semiconductor package can achieve, the amount of calculation for the lead inspection is greatly reduced. The inspection speed is greatly reduced.

On the other hand, even if the measured values Hx do not all exceed the set reference value Hmax, the inclination angle θ3 formed between the third reference plane P3 'and the XY axis plane Pxy exceeds the set reference value θmax. In this case, that is, if the semiconductor package 10 mounted on the motherboard is tilted more than the allowable value, there is a risk that the semiconductor package is damaged or its function is degraded.

Therefore, when the inclination angle θ3 formed between the third reference plane P3 'and the XY axis plane Pxy exceeds the set reference value θmax, it is determined that the product is defective, and the inclination angle θ3 is the set reference value θmax. ), It is preferable to perform the step of determining that the product is normal before the seventh step or after the seventh step to treat the excessively inclined semiconductor package as a product defect (see FIG. 8).

According to the present invention as described above, the coordinates of the free end of each lead and the center of gravity of the semiconductor package are measured from the photographed image, and the Z-axis coordinates of the lead having the largest Z-axis coordinate are compared by comparing the Z-axis coordinates among the free end coordinates of the leads. After taking the first reference lead, the virtual plane and / or the semiconductor package is properly rotated in consideration of the center of gravity of the semiconductor package to systematically track the virtual plane corresponding to the main board, and between the virtual plane and the lead corresponding to the main board. It is a method to determine whether there is a product defect by measuring the vertical distance of the product, and the molding defect inspection of the lead is carried out efficiently, so that the calculation amount for the lead inspection is greatly reduced, and the inspection speed is greatly reduced. It is effective.

The present invention is not limited to the embodiment as described above, and of course, various modifications can be made without departing from the scope of the following claims.

Claims (2)

First step; Measuring and storing the coordinates of the free end of each lead and the center of gravity of the semiconductor package from the photographed image; Second step; Comparing the Z-axis coordinates among the free end coordinates of the leads and storing the lead having the largest Z-axis coordinate as the first reference lead, Third step; Passing a free end of the first reference lead, storing a plane parallel to the XY axis plane as the first reference plane; Storing as a temporary reference line a straight line on the first reference plane that intersects a straight line passing through the free end of the first reference lead and the free end of the first reference lead and the center of gravity at an angle of 90 °; After measuring the inclination angle between the straight line intersecting the temporary reference line at an angle of 90 ° with the free end of the lead and the first reference plane; Storing the lead having the smallest angle of inclination as a second reference lead, 4th step; Storing a straight line passing through the free end of the first reference lead and the free end of the second reference lead as the first reference line; Passing through the first reference line, storing a plane that intersects with the first reference plane at an angle equal to the inclination angle between the first reference line and the first reference plane as a second reference plane; After measuring the inclination angle between the straight line intersecting the first reference line at an angle of 90 ° while passing through the free end of the lead, and the second reference plane; Storing the lead having the smallest angle of inclination as a third reference lead, Fifth step; Storing a straight line passing through the free end of the second reference lead and the free end of the third reference lead as the second reference line; Storing a straight line passing through the free end of the first reference lead and the free end of the third reference lead as a third reference line; After storing the plane passing through the free end of the first, second and third reference leads as the third reference plane; Project the center of gravity of the semiconductor package at an angle of 90 ° to the second reference plane, determine whether the projected center of gravity is located inside a triangular plane on the third reference plane consisting of the first, second and third reference lines, Performing a seventh step if the center of gravity is located inside the triangular plane; performing a sixth step if the projected center of gravity is not located inside the triangular plane, Sixth step; Arbitrary points located inside the triangular plane on the third reference plane consisting of the first, second and third reference lines and the projected center of gravity are connected in a straight line to remove any reference line intersecting this connection line among the reference lines forming the triangular plane. Change to 1 baseline; Changing the corresponding leads that form both ends of the changed first reference line into the first and second reference leads; Changing the third reference plane to the second reference plane; Measuring an inclination angle between a straight line intersecting at an angle of 90 ° with the first reference line while passing through a free end of the lead and a second reference plane; After storing the lead having the smallest angle of inclination thereof as the third reference lead; Returning to the fifth step, Seventh step; The vertical distance from the free end of the lead to the third reference plane is measured, and these measured values are compared with the set reference value. If at least one of the measured values exceeds the set reference value, it is determined as a product defect. If all of the measured values do not exceed the set reference value, determining the product normal, Lead inspection method of a semiconductor package, characterized in that consisting of. The method of claim 1, wherein if the inclination angle formed by the third reference plane and the XY axis plane exceeds the set reference value between the sixth and seventh steps or after the seventh step, the product is determined to be defective. And a step of determining that the product is normal if the set reference value is not exceeded.