KR100503604B1 - Method of driving plasma display panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel that can not only increase discharge efficiency but also reduce power consumption.

According to an exemplary embodiment of the present invention, a method of driving a plasma display panel includes generating an address discharge for selecting a cell during an address period, and a first sustain pulse falling from a first voltage to a second voltage on the scan electrode during the sustain period. Supplying, supplying a second sustain pulse falling from the first voltage to the second voltage alternately with the first sustain pulse to the sustain electrode, and supplying the first and second sustain pulses to the scan electrode and the sustain electrode. And simultaneously supplying the positive bias pulse to the address electrode.

Description

Driving method of plasma display panel {METHOD OF DRIVING PLASMA DISPLAY PANEL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a method for driving a plasma display panel that can increase discharge efficiency and reduce power consumption.

Plasma Display Panels (hereinafter referred to as "PDPs") are characterized by emitting phosphors by 147 nm ultraviolet rays generated during discharge of inert mixed gases such as He + Xe, Ne + Xe and He + Ne + Xe. An image containing graphics is displayed. Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development. In particular, the three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.

1 is a perspective view illustrating a discharge cell structure typically arranged in an alternating current type PDP in a matrix form, and FIG. 2 is a cross-sectional view of the plasma display panel shown in FIG. 1.

1 and 2, the discharge cells of the three-electrode AC surface discharge type PDP are formed on the scan electrode Y and the sustain electrode Z formed on the upper substrate 10, and the lower substrate 17. The address electrode X is provided. Each of the scan electrode Y and the sustain electrode Z has a line width smaller than that of the transparent electrodes 12Y and 12Z and the transparent electrodes 12Y and 12Z, and the metal bus electrode 13Y is formed at one edge region of the transparent electrode. , 13Z).

The transparent electrodes 12Y and 12Z are usually formed on the upper substrate 10 by indium tin oxide (hereinafter, referred to as “ITO”). The metal bus electrodes 13Y and 13Z are usually formed of metals such as chromium (Cr) and formed on the transparent electrodes 12Y and 12Z to reduce voltage drop caused by the transparent electrodes 12Y and 12Z having high resistance. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan electrode Y and the sustain electrode Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The partition wall 24 is formed in parallel with the address electrode X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. An inert mixed gas such as He + Xe, Ne + Xe, and He + Ne + Xe for discharging is injected into the discharge space of the discharge cells provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The three-electrode AC surface discharge type PDP is driven by dividing one frame into several subfields having different emission counts in order to realize gray levels of an image. Each subfield is further divided into a reset period for uniformly generating discharge, an address period for selecting a discharge cell, and a sustain period for implementing gray levels according to the number of discharges. For example, when the image is to be displayed in 256 gray levels as shown in FIG. 3, the frame period (16.66 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. In addition, each of the eight subfields SF1 to SF8 is divided into a reset and an address period and a sustain period. Here, the reset and address periods of each subfield are the same for each subfield, while the sustain period increases at a rate of 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. do. As described above, since the sustain period is changed in each subfield, gray levels of an image can be realized.

4 is a waveform diagram illustrating a method of driving a plasma display panel according to the related art.

Referring to FIG. 4, the subfield SF included in one frame of the PDP includes a reset period RPD for initializing the full screen, an address period APD for selecting a cell, and a discharge period for maintaining the discharge of the selected cell. The driving is divided into the sustain period SPD.

In the reset period RPD, the rising ramp waveform Ramp-up is simultaneously applied to all the scan electrodes Y during the set-up period. This rising ramp waveform (Ramp-up) causes a slight discharge in the cells of the full screen to generate wall charges in the cells. During the set-down period, the rising ramp waveform Ramp-up is supplied, and then the falling ramp waveform Ramp-down falling from the positive voltage lower than the peak voltage of the rising ramp waveform Ramp-up is scanned. To Y at the same time. Ramp-down generates weak erase discharges in the cells, thereby eliminating unnecessary charges during wall charges and space charges generated by setup discharges, and uniformly distributing the wall charges required for address discharges in the cells of the full screen. Will remain.

In the address period APD, a negative scan pulse SP is sequentially applied to the scan electrodes Y, and a positive data pulse DP is applied to the address electrodes X. do. As the voltage difference between the scan pulse SP and the data pulse DP and the wall voltage generated during the reset period RPD are added, an address discharge is generated in the cell to which the data pulse DP is applied. Wall charges are generated in the cells selected by the address discharge.

In the sustain period SPD, sustain pulses SUSPy and SUSPz are alternately applied to the scan electrodes Y and the sustain electrodes Z. FIG. Then, the cell selected by the address discharge has a surface between the scan electrode Y and the sustain electrode Z whenever the sustain pulses SUSPy and SUSPz are applied while the wall voltage and the sustain pulses SUSPy in the cell are added. Sustain discharge occurs in the form of discharge.

In the erase period EPD subsequent to the sustain period SPD, the discharge pulse EP is supplied to the sustain electrode Z to stop the discharge. The erasing pulse EP has a ramp wave shape so that the light emission size is small, or a short pulse width of about 1 ms for the discharge erasing. The charged particles are erased by the short erase discharge by the erase pulse EP to stop the discharge.

FIG. 5A is a diagram illustrating light emitting regions in a sustain discharge, and FIG. 5B is a diagram illustrating voltage distributions according to the light emitting regions of FIG. 5A.

5A and 5B, regions in which light emission phenomena occur in the discharge space inside the PDP cell during the sustain discharge are divided and illustrated. As shown in FIG. 5A, when a predetermined voltage is applied between the cathode (for example, the sustain electrode Z) and the anode (for example, the scan electrode Y), discharge is caused by the emission of electrons between both electrodes. This will happen. At this time, the primary electrons emitted from the cathode are accelerated by an electric field applied between both electrodes to collide with the neutral particles to generate new electrons (ie, secondary electrons). The secondary electrons are strongly accelerated in the portion A of FIG. 5B in which the magnitude of the electric field is relatively large as the voltage change is large. These secondary electrons continue to obtain energy while ionizing and reach the region B of FIG. 5B. In the region B of FIG. 5B, the secondary electrons no longer obtain energy and transfer energy to the neutral particles by collision. In this process, the excited particles fall to the ground state to generate visible and vacuum ultraviolet rays. It is called a negative glow region 2 as shown in FIG. The electrons passing through the sub-lowlow region 2 are so weak in energy that the overall plasma state is uniform. This region is called a positive column region 4 as shown in FIG. 5A. In the positive light main region 4, only electrons with high energy in the entire area excite the gas to emit light, not energy due to an electric field. In this positive light main region 4, ionization hardly occurs, and a lot of light emission by excitation occurs, and energy is converted into light as a whole, and it is known that efficiency is good.

However, in the conventional three-electrode structure, since the gap between the scan electrode (Y) and the sustain electrode (Z) is narrow, it is not possible to form a positive column having a good discharge efficiency. Accordingly, there is a need for a structure capable of forming a positive column wide.

Accordingly, it is an object of the present invention to provide a method of driving a plasma display panel which can not only increase discharge efficiency but also reduce power consumption.

In order to achieve the above object, a method of driving a plasma display panel according to an exemplary embodiment of the present invention includes generating an address discharge for selecting a cell during an address period, and performing a first to second voltage on the scan electrode during the sustain period. Supplying a first sustain pulse falling to the second sustain pulse; supplying a second sustain pulse falling from the first voltage to the second voltage alternately with the first sustain pulse; and supplying the sustain electrode to the first and second sustain pulses; Is supplied to the scan electrode and the sustain electrode and a positive bias pulse is supplied to the address electrode.

The voltages of the first and second sustain pulses are set so as to cause discharge during the sustain period in addition to the wall voltage formed during the address period.

The second voltage is characterized in that it is set to the electropotential.

The second voltage may be set to a negative voltage.

The width of the positive bias pulse is smaller than the width of the first and second sustain pulses.

During the address period, positive wall charges are formed on the scan electrode and negative wall charges are formed on the sustain electrode by the address discharge.

The second sustain pulse is first supplied to the sustain electrode during the sustain period.

According to an exemplary embodiment of the present invention, a method of driving a plasma display panel using a positive light region includes generating an address discharge for selecting a cell during an address period, and dropping a first voltage from a first voltage to a second voltage on the scan electrode during a sustain period. Supplying a first sustain pulse, supplying a second sustain pulse falling from the first voltage to the second voltage alternately with the first sustain pulse, and supplying the sustain electrode with the first and second sustain pulses; And supplying a positive bias pulse to the address electrode while being supplied to the scan electrode and the sustain electrode.

The voltages of the first and second sustain pulses are set so as to cause discharge during the sustain period in addition to the wall voltage formed during the address period.

The second voltage is characterized in that it is set to the electropotential.

The second voltage may be set to a negative voltage.

The width of the positive bias pulse is smaller than the width of the first and second sustain pulses.

During the address period, positive wall charges are formed on the scan electrode and negative wall charges are formed on the sustain electrode by the address discharge.

The second sustain pulse is first supplied to the sustain electrode during the sustain period.

The reset period is driven by being divided into a setup period and a setdown period, wherein a first rising ramp waveform is supplied to the scan electrode during the setup period, and a second rising up to the sustain electrode formed in parallel with the scan electrode during the setup period. It further comprises the step of supplying the ramp waveform.

The voltage values of the first rising ramp waveform and the second rising ramp waveform may be set to prevent a discharge from being generated between the scan electrode and the sustain electrode.

The voltage values of the first rising ramp waveform and the second rising ramp waveform are set to be the same.

The maximum voltage value of the first ramp ramp waveform and the second ramp ramp waveform is set to 350V or less.

After the second rising ramp waveform is supplied, a positive DC voltage is supplied to the sustain electrode during the set down period and the address period.

The voltage value of the positive DC voltage is set equal to the voltage value of the second ramp ramp waveform.

The maximum voltage value of the positive DC voltage is set to 350V or less.

Other objects and features of the present invention in addition to the above objects will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 6 to 10E.

6 is a cross-sectional view of a PDP according to the present invention.

Referring to FIG. 6, the discharge cells of the three-electrode AC surface discharge type PDP according to the present invention are formed on the scan electrode Y and the sustain electrode Z formed on the upper substrate 110, and on the lower substrate 118. The address electrode X is provided. Each of the scan electrode Y and the sustain electrode Z has a line width smaller than that of the transparent electrodes 112Y and 112Z and the transparent electrodes 112Y and 112Z, and the metal bus electrode 113Y is formed at one edge region of the transparent electrode. , 113Z).

The transparent electrodes 112Y and 112Z are usually formed on the upper substrate 110 by indium-tin-oxide. The metal bus electrodes 113Y and 113Z are formed of a metal such as chromium (Cr) and formed on the transparent electrodes 112Y and 112Z to reduce voltage drop caused by the transparent electrodes 112Y and 112Z having high resistance. An upper dielectric layer 114 and a passivation layer 116 are stacked on the upper substrate 110 having the scan electrode Y and the sustain electrode Z side by side. The wall charges generated during the plasma discharge are accumulated in the upper dielectric layer 114. The passivation layer 116 prevents damage to the upper dielectric layer 114 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 116, magnesium oxide (MgO) is usually used. A lower dielectric layer 122 and a partition wall (not shown) are formed on the lower substrate 117 on which the address electrode X is formed, and a phosphor layer (not shown) is applied to the lower dielectric layer 122 and the partition wall surface. The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The partition wall is formed in parallel with the address electrode X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. An inert mixed gas such as Ne + Xe for discharging is injected into the discharge space of the discharge cell provided between the upper and lower substrates 110 and 118 and the partition wall. In the PDP according to the present invention, the distance d between the scan electrode Y and the sustain electrode Z formed on the upper substrate 110 is the distance L between the scan electrode Y and the address electrode X. (Or larger than the distance L between the sustain electrode Z and the address electrode X).

On the other hand, in the conventional three-electrode structure, since the gap between the scan electrode (Y) and the sustain electrode (Z) is narrow, the positive column cannot be formed wide. However, in the present invention, since the interval between the scan electrode (Y) and the address electrode (X) is narrow and the interval between the scan electrode (Y) and the sustain electrode (Z) is set wide, a positive column can be formed wide. Can be. Accordingly, the structure of the present invention can increase the discharge efficiency compared to the conventional three-electrode structure. In other words, when the sustain pulse is applied to the scan electrode Y during the sustain period, the interval between the scan electrode Y and the sustain electrode Z is set to be wider than the interval between the scan electrode Y and the address electrode X. The discharge between the scan electrode Y and the address electrode X occurs first, followed by the sustain discharge between the scan electrode Y and the sustain electrode Z. That is, the discharge between the scan electrode (Y) and the address electrode (X) can be seen as a triggering role so that the discharge between the scan electrode (Y) and the sustain electrode (Z) can occur better.

In detail, the distance d between the scan electrode Y and the sustain electrode Z is set to be wider than the distance L between the scan electrode Y and the address electrode X. Since the voltage difference between the electrodes X is higher than the voltage difference between the scan electrode Y and the sustain electrode Z, the opposite discharge between the scan electrode Y and the address electrode X occurs first in the direction of FIG. 6. Thereafter, due to the high potential difference between the scan electrode Y and the sustain electrode Z, the electrons diffuse in the direction of FIG. 6 to form a positive column. At the end of the diffusion of the positive column, opposite discharge between the sustain electrode Z and the address electrode X occurs in the direction ③ of FIG. 6. Similarly, when a sustain pulse is alternately applied to the scan electrode Y to the sustain electrode Z, a counter discharge between the sustain electrode Z and the address electrode X occurs first in the direction of Fig. 6. Thereafter, due to the high potential difference between the scan electrode Y and the sustain electrode Z, the electrons diffuse in the direction of FIG. 6 to form a positive column. At the end of the diffusion of the positive column, opposite discharges between the scan electrode Y and the address electrode X occur in the direction ① of FIG. 6. As such, a positive column having a high discharge efficiency is set by setting the distance d between the scan electrode Y and the sustain electrode Z to be larger than the distance L between the scan electrode Y and the address electrode X. Can be formed widely.

Therefore, the PDP using the Yanggwangju according to the present invention can realize high efficiency (Efficacy) according to applying a large amount of Xe to a general structure having a general amount of Xe. To this end, positive columns, which have low field and high Xe excitation rate characteristics, are used in addition to the negative glow region used in AC PDPs. In general, positive column is generated when discharge path is mainly 300㎛ or more, and high efficiency (usually in case of negative glow area is 1 ~ 2 lm / W) 7 lm / W). In order to enlarge the positive column, the interval between the ITOs (= d) in the cell was maximized (ex. ITO interval of 300 µm or more at 0.81mm pixel pitch), and the discharge was initiated by increasing the interval between the ITOs. Increasing the sustain voltage causes the discharge to be started during the sustain period SPD while maintaining the relationship (= L) between the scan electrode Y and the address electrode X with d> L. It is aimed to be generated by the scan electrode Y and the address electrode X, rather than between the electrodes Z, and moved to the sustain electrode Z. For this purpose, the establishment of a d> L relationship is essential. In other words, the distance between the scan electrode (Y) and the sustain electrode (Z) is wider than the distance between the scan electrode (Y) and the address electrode (X) to form a positive column wide to discharge efficiency To raise.

7A to 7C are diagrams showing in detail discharge initiation and maintenance during a sustain period in a horizontal double-light main region structure.

7A to 7C, in the sustain period SPD, since the distance between the scan electrode Y and the address electrode X is relatively closer than the distance between the scan electrode Y and the sustain electrode Z as shown in FIG. 7A, the scan is performed. No surface discharge occurs between the electrode Y and the sustain electrode Z, and a weak counter discharge occurs between the scan electrode Y and the address electrode X. Thereafter, as shown in FIG. 7B, due to the potential difference between the scan electrode Y and the sustain electrode Z, electrons diffuse into the sustain electrode Z to form a positive column. Subsequently, as shown in FIG. 7C, the potential difference between the scan electrode Y and the sustain electrode Z is canceled by accumulation of charge having opposite polarity at the point where the positive column continues to diffuse. Therefore, as the discharge gradually weakens, the polarities of the wall charges of the electrodes become inverted or neutral. In the positive column, only electrons with high energy in the entire area do not emit energy by the electric field and emit light. That is, the positive column has almost no ionization and generates a lot of light emission due to excitation, so that the energy is converted into light as a whole and the efficiency is good. Therefore, the discharge efficiency can be increased if the positive column can be maximized. Accordingly, the discharge efficiency can be increased by maximizing the interval between the ITO in the discharge cell in order to expand the positive column.

Meanwhile, referring to FIG. 8, which shows a result of comparing the visible efficiency with a conventional sample using a 6.5 inch test sample, 6% of Xe is injected and a Xe-Ne gas having a pressure of 500 Torr and a positive bias pulse The applied positive column structure requires a sustain voltage of about 220V to have an efficiency of 2.0 lm / W, but the conventional electrode structure containing Xe-Ne gas injected with 14% of Xe is 2.0 lm / W. In order to have the efficiency of W, a sustain voltage of about 240V is required. This is an example of improved efficiency while maximizing the use of positive column, which is difficult to utilize in general structure in positive column structure. In addition, a positive bias pulse is applied to the address electrode X to start and maintain a discharge at a lower voltage, resulting in an efficiency improvement of 10 to 20% even in the same structure.

Meanwhile, in the case of the positive column structure according to the present invention, since the ITO interval is maximized, the driving should be performed using a mechanism different from the conventional driving waveform. First, in the conventional reset waveform, wall charges are formed through discharge between the scan electrode Y and the sustain electrode Z. However, in the structure according to the present invention, the gap between the scan electrode Y and the sustain electrode Z is formed. In this structure, the reset voltage Vreset increases when the conventional reset waveform is applied, and at the same time, the scan electrode Y and the address electrode X (or the sustain electrode Z and the address electrode X) are increased. Due to the discharge between)), it becomes difficult to form uniform wall charge, which is the current of the reset voltage. In addition, when the conventional sustain pulse is alternately supplied to the scan electrode Y and the sustain electrode Z during the sustain period SPD, and the positive bias pulse is applied to the address electrode X, the field distribution is scanned. Opposite to the electrode (Y) and the sustain electrode (Z) has a bad effect on the sustain discharge. Therefore, in order to apply a pulse having the same shape as a conventional sustain pulse to the scan electrode Y and the sustain electrode Z, and to apply a positive Baas pulse to the address electrode X, the frequency and width of the sustain pulse are increased. It must be modified. In this case, the brightness level characteristic of each field is changed, which adversely affects image quality. In the present invention, a driving waveform as shown in FIG. 9 should be applied so that a positive Baas pulse can be applied to the address electrode X while using the same width and frequency as in the prior art.

9 is a waveform diagram illustrating a method of driving a PDP according to an exemplary embodiment of the present invention shown in FIG. 6.

Referring to FIG. 9, the subfield SF included in one frame of the PDP includes a reset period RPD for initializing a cell, an address period APD for selecting a cell, and a sustain for maintaining discharge of the selected cell. The driving is divided into the period SPD.

During the set-up period of the reset period RPD, the scan electrode Y is supplied with a first rising ramp waveform Ramp-up rising from the positive voltage (for example, the sustain voltage Vs). When the first rising ramp waveform Ramp-up is supplied to the scan electrode Y, a weak discharge is generated between the scan electrode Y and the address electrode X, and wall charges are formed in the cells. During the set-up period, the second rising ramp waveform Ramp-up rising from the positive voltage (for example, the sustain voltage Vs) is supplied to the sustain electrode Z. When the second rising ramp waveform Ramp-up is supplied to the sustain electrode Z, a weak discharge is generated between the sustain electrode Z and the address electrode X, and wall discharge is formed in the cells by the discharge.

That is, in the set-up period of the present invention, a discharge is generated between the scan electrode Y, the address electrode X, the sustain electrode Z, and the address electrode X to generate wall charges having a specific polarity in the discharge cells. Form. On the other hand, the voltage values of the first ramp ramp (Ramp-up) and the second ramp ramp (Ramp-up) is set to have a voltage difference such that no discharge occurs between the scan electrode (Y) and the sustain electrode (Z) do. For example, the voltage values of the first ramp ramp waveform up and the ramp ramp ramp up may be set identically or similarly. Here, the highest voltage values of the first ramp ramp Ramp-up and the second ramp ramp Ramp-up are set to 350 V or lower, preferably 300 V or lower. In detail, first, when the first rising ramp waveform Ramp-up is supplied, reset discharge occurs between the scan electrode Y and the address electrode X. FIG. Here, since the structure of the cell is set to d> L, that is, the scan electrode Y and the address electrode X are located adjacent to each other, the scan is performed by the first ramp ramp Ramp-up having a low voltage value. A stable reset discharge may occur between the electrode Y and the address electrode X. Similarly, since the second rising ramp waveform Ramp-up is supplied to the sustain electrode Z, no reset discharge is generated between the scan electrode Y and the sustain electrode Z, and the second rising ramp waveform (which has a low voltage value) does not occur. By the ramp-up, a stable reset discharge may occur between the sustain electrode Z and the address electrode X.

Meanwhile, referring to FIGS. 10A to 10E, a process of generating reset discharge when the first and second rising ramp waveforms are applied to the driving waveform according to the present invention will be described first. When the rising ramp waveform Ramp-up is applied, a reset discharge is generated between the scan electrode Y and the address electrode X. Here, since the scan electrode Y has a voltage higher than that of the address electrode X, negative wall charges are formed on the scan electrode Y, and positive wall charges are formed on the address electrode X, as shown in FIG. 10A. Is formed. Similarly, when the second rising ramp waveform Ramp-up is applied to the sustain electrode Z, a reset discharge is generated between the sustain electrode Z and the address electrode X. Here, since the sustain electrode Z has a voltage higher than that of the address electrode X, negative wall charges are formed on the sustain electrode Z as shown in FIG. 10A, and positive wall charges are formed on the address electrode X. Is formed. At this time, since the voltage values of the first rising ramp waveform (Ramp-up) and the second rising ramp waveform (Ramp-up) are set so that no discharge occurs, a reset discharge is generated between the scan electrode (Y) and the sustain electrode (Z). It does not occur. Thereafter, a ramp ramp down of the positive voltage to the negative voltage is supplied to the scan electrode Y so that the desired wall charges remain during the set-down period. When the negative falling ramp waveform (Ramp-down) is applied, fine discharge is generated between the scan electrode (Y) and the sustain electrode (Z), and the scan electrode (Y) and the address electrode (X). Such fine discharge eliminates unnecessary charges among wall charges and space charges formed in the set-up as shown in FIG. 10B, and uniformly retains wall charges required for address discharge in the cells of the full screen.

In the address period APD, the negative scan pulse SP is sequentially applied to the scan electrodes Y, and the positive data pulse DP is applied to the address electrodes X. As the voltage difference between the scan pulse SP and the data pulse DP and the wall voltage generated during the reset period RPD are added, an address discharge is generated in the cell to which the data pulse DP is applied. Wall charges are generated in the cells selected by the address discharge.

Meanwhile, the process of generating the address discharge will be described with reference to FIGS. 10A through 10E. First, a negative scan pulse SP is applied to the scan electrode Y and a positive data pulse (C) is applied to the address electrode X. When the DP) is applied, an address discharge is generated between the scan electrode Y and the address electrode X. Here, since the address electrode X has a voltage higher than that of the scan electrode Y, positive wall charges are formed on the scan electrode Y, and negative wall charges are formed on the address electrode X, as shown in FIG. 10C. Is formed.

On the other hand, during the set-down period and the address period ADP, the sustain electrodes Z are supplied with the positive DC voltage of the voltage level of the second rising ramp waveform Ramp-up. This positive DC voltage is such that the negative wall charges accumulated on the sustain electrode Z are maintained. At this time, the maximum voltage value of the positive DC voltage is set at 350 V or less, preferably 300 V or less.

In the sustain period SPD, sustain pulses SUSPy and SUSPz falling from the sustain voltage Vs to the ground potential are applied to the scan electrodes Y and the sustain electrodes Z alternately. Here, the sustain pulses SUSPy and SUSPz applied to the scan electrode Y and the sustain electrode Z may be pulses falling from a specific voltage to a negative voltage. At this time, the voltage difference of the pulse falling from the specific voltage to the negative voltage has a sustain voltage (Vs) value. At the same time, a positive pulse pulse is applied to the address electrode X. Then, the cell selected by the address discharge becomes more negative with the addition of the negative wall voltage and the negative sustain pulses SUSPy and SUSPz in the cell, and thus becomes more negative. The scan electrode Y, the sustain electrode Z, and the address electrode X The voltage difference between them becomes larger. Therefore, the sustain discharge is further activated. Such a sustain discharge occurs in the form of surface discharge between the scan electrode Y and the sustain electrode Z every time the sustain pulses SUSPy and SUSPz are applied.

Meanwhile, referring to FIGS. 10A to 10E, a process of generating a sustain discharge will be described. First, a sustain pulse SUSPz falling from the sustain voltage Vs to the ground potential is applied to the sustain electrode Z and at the same time, the address electrode X is applied. When a positive Baas pulse is applied to the discharge, discharge occurs due to the voltage difference between the sustain electrode Z and the address electrode X. That is, the voltage of the negative sustain pulse SUSPz applied to the sustain electrode Z and the negative wall voltage formed on the sustain electrode Z during the address period APD are added to become the negative voltage and the address. Since the positive bias pulse is supplied to the electrode X, the voltage difference between the sustain electrode Z and the address electrode X becomes larger. Therefore, the discharge is actively generated between the sustain electrode Z and the address electrode X to further activate the sustain discharge between the sustain electrode Z and the scan electrode Y. Here, since the scan electrode Y has a voltage higher than that of the sustain electrode Z, negative wall charges are formed on the scan electrode Y as shown in FIG. 10D, and positive wall charges are formed on the sustain electrode Z. Is formed. Thereafter, a sustain pulse SUSPy falling from the sustain voltage Vs to the ground potential is applied to the scan electrode Y alternately with the sustain pulse SUSPz applied to the sustain electrode Z, and at the same time, the address electrode X When a positive bias pulse is applied to the discharge, the discharge is caused by the voltage difference between the scan electrode Y and the address electrode X. That is, the voltage of the negative sustain pulse SUSPy applied to the scan electrode Y and the negative wall voltage formed on the scan electrode Y by the previous sustain pulse SUSPz are added to further increase the negative voltage. In addition, since the positive bias pulse is supplied to the address electrode X, the voltage difference between the scan electrode Y and the address electrode X becomes larger. Therefore, the discharge is actively generated between the scan electrode Y and the address electrode X to further activate the sustain discharge between the scan electrode Y and the sustain electrode Z. Here, since the sustain electrode Z has a voltage higher than that of the scan electrode Y, positive wall charges are formed on the scan electrode Y, and negative wall charges are formed on the sustain electrode Z as shown in FIG. 10E. Is formed. By alternately causing sustain discharge, desired gray scales are displayed.

In other words, the positive column structure according to the present invention maximizes the distance between the scan electrode (Y) and the sustain electrode (Z) to enlarge the positive column (Positive Column) to increase the discharge efficiency. That is, instead of the surface discharge between the scan electrode Y and the sustain electrode Z, the opposite discharge between the scan electrode Y and the address electrode X occurs first to enlarge the positive column. Therefore, the present invention can lower the reset voltage by forming a reset discharge between the upper plate and the lower plate and form a uniform wall charge on the ITO of the upper plate electrodes. By applying this waveform, the additional effect that the luminance in the black pattern which occurred in the reset discharge between the upper plate ITO in the conventional case can significantly lower the black pattern luminance when applying this waveform can also be obtained. In addition, the waveform of the present invention causes the relative potential difference to be negative, thereby causing sustain discharge using negative wall charges. Thus, since the sustain discharge using the negative wall charge is performed on the scan electrode Y and the sustain electrode Z, the positive discharge pulse is applied to the address electrode X so that the sustain discharge using the conventional sustain frequency can be performed. In addition, efficiency can be improved by 10-20% and power consumption can be reduced. The present invention is a very useful waveform that can be used in the conventional three-electrode structure in addition to the positive column structure.

As described above, the plasma display panel according to the present invention maximizes the distance between the scan electrode and the sustain electrode to enlarge the photovoltaic region, thereby increasing the discharge efficiency and also causing the reset discharge between the scan electrode or the sustain electrode and the address electrode. The reset voltage can be lowered and uniform wall charges can be formed on the scan electrodes and the sustain electrodes. In addition, the present invention has the effect of giving a negative voltage at a relative level when the wall charges of the scan electrode and the sustain electrode are negative, so that the sustain discharge can be further activated by applying a positive Baas pulse to the address electrode. .

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view showing a discharge cell of a conventional three-electrode AC surface discharge plasma display panel.

FIG. 2 is a cross-sectional view of the plasma display panel shown in FIG. 1.

FIG. 3 is a diagram illustrating one frame of the plasma display panel shown in FIG. 1.

4 is a waveform diagram illustrating a method of driving the plasma display panel shown in FIG. 1.

FIG. 5A is a diagram illustrating light emitting regions classified when sustain discharge is performed.

FIG. 5B is a diagram illustrating a voltage distribution according to the light emitting region of FIG. 5A.

6 is a view showing a discharge flow in the positive light main region structure according to an embodiment of the present invention.

7A to 7C are diagrams showing the discharge start and maintenance during the sustain period in the horizontal double-light main region structure.

8A and 8B are graphs showing the efficiency of the conventional electrode structure and the positive light main region electrode structure.

FIG. 9 is a waveform diagram illustrating a method of driving a plasma display panel according to an exemplary embodiment of the present invention shown in FIG. 6.

10A through 10E illustrate a process of forming wall charges according to the driving waveform of FIG. 9.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 18: lower substrate

Y: scan electrode Z: sustain electrode

X: address electrode 12Y, 12Z: transparent electrode

13Y, 13Z: metal bus electrode 14: upper dielectric layer

16: protective film 22: lower dielectric layer

24: partition 26: phosphor layer

Claims (21)

A driving method of a plasma display panel driven by being divided into a plurality of subfields including a reset period, an address period, and a sustain period, Generating an address discharge for selecting a cell during the address period; Supplying a first sustain pulse falling from a first voltage to a second voltage to a scan electrode during the sustain period; Supplying a second sustain pulse falling from the first voltage to a second voltage alternately with the first sustain pulse to a sustain electrode; The first and second sustain pulses are supplied to the scan electrode and the sustain electrode, and a positive bias pulse is supplied to the address electrode to sustain sustain discharge between the address electrode and the scan electrode, and the address electrode and the sustain electrode. And alternately generating sustain discharges between the electrodes. The method of claim 1, And the voltages of the first and second sustain pulses are set so as to cause discharge during the sustain period in addition to the wall voltage formed during the address period. The method of claim 2, And the second voltage is set to a potential of the plasma. The method of claim 2, And the second voltage is set to a negative voltage. The method of claim 1, And the width of the positive bias pulse is smaller than the width of the first and second sustain pulses. The method of claim 1, And positive wall charges are formed on the scan electrode and negative wall charges are formed on the sustain electrode during the address period. The method of claim 6, And the second sustain pulse is first supplied to the sustain electrode during the sustain period. A scan electrode and a sustain electrode formed at a first interval parallel to the discharge cell; An address electrode formed to intersect the discharge cell at a second interval narrower than the first interval between the scan electrode and the sustain electrode, and divided into a plurality of subfields including a reset period, an address period, and a sustain period; In the method of driving a plasma display panel, Generating an address discharge for selecting a cell during the address period; Supplying a first sustain pulse falling from a first voltage to a second voltage to a scan electrode during the sustain period; Supplying a second sustain pulse falling from the first voltage to a second voltage alternately with the first sustain pulse to a sustain electrode; The first and second sustain pulses are supplied to the scan electrode and the sustain electrode, and a positive bias pulse is supplied to the address electrode to sustain sustain discharge between the address electrode and the scan electrode, and the address electrode and the sustain electrode. And alternately generating sustain discharges between the electrodes. The method of claim 8, And the voltages of the first and second sustain pulses are set so as to cause discharge during the sustain period in addition to the wall voltage formed during the address period. The method of claim 9, And the second voltage is set to a potential of the plasma. The method of claim 9, And the second voltage is set to a negative voltage. The method of claim 8, And the width of the positive bias pulse is smaller than the width of the first and second sustain pulses. The method of claim 8, And positive wall charges are formed on the scan electrode and negative wall charges are formed on the sustain electrode during the address period. The method of claim 13, And the second sustain pulse is first supplied to the sustain electrode during the sustain period. The method of claim 8, The reset period is driven divided into a setup period and a set down period, Supplying a first rising ramp waveform to the scan electrode during the setup period; And supplying a second rising ramp waveform to the sustain electrode formed in parallel with the scan electrode during the setup period. The method of claim 15, And a voltage value of the first rising ramp waveform and the second rising ramp waveform is set to prevent a discharge from being generated between the scan electrode and the sustain electrode. The method of claim 16, And the voltage values of the first rising ramp waveform and the second rising ramp waveform are set equal to each other. The method of claim 17, And the maximum voltage value of the first ramp ramp waveform and the second ramp ramp waveform is set to 350V or less. The method of claim 15, And a positive DC voltage is supplied to the sustain electrode during the set down period and the address period after the second rising ramp waveform is supplied. The method of claim 19, And the voltage value of the positive DC voltage is set equal to the voltage value of the second rising ramp waveform. The method of claim 20, And the maximum voltage value of the positive DC voltage is set to 350V or less.