KR100515735B1 - Method of manufacturing AFM field-effect-transistor cantilever of high aspect ratio - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a field effect transistor cantilever for a nuclear microscope having a large vertical aspect ratio, comprising: a support portion, a cantilever portion extending from the support portion and floating from below, a probe at the tip of the cantilever portion, and a cantilever under the probe A channel formed in the portion; Forming a cantilever having a field effect transistor for an atomic force microscope composed of a source and a drain respectively formed on both sides of the channel; And inserting a cantilever having the field effect transistor into a chamber containing carbon, and then irradiating an electron beam to the probe of the cantilever to form a carbon tip at the tip of the probe.

Therefore, the present invention can implement a nuclear microscope cantilever with a field effect transistor having a microchannel of 100 nm or less, and can be applied to a terabit probe type information storage device, and a short channel caused by a microchannel channel) effect can be prevented from occurring.

In addition, the present invention increases the vertical aspect ratio of the probe, so that the charge can be read even in a recording medium having a very high level of step, thereby improving the degree of sensing of information.

Description

Method of manufacturing field effect transistor cantilever for nuclear microscope with high vertical aspect ratio {Method of manufacturing AFM field-effect-transistor cantilever of high aspect ratio}

The present invention relates to a method for manufacturing a field effect transistor cantilever for a nuclear microscope having a high vertical aspect ratio, and more specifically, to implement a nuclear microscope cantilever having a field effect transistor having a microchannel of 100 nm or less, and thus terabit class. It can be applied to probe type information storage device, can prevent short channel effect caused by micro channel, and increase the vertical aspect ratio of probe to improve information sensing. A method of manufacturing an effect transistor cantilever.

In general, the development of various types of microscopes capable of measuring various kinds of physical quantities by scanning probes is called a scanning probe microscope (SPM).

Since the invention of atomic force microscopy (AFM), which is a kind of SPM that can measure the amount of charge of a sample by using atomic force between the probe and the sample in 1986, numerous patents and nano units using the same The results of the study have been published.

Recently, various attempts have been made to build more complex structures on nuclear microscope heads.

In addition, many attempts have been made to develop a next generation data storage system by attaching various technologies to the cantilever of an atomic force microscope.

In particular, various developments are being made on the practical side, such as the case where the optical sensor is mounted on the measuring head (US Patent No. 5,583,286, US Patent No. 5,923,033) and the conventional MOSFET structure (US Patent No. 5,856,672). have.

Here, in the case of raising the device by incorporating several complex technologies into the atomic force microscope (US Pat. No. 5,856,672), the manufacturing process itself is too complicated and the yield is considerably lowered, and the measurement head is more expensive than the atomic force microscope. Have.

In order to improve such a problem, the inventors of the present invention, such as a probe of a SPM with a FET channel structure and a method of manufacturing the same, proposed by Korean Patent Application Publication No. 2001-45981 as a new concept, provide a single crystal silicon substrate having a (100) plane. After the inclined surface is etched to form a (111) plane, a rod-shaped probe is formed, and a channel region is formed by doping the first impurity on the inclined surface including the central peak of the V-shaped probe at the tip of the probe. A source and a drain are formed by doping a second impurity on both inclined surfaces of the V-shaped probe, and a device having a FET channel formed at the tip of the cantilever is mounted on the measurement head.

The probe having the above-described FET channel structure is a breakthrough method compared to other prior arts, but has various problems in practical use as follows.

The problem is, first, because the wet etch (Wet etch) to make the cantilever shape, because the thickness of the cantilever is large difference between the top and bottom, it is difficult to obtain the natural resonance frequency of the cantilever by design.

Second, in order to make the V-shaped angle of the cantilever end, an accurate photographic process having a specific angle with respect to the wafer cut surface in the cantilever pattern is required in photo-lithography.

If the angle is different in the photographing process, the etched cross section exposed to the cantilever end is derived in a different crystal direction, making it difficult to form a channel.

In addition, when wet etching the silicon after performing the photo process in a precise angle state, the desired slope can be made several times through the additional photo process, which is the biggest problem in manufacturing.

In addition, when forming the source and drain regions due to a manufacturing process, only a thermal diffusion method can be used, and thus the length of the channel cannot be easily adjusted.

Therefore, the unit price of the product is high, the yield is low, and the manufacturing reliability is very low.

Third, the tip of the cantilever is not sharpened, so when scanning the nanometer area, a large area of data is read, which makes it difficult to read the exact charge where it is desired, thereby lowering the resolution.

Fourthly, it is possible to form a single cantilever, but the second problem mentioned above is that several to several dozen cantilevers cannot be integrated in an array form in one pad, and a peak probe is formed at the tip of the cantilever. It cannot be applied to the storage and reading of next-generation multimedia data that requires fast processing speed.

Fifth, when the cantilever is brought close to the sample in which the charge amount is distributed, the cantilever should be erected vertically to obtain desired information.

Sixth, when the device region of the cantilever is long, when the device is driven, the amount of charge at the tip of the cantilever and the amount of charge according to the channel between the source and the drain formed in the middle of the cantilever are overlapped.

In order to solve this problem, there has been an attempt to use a sensor having a structure of a field effect transistor in a nuclear microscope cantilever probe as a next-generation data storage sensor.

As a prior patent, the Korean Patent Publication “2001-0045981” is made using only a micromachining process, and a transistor having a source and a drain formed in a probe is formed to detect a region having different charge concentrations distributed on a sample. Works.

By attaching the probe vertically to the insulator-formed sample, the current flowing through the drain as the voltage was applied to the source was measured according to the sample's voltage change, demonstrating typical MOSFET device characteristics.

In practice, no surface charge distribution has been read.

In addition, in the case of the Korean application patent "2001-0072796", the operating principle is the same as in the case of the above-described Korean published patent "2001-0045981", but has been improved to a form that can operate with a general atomic force microscope cantilever probe, The combination of semiconductor device processing and micromachining techniques has resulted in increased sensitivity by reducing the effective channel length between the source and drain.

In addition, it is possible to configure an array type in which multiple probes can exist in one body.

The device characteristic curve using this has been shown to be improved than the case of the Korean published patent "2001-0045981".

Also, the operation principle of the Korean patent application "2001-0072797" is the same as that of the Korean published patent "2001-0045981", but the Korean application patent "2001-0072796" and the Korean published patent "2001-0045981" could not be made. As a result, a pointed probe was formed so that the charge distribution on the sample surface could be read even in a more localized region.

The probe was able to read the surface charge distribution.

In the conventional atomic force microscope cantilever, when the cantilever is doped or coated with a metal thin film, the cantilever can be used to store and read the sample using charge.

However, this method has the disadvantage of being very slow because it operates in contactless mode and requires a lock-in amplifier.

It also has the disadvantage of being very sensitive to changes in the surrounding environment.

In addition, there is a problem that the channel width of the field effect transistor should be reduced to at least 100 nm or less for use in the terabit probe type information storage device.

In addition, in the above-mentioned prior art, while making the electron effect transistor type cantilever, there is a problem that the aspect ratio of the probe cannot be increased only by the micromachining technique due to the formation of a small channel.

Accordingly, the present invention has been made to solve the above problems, can implement a nuclear microscope cantilever with a field effect transistor having a microchannel of less than 100nm, can be applied to a terabit probe type information storage device Of the field effect transistor cantilever for nuclear microscopes having a large vertical aspect ratio, which can prevent the occurrence of short channel effects caused by microchannels, and increase the vertical aspect ratio of the probe, thereby improving the sensing degree of information. The purpose is to provide a manufacturing method.

A preferred aspect for achieving the above object of the present invention is a first silicon layer, a first insulating film and a second silicon layer on top of the second silicon layer of the silicon on insulator (SOI) substrate is sequentially stacked A first step of forming a probe;

The second insulating film, the third insulating film, the polysilicon layer, and the photoresist film are sequentially stacked on the second silicon layer including the probe, and the photoresist film is removed by a photolithography process to form a first mask of a nuclear microscope cantilever. Forming a pattern on the polysilicon layer;

Masking with the first mask pattern to etch from the polysilicon layer to the second insulating film to form a second mask pattern of the atomic force microscope cantilever on the second silicon layer;

A fourth step of masking with the second mask pattern to inject a first impurity into a second silicon layer and to heat-treat it;

A width of the upper portion of the second silicon layer is reduced by wet etching a part of the side surface of the third insulating film, removing the polysilicon layer, wet etching a part of the side surface of the second insulating film, and removing the third insulating film A fifth step of leaving an insulating film;

A sixth step of masking with the second insulating film to inject a second impurity and performing heat treatment;

A seventh step of forming a pattern of a second silicon layer having a shape including the probe, regions in which first and second impurities are implanted, and removing a lower portion of the shape to form a cantilever;

After inserting the cantilever in which the seventh step is performed into the chamber containing carbon, the vertical aspect ratio consisting of the eighth step of forming a carbon tip on the tip of the probe by irradiating an electron beam to the probe of the cantilever is large. A method for producing a field effect transistor cantilever for an atomic force microscope is provided.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

1A to 1H are partial process diagrams for manufacturing a field effect transistor cantilever for a nuclear microscope having a high vertical aspect ratio according to the present invention. First, the first silicon layer 110, the insulating film 120, and the second silicon layer 130 are sequentially formed. First and lower insulating layers 141 and 142 are formed on upper and lower portions of the silicon on insulator (SOI) substrate stacked thereon.

Thereafter, a photoresist film is formed on the first upper insulating film 141, and a pattern 145 for forming a probe is formed by performing a photolithography process (FIG. 1B).

Next, the first upper insulating layer 141 is removed by masking with the pattern 145 for forming the probe to form another pattern 142 for forming the probe, and the pattern 145 for forming the probe. ) Is removed and masked with another pattern 142 for forming the probe to etch a portion of the second silicon layer 130 to form a probe shape 131 made of a silicon layer (FIG. 1C).

Subsequently, another pattern 142 for forming the probe is removed, a thermal oxide film is formed on the second silicon layer 130, and the thermal oxide film is removed by a wet etching process to remove the remaining second silicon. A pointed probe 131a is formed on the layer 130 (FIG. 1D).

Subsequently, a second insulating film 151, a third insulating film 152, a polysilicon layer 153, and a photoresist film 154 are disposed on the probe 131a and the remaining second silicon layer 130. By sequentially stacking and performing a photolithography process, the photoresist film 154 is removed to form a first mask pattern 157 of the cantilever for atomic force microscopy on the polysilicon layer 153 (FIG. 1E).

The second and third insulating layers 151 and 152 may be formed of different materials, and each of the second and third insulating layers 151 and 152 may be formed of any one selected from an SiN layer and a tetraethoxysilane (TEOS) oxide layer.

In the embodiment of the present invention, the second insulating film 151 is formed of a SiN film having a low stress, and the second insulating film 152 is formed of a TEOS oxide film.

At this time, when the SiN film having the low stress is appropriately adjusted to xylene and ammonia to form a SiN film, the SiN film has a low stress.

In FIG. 1F, a mask is masked with a first mask pattern 157 of a nuclear microscope cantilever made of the photoresist film and etched from the polysilicon layer 153 to the second insulating film 151 to form the second silicon layer 130. A second mask pattern 161 of the cantilever for atomic force microscopy is formed on the top.

The second mask pattern 161 of the cantilever for the atomic force microscope is used as a mask for injecting impurities to form a source and a drain of the atomic force cantilever having the field effect transistor according to the present invention.

Therefore, after FIG. 1F, impurities are implanted into the second silicon layer 130 as shown in FIG. 1H.

At this time, the impurity is implanted by performing an ion implantation process with 180 keV energy so that the impurity concentration is approximately 2 × 10 ¹⁴ cm ⁻² .

Thereafter, heat treatment is performed.

In other words, impurities are not implanted in the lower portion of the second mask pattern 161 of the atomic force microscope cantilever, and impurities are implanted only in the exposed second silicon layer 130 to implement n + or p + source and drain regions. .

Here, if the second silicon layer of the above-described SOI substrate is doped with P-type impurities, N-type impurities are implanted. If the second silicon layer is doped with N-type impurities, P-type impurities are implanted.

FIG. 2 is a plan view of FIG. 1H, in which a second mask pattern 161 of a cantilever for atomic force microscopy is formed on the upper silicon layer 130, and the exposed second silicon layer is a region 191 doped with impurities. It will exist.

3A to 3D are cross-sectional views taken along the line A-A 'of FIG. 2, showing a partial process diagram for forming the microchannel after FIG. 1H, and FIG. 3A is a cross-sectional view of FIG. 1H, and the region' a 'of FIG. 2. The cross section of the is shown.

As shown in FIG. 3B, a portion of the side surface of the third insulating layer 152 made of SiN is removed by wet etching.

At this time, the wet etching solution uses a H ₂ PO ₄ solution.

Thereafter, as shown in FIG. 3C, the polysilicon layer 153 is removed, and as shown in FIG. 3D, a portion of the side surface of the second insulating layer 151 made of the TEOS oxide film is removed by wet etching.

Here, to selectively wet only the TEOS coral film, an HF solution diluted with an etching solution is used.

Next, when the third insulating layer 152 is removed, only the second insulating layer to be used as a mask for forming a channel on the second silicon layer 130 remains as illustrated in FIG. 3E.

FIG. 4 is a plan view of a state in which the process of FIG. 3E is completed, and the dotted line 'M' is the outline of the second mask pattern 161 of the nuclear microscope cantilever formed on the second silicon layer in the above description of FIG. 1F. The solid line 'm' shows the outline of the second insulating film to be used as a mask for forming a channel when the process is performed from FIGS. 3B to 3E.

That is, as shown in FIG. 4, the width d of the second insulating layer is relatively much smaller than the width d1 of the second mask pattern in the region where the channel is formed.

As described above, in the present invention, when forming the channel region, at least two or more insulating films made of mutually different materials are stacked on the second silicon layer of the SOI substrate, and then a polysilicon layer is formed on the stacked insulating films. After sequentially performing side etching of the insulating films except for the polysilicon layer, the width of the insulating film on the upper part of the second remaining silicon layer is reduced, and finally, when impurities are implanted by masking the insulating film, 100 nm is formed between the source and the drain. The following microchannels can be formed.

5A and 5B illustrate a plan view of the subsequent process of FIG. 3E, in which impurities are implanted after the process of FIG. 3E.

Here, the implantation of the impurity is performed by implanting the impurity by performing an ion implantation process at 70 keV energy so that the impurity concentration is approximately 1 × 10 ¹⁶ cm ⁻² , and performing heat treatment.

In this case, an insulating film is formed in the channel region 171, so that impurity is not injected into the lower portion of the insulating film, thereby forming a channel region, and only the exposed second silicon layer 130 is implanted with impurities. The doped region 191 becomes n + or p +, and is used as a mask for forming a channel when the process is performed to the dotted line 'M', which is the outline of the second mask pattern 161 of the cantilever for atomic force microscopy, and to FIG. 3E. The area 192 between the solid lines 'm' which is the outline of the two insulating films is n ++ or p ++.

At this time, if the second silicon layer of the above-described SOI substrate is doped with P-type impurities, N-type impurities are implanted. If the second silicon layer is doped with N-type impurities, P-type impurities are implanted.

Thereafter, as shown in FIG. 5B, the second insulating film is removed, a photoresist film is formed on the second silicon layer, a cantilever pattern made of a photoresist film is formed by a photolithography process, and the photoresist film is formed. The second silicon layer having the shape of the cantilever is formed by removing the second silicon layer using the cantilever pattern as a mask.

Here, the cantilever shape should include the source 210, the drain 220, the channel 203 and the probe 204 described above.

Then, the bottom surface of the second silicon layer having the shape of the cantilever is removed to float the second silicon layer to form a cantilever.

FIG. 6 is an enlarged view of 'K' of FIG. 5B, in which a probe 204 is formed at the tip of the cantilever, and a channel 203 is formed below the probe 204, and the channel 203 is formed. As a reference, the source 210 and the drain 220 are formed at the left and right portions.

Each of the source 210 and the drain 220 is formed with regions 212 and 222 doped with n ++ or p ++ impurities in contact with the channel 203, respectively, and regions 212 and 222 doped with n ++ or p ++ impurities, respectively. Regions 211 and 221 doped with n + or p + impurities are formed.

As described above, in the present invention, since a small channel of 100 nm or less is formed, a short channel effect is generated as the channel width is narrowed, so that n ++ or p ++ regions are formed in source and drain regions in contact with a channel such as an LDD structure. By providing it, a short channel effect can be prevented.

After performing the process of FIG. 5B described above, as shown in FIG. 7, when the cantilever is placed in the electron microscope device and a constant electron beam is incident on the cantilever probe tip, the carbon tip 301 having a large vertical aspect ratio at the tip of the probe is shown. It can grow.

At this time, when the electron beam is incident on the tip of the cantilever probe while injecting the gas containing the carbon component into the electron microscope device, the growth of the carbon tip 301 can be made more smooth.

Here, the carbon tip 301 can be controlled to adjust the growth length and the growth angle within the electron microscope, it is possible to manufacture a field effect transistor type cantilever having a large vertical aspect ratio.

Since the carbon tip 301 has excellent electrical conductivity, the carbon tip 301 transfers the amount of charge read from the recording medium to the probe 300.

As illustrated in FIG. 7, the probe 300 includes a region 321 connected to the source by doping impurities from a source, a region 310 not doped with impurities, and a region connected to the drain by doping impurities from a drain ( 322).

8 is a schematic cross-sectional view of a field effect transistor cantilever for a nuclear microscope having a high vertical aspect ratio according to the present invention, a support portion, a cantilever portion extending from the support portion and floating from below, and a probe 330 at the tip of the cantilever portion; , Consisting of carbon tips 330 formed on the tip of the probe.

Of course, in the above-described process, a channel is formed in the cantilever portion under the probe 330, and a source and a drain are formed on each side of the channel.

As described above, while making the electron effect transistor type cantilever in the prior art, the aspect ratio of the probe cannot be increased only by the micromachining technique, but in the present invention, the carbon tip having a large vertical aspect ratio at the tip of the probe by injecting an electron beam Can be formed.

Accordingly, the present invention has the advantage of increasing the vertical aspect ratio of the probe and reading the charge even in a recording medium having a very high level of step, thereby improving the degree of sensing of information.

As described above, the present invention can implement a cantilever for a nuclear microscope with a field effect transistor having a microchannel of 100 nm or less, and can be applied to a terabit probe type information storage device. There is an effect that can prevent the occurrence of a short channel effect (Short channel).

In addition, the present invention increases the vertical aspect ratio of the probe, so that the charge can be read even in a recording medium having a very high level of step, thereby improving the degree of sensing of information.

Although the invention has been described in detail only with respect to specific examples, it will be apparent to those skilled in the art that various modifications and variations are possible within the spirit of the invention, and such modifications and variations belong to the appended claims.

1A to 1H are partial process diagrams for manufacturing a cantilever for a field effect transistor nuclear microscope with a high vertical aspect ratio according to the present invention.

FIG. 2 is a top view of FIG. 1H

3A to 3D are cross-sectional views along the line A-A 'of FIG. 2, showing some process diagrams for forming the microchannel after FIG. 1H.

FIG. 4 is a plan view of a state in which the process of FIG. 3E is completed.

5A and 5B show, in plan view, the subsequent process of FIG. 3E;

FIG. 6 is an enlarged view of 'K' of FIG. 5B

FIG. 7 is a view for explaining a process for forming a carbon tip having a high vertical aspect ratio in a field effect transistor cantilever for an atomic force microscope manufactured by performing the process of FIG. 5B.

8 is a schematic cross-sectional view of a field effect transistor cantilever for a nuclear microscope with high vertical aspect ratio according to the present invention.

<Description of the symbols for the main parts of the drawings>

110,130: silicon layer 120,141,142,151,152: insulating film

131a, 204, 300: probe 153: polysilicon layer

154: photoresist film 157,161: mask pattern

171: channel region 191: impurity doping region

203: channel 210: source

220: drain 330: carbon tip

Claims (8)

A first step of forming a probe on the second silicon layer of the silicon on insulator (SOI) substrate on which the first silicon layer, the first insulating film, and the second silicon layer are sequentially stacked; The second insulating film, the third insulating film, the polysilicon layer, and the photoresist film are sequentially stacked on the second silicon layer including the probe, and the photoresist film is removed by a photolithography process to form a first mask of a nuclear microscope cantilever. Forming a pattern on the polysilicon layer; Masking with the first mask pattern to etch from the polysilicon layer to the second insulating film to form a second mask pattern of the atomic force microscope cantilever on the second silicon layer; A fourth step of masking with the second mask pattern to inject a first impurity into a second silicon layer and to heat-treat it; A width of the upper portion of the second silicon layer is reduced by wet etching a part of the side surface of the third insulating film, removing the polysilicon layer, wet etching a part of the side surface of the second insulating film, and removing the third insulating film A fifth step of leaving an insulating film; A sixth step of masking with the second insulating film to inject a second impurity and performing heat treatment; A seventh step of forming a pattern of a second silicon layer having a shape including the probe, regions in which first and second impurities are implanted, and removing a lower portion of the shape to form a cantilever; After inserting the cantilever in which the seventh step is performed into the chamber containing carbon, the vertical aspect ratio consisting of the eighth step of forming a carbon tip on the tip of the probe by irradiating an electron beam to the probe of the cantilever is large. Method for producing a field effect transistor cantilever for an atomic force microscope. The method of claim 1, The chamber is A method for producing a field effect transistor cantilever for an atomic force microscope with a high vertical aspect ratio, which is a chamber of an electron microscope. The method according to claim 1 or 2, The first step is, Forming a pattern for forming a probe on the second silicon layer of the silicon on insulator (SOI) substrate on which the first silicon layer, the first insulating film, and the second silicon layer are sequentially stacked; Masking in a pattern for forming the probe to etch a portion of the second silicon layer to form a probe shape made of a silicon layer; Removing the pattern for forming the probe, forming a thermal oxide film on the second silicon layer, and removing the thermal oxide film by a wet etching process to form a pointed probe on the remaining second silicon layer. A method of manufacturing a field effect transistor cantilever for an atomic force microscope having a high vertical aspect ratio, comprising the steps. The method according to claim 1 or 2, Side etching of the insulating film, A method of manufacturing a field effect transistor cantilever for an atomic force microscope with a high vertical aspect ratio, characterized in that it is performed by wet etching. The method according to claim 1 or 2, P-type impurities are doped in the second silicon layer, And said first and second impurities are n-type impurities. The method of manufacturing a field effect transistor cantilever for a nuclear microscope having a high vertical aspect ratio. The method according to claim 1 or 2, N-type impurities are doped in the second silicon layer, The first and second impurities are a p-type impurity, the method for producing a field effect transistor cantilever for nuclear microscope having a high vertical aspect ratio. The method according to claim 1 or 2, The first and second impurities are impurities having homogeneous conductivity, And wherein the first impurity is n + or p +, and the second impurity is n ++ or p ++. A support portion, a cantilever portion extending from the support portion and floating from below, a probe formed at the tip of the cantilever portion, and a channel formed at the cantilever portion under the probe; Forming a cantilever having a field effect transistor for an atomic force microscope composed of a source and a drain respectively formed on both sides of the channel; Inserting a cantilever having the field effect transistor into a chamber containing carbon, and then irradiating an electron beam to the probe of the cantilever to form a carbon tip at the tip of the probe. Method for manufacturing a transistor cantilever.