KR100591171B1 - Metal Insulator Metal Capacitor and Manufacturing Method Thereof - Google Patents

Abstract

A first interlayer insulating film formed on the semiconductor substrate, a lower electrode formed on the first interlayer insulating film, a second interlayer insulating film formed on the first interlayer insulating film and the lower electrode, and having a plurality of capacitor holes, and a second interlayer insulating film And a buffer electrode formed in the plurality of capacitor holes and connected to the lower electrode, a dielectric film formed on the buffer electrode, a first tungsten plug, a second interlayer insulating film, and a first tungsten plug formed on the dielectric film. A third interlayer insulating film having a plurality of via holes, a second tungsten plug filled in the via hole of the third interlayer insulating film, and an upper portion formed on the third interlayer insulating film and connected to the second tungsten plug The lower electrode penetrates through the metal electrode, the second interlayer insulating film, and the third interlayer insulating film. A metal insulator metal capacitor comprising a lower electrode connection tungsten plug and an upper metal electrode formed on the third interlayer insulating film and connected to the lower electrode connection tungsten plug.

Metal Insulator Metal Capacitor, Corner Rounding, Capacitor Hole, Buffer Electrode

Description

Metal Insulator Metal Capacitor and Manufacturing Method Thereof {METAL INSULATOR METAL CAPACITOR AND MANUFACTURING METHOD THEREOF}

1 is a cross-sectional view of a metal insulator metal capacitor according to an embodiment of the present invention;

2 to 6 are cross-sectional views showing the manufacturing method of the metal insulator metal capacitor of FIG. 1 step by step,

7 is a plan view of a metal insulator metal capacitor in the process step of FIG. 2,

8 is a diagram illustrating a MOS transistor including a metal insulator metal capacitor according to an embodiment of the present invention.

The present invention relates to a metal insulator metal capacitor and a method of manufacturing the same.

In general, a metal insulator metal capacitor (hereinafter referred to as MIM) is a metal and a metal overlap each other, and an insulator is formed therebetween to form a capacitor. Here, the material of the insulator is silicon nitride (silicon nitride), silicon dioxide (silicon oxide), polyimide (polymide) and the like.

However, in the metal insulator metal capacitor, only the area where the upper metal and the lower metal overlap, that is, the area occupied in common with each other, forms capacitance. Therefore, in order to make a large-capacity metal insulator metal capacitor, the area where the upper metal and the lower metal overlap must be large, so that the chip size must be increased, and in this case, the integration degree is also reduced.

The technical problem of the present invention is to provide a metal insulator metal capacitor having a high capacity and high reliability and a method of manufacturing the same.

The metal insulator metal capacitor according to the present invention is formed on the first interlayer insulating film formed on the semiconductor substrate, the lower electrode formed on the first interlayer insulating film, the first interlayer insulating film and the lower electrode, and a plurality of capacitor holes. A second interlayer insulating film, a second interlayer insulating film, and a plurality of capacitor holes formed therein; a buffer electrode connected to the lower electrode; a dielectric film formed on the buffer electrode; and a dielectric film formed on the dielectric film. A third interlayer insulating film formed on the first tungsten plug, the second interlayer insulating film and the first tungsten plug, and having a plurality of via holes, and a second tungsten plug filled in the via hole of the third interlayer insulating film; It is formed on the third interlayer insulating film, and is connected to the second tungsten plug A lower electrode connecting tungsten plug connected to the lower electrode through the upper metal electrode, the second interlayer insulating film and the third interlayer insulating film, and formed on the third interlayer insulating film and connected to the lower electrode connecting tungsten plug It is preferred to include an upper metal electrode.

In addition, the upper edge portion of the capacitor hole is preferably formed round.

In addition, the buffer electrode is preferably formed on the bottom and side surfaces of the inside of the capacitor hole.

In addition, the dielectric film is preferably formed in the same pattern as the buffer electrode formed on the bottom and side surfaces of the inside of the capacitor hole.

In addition, it is preferable that a first adhesive layer is further formed between the dielectric film and the first tungsten plug.

In addition, it is preferable that a second adhesive layer is further formed between the first tungsten plug and the second tungsten plug.

In addition, the first and second adhesive layer is preferably any one of Ti, TiN or Ti / TiN.

The first to third interlayer insulating films are preferably silicon oxide or silicon nitride.

In addition, the buffer electrode is preferably any one of Ti, TiN or Ti / TiN.

In addition, the method of manufacturing a metal insulator metal capacitor according to the present invention comprises the steps of forming a lower electrode on the first interlayer insulating film on the semiconductor substrate, forming a second interlayer insulating film on the first interlayer insulating film and the lower electrode, Forming a plurality of capacitor holes in the second interlayer insulating film, forming a rounded upper edge portion of the capacitor hole, forming a buffer electrode connected to the lower electrode in the second interlayer insulating film and the plurality of capacitor holes, Forming a dielectric film on the buffer electrode, forming a first tungsten plug on the dielectric film, selectively etching the first tungsten plug, the dielectric film, and the buffer electrode to a partial region including the plurality of capacitor holes Leaving the corresponding portion, the remaining first tungsten plug and the second interlayer Forming a third interlayer insulating film on the flexible film, forming a plurality of via holes, forming a second tungsten plug inside the via hole of the third interlayer insulating film, and forming the second tungsten plug on the third interlayer insulating film; It is preferable to include forming the upper metal electrode to be connected.

The method may further include forming a lower electrode connection tungsten plug connected to the lower electrode through the second interlayer insulating layer and the third interlayer insulating layer, and forming an upper metal electrode connected to the lower electrode connection tungsten plug on the third interlayer insulating layer. It is preferable to further comprise the step of forming.

In addition, the plurality of capacitor holes may expose a portion of the lower electrode.

In addition, it is preferable to form a rounded upper edge portion of the capacitor hole using sputter etching.

The method may further include forming a first adhesive layer on the dielectric film.

The method may further include forming a second adhesive layer in the via hole of the third interlayer insulating layer.

Then, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Now, a metal insulator metal capacitor and a method of manufacturing the same according to an embodiment of the present invention will be described in detail with reference to the drawings.

1 is a cross-sectional view of a metal insulator metal capacitor according to an embodiment of the present invention, and FIG. 7 is a plan view of the metal insulator metal capacitor in the process step of FIG. 2.

As shown in FIG. 1, in the metal insulator metal capacitor according to the exemplary embodiment of the present invention, a first interlayer insulating layer 110 is formed on a semiconductor substrate, that is, a wafer. The first interlayer insulating film 110 is preferably formed of an insulating material such as silicon oxide or silicon nitride.

In addition, a patterned lower electrode 125 is formed on the first interlayer insulating layer 110. The lower electrode 125 is preferably an alloy of Al alloy, Ti, TiN, Ti / TiN alloy, Al and Ti, TiN, Ti / TiN.

The second interlayer insulating layer 135 is formed on the lower electrode 125 and the first interlayer insulating layer 110. The second interlayer insulating layer 135 is preferably formed of an insulating material such as silicon oxide or silicon nitride. A plurality of capacitor holes 131 exposing a portion of the lower electrode 125 is formed in the second interlayer insulating layer 135 (see FIG. 7).

The upper edge portion 135a of the capacitor hole 131 is roundly formed. In this case, the electric field is concentrated by preventing the dielectric film 155 from thinning locally at the upper edge portion 135a of the capacitor hole 131 so that the breakdown voltage (BV) characteristics of the metal insulator metal capacitor are reduced. The problem of deterioration of the TDDB (Time Dependent Dielectric Breakdown) characteristic can be prevented.

A buffer electrode 145 is formed in the second interlayer insulating layer 135 and the plurality of capacitor holes 131, and the buffer electrode 145 is connected to the lower electrode 125. That is, the buffer electrode 145 is thinly formed and is formed inside each capacitor hole 131, that is, on the bottom and side surfaces of the capacitor hole 131. Therefore, the buffer electrode 145 connected to the lower electrode 125 of the metal insulator metal capacitor according to the embodiment of the present invention has a larger area than the buffer electrode 145 in the region where the metal insulator metal capacitor is formed. , The capacitance is improved.

The dielectric film 155 is formed on the buffer electrode 145, and the first tungsten plug 165 is formed on the dielectric film 155.

An adhesive layer 157 made of Ti, TiN, or Ti / TiN is formed between the dielectric film 155 and the second tungsten plug 165.

The third interlayer insulating layer 175 is formed on the second interlayer insulating layer 135 and the first tungsten plug 165, and the third interlayer insulating layer 175 exposes a portion of the first tungsten plug 165. It has a plurality of via holes 171. The third interlayer insulating film 175 is preferably formed of an insulating material such as silicon oxide or silicon nitride.

The second tungsten plug 185 is filled in the via hole 171 of the third interlayer insulating layer 175, and the second tungsten plug 185 is connected to the first tungsten plug 165.

An upper metal electrode 195 is formed on the third interlayer insulating layer 175, and the upper metal electrode 195 is connected to the second tungsten plug 185.

The lower electrode connection tungsten plug 186 is formed through the second interlayer insulating layer 135 and the third interlayer insulating layer 175, and the lower electrode connection tungsten plug 186 is connected to the lower electrode 125. have.

An upper electrode 196 connected to the lower electrode connection tungsten plug 186 is formed on the third interlayer insulating layer 175.

A method of manufacturing a metal insulator metal capacitor according to an embodiment of the present invention configured as described above will be described with reference to the drawings.

2 to 6 are cross-sectional views illustrating a method of manufacturing the metal insulator metal capacitor of FIG.

First, as shown in FIG. 2, an Al alloy or Ti, TiN or Ti / TiN alloy or Al, Ti, TiN, or the like on a semiconductor substrate, that is, a first interlayer dielectric (IMD) 110 on a wafer, may be used. An alloy of Ti / TiN or the like is deposited, and the lower electrode 125 of the metal insulator metal capacitor is formed using a photo resist patterning process and an etching process.

Next, a second interlayer insulating layer 135 is deposited on the first interlayer insulating layer 110 and the lower electrode 125, and the second interlayer insulating layer is formed through a chemical mechanical polishing process or an etch back process. Planarize the 135. In this case, since the thickness of the second interlayer insulating layer 135 greatly affects the capacitance of the metal insulator metal capacitor, the thickness of the second interlayer insulating layer 135 must be accurately managed during the CMP process or the etch back process. Next, the second interlayer insulating layer 135 is patterned to form a plurality of capacitor holes (Hole) 131.

FIG. 7 is a schematic plan view of a metal insulator metal capacitor having a capacitor hole 131 formed therein. As illustrated in FIG. 7, a plurality of capacitor holes 131 are formed in the second interlayer insulating layer 135 at predetermined intervals.

Next, as shown in FIG. 3, the upper edge portion 135a of the capacitor hole 131 is rounded using sputter etching. Rounding the upper edge portion 135a of the capacitor hole 131 prevents the dielectric film 155 of the upper edge portion 135a of the capacitor hole 131 from being locally thinned. Accordingly, the electric field is prevented from concentrating on the upper edge portion 135a of the capacitor hole 131, so that the breakdown voltage (BV) characteristics, time dependent dielectric breakdown (TDDB) characteristics, etc. of the metal insulator metal capacitor are deteriorated. Problems can be prevented.

Next, as shown in FIG. 4, the buffer electrode layer 140, the dielectric layer 150, and the first tungsten plug layer 160 are sequentially deposited on the second interlayer insulating layer 135.

The dielectric film 155 may be deposited on the buffer electrode 145, and the first tungsten plug 165 may be deposited on the dielectric film 155 by depositing Ti, TiN or Ti / TiN with the adhesive layer 157. have.

Next, as shown in FIG. 5, the first tungsten plug layer 160 is patterned to correspond to a portion of the region including the plurality of capacitor holes 131. The first tungsten plug 165 and the dielectric film ( The first tungsten plug layer 160, the dielectric layer 150, and the buffer electrode layer 140 in the remaining areas are removed while leaving the 155 and the buffer electrode 145.

The buffer electrode 145 is connected to the lower electrode 125 and is also formed inside the capacitor hole 131 and thus has a large area. That is, the buffer electrode 145 is thinly formed and is formed inside each capacitor hole 131, that is, on the bottom and side surfaces of the capacitor hole 131. Therefore, the buffer electrode 145 connected to the lower electrode 125 of the metal insulator metal capacitor according to the embodiment of the present invention has a larger area than the buffer electrode in the region where the metal insulator metal capacitor is formed. This is improved. The buffer electrode 145 is preferably formed of Ti, TiN or Ti / TiN.

Next, a third interlayer insulating film 170 is deposited to a predetermined thickness on the patterned first tungsten plug 165 and the second interlayer insulating film 135, and the third interlayer insulating film 170 is formed by a CMP process or an etch back process. Flatten).

Next, as illustrated in FIG. 6, the third interlayer insulating layer 175 is patterned to form a plurality of via holes 171. At this time, a portion of the third interlayer insulating layer 175 and the second interlayer insulating layer 135 are patterned to form a tungsten plug hole 172.

Then, tungsten (W) is deposited on the third interlayer insulating layer 175 and the second tungsten plug 185 and the lower electrode connecting tungsten plug 186 are formed through a CMP process or an etch back process.

Meanwhile, an adhesive layer (not shown) made of Ti, TiN, or Ti / TiN may be formed before filling tungsten in the via hole 171 and the tungsten plug hole 172. That is, a CMP process or an etch back process may be performed by depositing an adhesive layer (not shown) made of Ti, TiN, or Ti / TiN on the third interlayer insulating layer 175 and depositing tungsten (W) on the adhesive layer (not shown). The second tungsten plug 185 and the lower electrode connection tungsten plug 186 may be respectively formed through the second tungsten plug 185.

In addition, instead of forming the via hole 171 in the third interlayer insulating layer 175, a long bar-shaped via trench or a rectangular via block may be formed.

Next, as shown in FIG. 1, Al alloy or Ti, TiN or Ti / TiN alloy or an alloy of Al and Ti, TiN or Ti / TiN is deposited on the third interlayer insulating film 175, and photoresist patterning is performed. A photoresist patterning process and an etching process are used to form the upper metal electrode 195 and the upper electrode 196 of the metal insulator metal capacitor.

The upper electrode 196 is connected to the lower electrode connection tungsten plug 186, and the upper metal electrode 195 is connected to the second tungsten plug 185.

As described above, the metal insulator metal capacitor having the capacitor hole 131 may increase the capacitance while having the same area as the metal insulator metal capacitor of the conventional metal insulator because the side of the capacitor hole 131 acts as a capacitor. That is, the area formed by the buffer electrode 145 and the first tungsten plug 165 both form capacitance.

Meanwhile, the metal insulator metal capacitor and the method for manufacturing the metal insulator according to the embodiment of the present invention are preferably formed in the inside of the metal oxide semiconductor (MOS) transistor or in the middle of the manufacturing method of the metal oxide semiconductor (MOS) transistor.

8 illustrates a MOS transistor including a metal insulator metal capacitor according to an embodiment of the present invention.

As shown in FIG. 8, a device isolation layer 12 is formed on the silicon substrate, which is the semiconductor substrate 10, to separate between the active and inactive regions of the device.

Subsequently, a MOS transistor is formed as a semiconductor element on the silicon substrate 10 on which the element isolation film 12 is formed. This MOS transistor is composed of a gate electrode 14, source and drain regions 13, 15.

On this MOS transistor, a BPG (BoroPhospho Silicate Glass) or a PSG (Phospho Silicate Glass) is deposited and annealed as a poly metal dielectric layer (PMD) 20.

Next, the surface of the interlayer insulating film 20 is planarized by a CMP process. A plurality of vias connected to the gate electrode 14, the source and drain regions 13 and 15 are formed by forming contact holes in the interlayer insulating layer 20 and filling metal with the contact holes. 25).

Next, when the lower metal M1 of the MOS transistor connected to the plurality of vias 25 is formed, the lower electrode 125 of the metal insulator metal capacitor is formed together.

As described above, the metal insulator metal capacitor 100 is formed.

When the lower electrode connecting tungsten plug 186 and the second tungsten plug 185 are formed, the vias 55 of the MOS transistor are formed together.

When the upper metal electrode 195 and the upper electrode 196 of the metal insulator metal capacitor are formed, the upper metal M2 of the MOS transistor is formed together.

Although the preferred embodiments of the present invention have been described in detail above, those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Accordingly, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention.

The metal insulator metal capacitor and the method of manufacturing the same according to the present invention round the upper edge portion of the capacitor hole to prevent the dielectric film of the upper edge portion of the capacitor hole from thinning locally to prevent the electric field from being concentrated. Therefore, the problem that the BV characteristic, TDDB characteristic, etc. of a metal insulator metal capacitor deteriorate can be prevented.

In addition, a plurality of capacitor holes are formed at predetermined intervals in a region where the metal insulator metal capacitor is formed, and capacitors are formed on the bottom and side surfaces of the capacitor hole to have a large capacitance in a small capacitor region. That is, the advantage of having a larger capacitance than the conventional metal insulator metal capacitor in the same area while maintaining the characteristics of the metal insulator metal capacitor used in the high performance mixed signal and RF circuit. have.

Claims (15)

A first interlayer insulating film formed over the semiconductor substrate, A lower electrode formed on the first interlayer insulating film, A second interlayer insulating layer formed on the first interlayer insulating layer and the lower electrode, the second interlayer insulating layer having a plurality of capacitor holes having rounded upper edges; A buffer electrode formed on the bottom and side surfaces of the second interlayer insulating layer and the plurality of capacitor holes, and connected to the lower electrode; A dielectric film formed on the buffer electrode, A first tungsten plug formed on the dielectric film, A third interlayer insulating layer formed on the second interlayer insulating layer and the first tungsten plug and having a plurality of via holes; A second tungsten plug filled in a via hole of the third interlayer insulating film; An upper metal electrode formed on the third interlayer insulating layer and connected to the second tungsten plug; A lower electrode connection tungsten plug penetrating the second interlayer insulating layer and the third interlayer insulating layer and connected to the lower electrode; An upper electrode formed on the third interlayer insulating layer and connected to the lower electrode connecting tungsten plug Metal insulator metal capacitor comprising a. delete delete In claim 1, And the dielectric film is formed in the same pattern as the buffer electrode formed on the bottom and side surfaces of the inside of the capacitor hole. In claim 1, A metal insulator metal capacitor, wherein a first adhesive layer is further formed between the dielectric film and the first tungsten plug. In claim 1, A metal insulator metal capacitor, wherein a second adhesive layer is further formed between the first tungsten plug and the second tungsten plug. In claim 1, And the first and second adhesive layers are any one of Ti, TiN or Ti / TiN. In claim 1, And the first to third interlayer insulating films are silicon oxide or silicon nitride. In claim 1, The buffer electrode is a metal insulator metal capacitor of any one of Ti, TiN or Ti / TiN. Forming a lower electrode on the first interlayer insulating film on the semiconductor substrate, Forming a second interlayer insulating film on the first interlayer insulating film and the lower electrode, and forming a plurality of capacitor holes in the second interlayer insulating film, Roundly forming an upper corner portion of the capacitor hole, Forming a buffer electrode connected to the lower electrode in the second interlayer insulating layer and the plurality of capacitor holes, Forming a dielectric film on the buffer electrode; Forming a first tungsten plug on the dielectric film; Selectively etching the first tungsten plug, the dielectric layer, and the buffer electrode to leave a portion corresponding to the partial region including the plurality of capacitor holes; Forming a third interlayer insulating film on the remaining first tungsten plug and the second interlayer insulating film, and forming a plurality of via holes; Forming a second tungsten plug connected to the first tungsten plug in a via hole of the third interlayer insulating film; Forming an upper metal electrode connected to the second tungsten plug on the third interlayer insulating layer Forming a lower electrode connection tungsten plug connected to the lower electrode through the second insulating interlayer and the third insulating interlayer; Forming an upper electrode connected to the lower electrode connection tungsten plug on the third interlayer insulating layer Method of manufacturing a metal insulator metal capacitor comprising a. delete In claim 10, And the plurality of capacitor holes expose a portion of the lower electrode. In claim 10, A method of manufacturing a metal insulator metal capacitor to form a rounded upper edge portion of the capacitor hole using sputter etching. In claim 10, And forming a first adhesive layer on the dielectric film. In claim 10, And forming a second adhesive layer inside the via hole of the third interlayer insulating film.

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